2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
30 #include "asix-sigma.h"
32 #define USB_VENDOR 0xa600
33 #define USB_PRODUCT 0xa000
34 #define USB_DESCRIPTION "ASIX SIGMA"
35 #define USB_VENDOR_NAME "ASIX"
36 #define USB_MODEL_NAME "SIGMA"
37 #define USB_MODEL_VERSION ""
39 static GSList *device_instances = NULL;
41 // XXX These should be per device
42 static struct ftdi_context ftdic;
43 static uint64_t cur_samplerate = MHZ(200);
44 static uint32_t limit_msec = 0;
45 static struct timeval start_tv;
46 static int cur_firmware = -1;
48 static uint64_t supported_samplerates[] = {
55 static struct samplerates samplerates = {
59 supported_samplerates,
62 static int capabilities[] = {
66 /* These are really implemented in the driver, not the hardware. */
71 /* Force the FPGA to reboot. */
72 static uint8_t suicide[] = {
73 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
76 /* Prepare to upload firmware (FPGA specific). */
77 static uint8_t init[] = {
78 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
81 /* Initialize the logic analyzer mode. */
82 static uint8_t logic_mode_start[] = {
83 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
84 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
87 static const char *firmware_files[] =
89 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
90 "asix-sigma-100.fw", /* 100 MHz */
91 "asix-sigma-200.fw", /* 200 MHz */
92 "asix-sigma-50sync.fw", /* Asynchronous sampling */
93 "asix-sigma-phasor.fw", /* Frequency counter */
96 static int sigma_read(void* buf, size_t size)
100 ret = ftdi_read_data(&ftdic, (unsigned char *)buf, size);
102 g_warning("ftdi_read_data failed: %s",
103 ftdi_get_error_string(&ftdic));
109 static int sigma_write(void *buf, size_t size)
113 ret = ftdi_write_data(&ftdic, (unsigned char *)buf, size);
115 g_warning("ftdi_write_data failed: %s",
116 ftdi_get_error_string(&ftdic));
117 } else if ((size_t) ret != size) {
118 g_warning("ftdi_write_data did not complete write\n");
124 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len)
127 uint8_t buf[len + 2];
130 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
131 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
133 for (i = 0; i < len; ++i) {
134 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
135 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
138 return sigma_write(buf, idx);
141 static int sigma_set_register(uint8_t reg, uint8_t value)
143 return sigma_write_register(reg, &value, 1);
146 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len)
150 buf[0] = REG_ADDR_LOW | (reg & 0xf);
151 buf[1] = REG_ADDR_HIGH | (reg >> 4);
152 buf[2] = REG_READ_ADDR;
154 sigma_write(buf, sizeof(buf));
156 return sigma_read(data, len);
159 static uint8_t sigma_get_register(uint8_t reg)
163 if (1 != sigma_read_register(reg, &value, 1)) {
164 g_warning("Sigma_get_register: 1 byte expected");
171 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos)
174 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
176 REG_READ_ADDR | NEXT_REG,
177 REG_READ_ADDR | NEXT_REG,
178 REG_READ_ADDR | NEXT_REG,
179 REG_READ_ADDR | NEXT_REG,
180 REG_READ_ADDR | NEXT_REG,
181 REG_READ_ADDR | NEXT_REG,
185 sigma_write(buf, sizeof(buf));
187 sigma_read(result, sizeof(result));
189 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
190 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
195 static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
201 /* Send the startchunk. Index start with 1. */
202 buf[0] = startchunk >> 8;
203 buf[1] = startchunk & 0xff;
204 sigma_write_register(WRITE_MEMROW, buf, 2);
207 buf[idx++] = REG_DRAM_BLOCK;
208 buf[idx++] = REG_DRAM_WAIT_ACK;
210 for (i = 0; i < numchunks; ++i) {
211 /* Alternate bit to copy from DRAM to cache. */
212 if (i != (numchunks - 1))
213 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
215 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
217 if (i != (numchunks - 1))
218 buf[idx++] = REG_DRAM_WAIT_ACK;
221 sigma_write(buf, idx);
223 return sigma_read(data, numchunks * CHUNK_SIZE);
226 /* Generate the bitbang stream for programming the FPGA. */
227 static int bin2bitbang(const char *filename,
228 unsigned char **buf, size_t *buf_size)
232 unsigned long offset = 0;
234 uint8_t *compressed_buf, *firmware;
235 uLongf csize, fwsize;
236 const int buffer_size = 65536;
239 uint32_t imm = 0x3f6df2ab;
241 f = fopen(filename, "r");
243 g_warning("fopen(\"%s\", \"r\")", filename);
247 if (-1 == fseek(f, 0, SEEK_END)) {
248 g_warning("fseek on %s failed", filename);
253 file_size = ftell(f);
255 fseek(f, 0, SEEK_SET);
257 compressed_buf = g_malloc(file_size);
258 firmware = g_malloc(buffer_size);
260 if (!compressed_buf || !firmware) {
261 g_warning("Error allocating buffers");
266 while ((c = getc(f)) != EOF) {
267 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
268 compressed_buf[csize++] = c ^ imm;
272 fwsize = buffer_size;
273 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
275 g_free(compressed_buf);
277 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
281 g_free(compressed_buf);
283 *buf_size = fwsize * 2 * 8;
285 *buf = p = (unsigned char *)g_malloc(*buf_size);
288 g_warning("Error allocating buffers");
292 for (i = 0; i < fwsize; ++i) {
293 for (bit = 7; bit >= 0; --bit) {
294 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
295 p[offset++] = v | 0x01;
302 if (offset != *buf_size) {
304 g_warning("Error reading firmware %s "
305 "offset=%ld, file_size=%ld, buf_size=%zd\n",
306 filename, offset, file_size, *buf_size);
314 static int hw_init(char *deviceinfo)
316 struct sigrok_device_instance *sdi;
318 deviceinfo = deviceinfo;
322 /* Look for SIGMAs. */
323 if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT,
324 USB_DESCRIPTION, NULL) < 0)
327 /* Register SIGMA device. */
328 sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
329 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
333 device_instances = g_slist_append(device_instances, sdi);
335 /* We will open the device again when we need it. */
336 ftdi_usb_close(&ftdic);
341 static int upload_firmware(int firmware_idx)
347 unsigned char result[32];
348 char firmware_path[128];
350 /* Make sure it's an ASIX SIGMA. */
351 if ((ret = ftdi_usb_open_desc(&ftdic,
352 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
353 g_warning("ftdi_usb_open failed: %s",
354 ftdi_get_error_string(&ftdic));
358 if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
359 g_warning("ftdi_set_bitmode failed: %s",
360 ftdi_get_error_string(&ftdic));
364 /* Four times the speed of sigmalogan - Works well. */
365 if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) {
366 g_warning("ftdi_set_baudrate failed: %s",
367 ftdi_get_error_string(&ftdic));
371 /* Force the FPGA to reboot. */
372 sigma_write(suicide, sizeof(suicide));
373 sigma_write(suicide, sizeof(suicide));
374 sigma_write(suicide, sizeof(suicide));
375 sigma_write(suicide, sizeof(suicide));
377 /* Prepare to upload firmware (FPGA specific). */
378 sigma_write(init, sizeof(init));
380 ftdi_usb_purge_buffers(&ftdic);
382 /* Wait until the FPGA asserts INIT_B. */
384 ret = sigma_read(result, 1);
385 if (result[0] & 0x20)
389 /* Prepare firmware */
390 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
391 firmware_files[firmware_idx]);
393 if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) {
394 g_warning("An error occured while reading the firmware: %s",
399 /* Upload firmare. */
400 sigma_write(buf, buf_size);
404 if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
405 g_warning("ftdi_set_bitmode failed: %s",
406 ftdi_get_error_string(&ftdic));
410 ftdi_usb_purge_buffers(&ftdic);
412 /* Discard garbage. */
413 while (1 == sigma_read(&pins, 1))
416 /* Initialize the logic analyzer mode. */
417 sigma_write(logic_mode_start, sizeof(logic_mode_start));
419 /* Expect a 3 byte reply. */
420 ret = sigma_read(result, 3);
422 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
423 g_warning("Configuration failed. Invalid reply received.");
427 cur_firmware = firmware_idx;
432 static int hw_opendev(int device_index)
434 struct sigrok_device_instance *sdi;
437 /* Make sure it's an ASIX SIGMA */
438 if ((ret = ftdi_usb_open_desc(&ftdic,
439 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
441 g_warning("ftdi_usb_open failed: %s",
442 ftdi_get_error_string(&ftdic));
447 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
450 sdi->status = ST_ACTIVE;
455 static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerate)
461 for (i = 0; supported_samplerates[i]; i++) {
462 if (supported_samplerates[i] == samplerate)
465 if (supported_samplerates[i] == 0)
466 return SIGROK_ERR_SAMPLERATE;
468 if (samplerate <= MHZ(50)) {
469 ret = upload_firmware(0);
470 // XXX: Setup divider
472 if (samplerate == MHZ(100))
473 ret = upload_firmware(1);
474 else if (samplerate == MHZ(200))
475 ret = upload_firmware(2);
477 cur_samplerate = samplerate;
479 g_message("Firmware uploaded");
484 static void hw_closedev(int device_index)
486 device_index = device_index;
488 ftdi_usb_close(&ftdic);
491 static void hw_cleanup(void)
495 static void *hw_get_device_info(int device_index, int device_info_id)
497 struct sigrok_device_instance *sdi;
500 if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
501 fprintf(stderr, "It's NULL.\n");
505 switch (device_info_id) {
510 info = GINT_TO_POINTER(4);
515 case DI_TRIGGER_TYPES:
516 info = 0; //TRIGGER_TYPES;
518 case DI_CUR_SAMPLERATE:
519 info = &cur_samplerate;
526 static int hw_get_status(int device_index)
528 struct sigrok_device_instance *sdi;
530 sdi = get_sigrok_device_instance(device_instances, device_index);
537 static int *hw_get_capabilities(void)
542 static int hw_set_configuration(int device_index, int capability, void *value)
544 struct sigrok_device_instance *sdi;
547 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
550 if (capability == HWCAP_SAMPLERATE) {
551 ret = set_samplerate(sdi, *(uint64_t*) value);
552 } else if (capability == HWCAP_PROBECONFIG) {
554 } else if (capability == HWCAP_LIMIT_MSEC) {
555 limit_msec = strtoull(value, NULL, 10);
565 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
566 * Each event is 20ns apart, and can contain multiple samples.
567 * For 200 MHz, an event contains 4 samples for each channel,
570 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
571 uint8_t *lastsample, void *user_data)
573 const int samples_per_event = 4;
575 uint8_t samples[65536 * samples_per_event];
576 struct datafeed_packet packet;
577 int i, j, k, numpad, tosend;
578 size_t n = 0, sent = 0;
579 int clustersize = EVENTS_PER_CLUSTER * samples_per_event; /* 4 for 200 MHz */
583 for (i = 0; i < 64; ++i) {
584 ts = *(uint16_t *) &buf[i * 16];
585 tsdiff = ts - *lastts;
588 /* Pad last sample up to current point. */
589 numpad = tsdiff * samples_per_event - clustersize;
591 memset(samples, *lastsample,
592 tsdiff * samples_per_event - clustersize);
593 n = tsdiff * samples_per_event - clustersize;
596 event = (uint16_t *) &buf[i * 16 + 2];
598 /* For each sample in cluster. */
599 for (j = 0; j < 7; ++j) {
600 for (k = 0; k < samples_per_event; ++k) {
602 * Extract samples from bytestream.
603 * Samples are packed together in a short.
606 ((!!(event[j] & (1 << (k + 0x0)))) << 0) |
607 ((!!(event[j] & (1 << (k + 0x4)))) << 1) |
608 ((!!(event[j] & (1 << (k + 0x8)))) << 2) |
609 ((!!(event[j] & (1 << (k + 0xc)))) << 3);
613 *lastsample = samples[n - 1];
615 /* Send to sigrok. */
618 tosend = MIN(4096, n - sent);
620 packet.type = DF_LOGIC8;
621 packet.length = tosend;
622 packet.payload = samples + sent;
623 session_bus(user_data, &packet);
632 static int receive_data(int fd, int revents, void *user_data)
634 struct datafeed_packet packet;
635 const int chunks_per_read = 32;
636 unsigned char buf[chunks_per_read * CHUNK_SIZE];
637 int bufsz, numchunks, curchunk, i, newchunks;
638 uint32_t triggerpos, stoppos, running_msec;
641 uint8_t lastsample = 0;
646 /* Get the current position. */
647 sigma_read_pos(&stoppos, &triggerpos);
648 numchunks = stoppos / 512;
650 /* Check if the has expired, or memory is full. */
651 gettimeofday(&tv, 0);
652 running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
653 (tv.tv_usec - start_tv.tv_usec) / 1000;
655 if (running_msec < limit_msec && numchunks < 32767)
658 /* Stop acqusition. */
659 sigma_set_register(WRITE_MODE, 0x11);
661 /* Set SDRAM Read Enable. */
662 sigma_set_register(WRITE_MODE, 0x02);
664 /* Get the current position. */
665 sigma_read_pos(&stoppos, &triggerpos);
667 /* Download sample data. */
668 for (curchunk = 0; curchunk < numchunks;) {
669 newchunks = MIN(chunks_per_read, numchunks - curchunk);
671 g_message("Downloading sample data: %.0f %%",
672 100.0 * curchunk / numchunks);
674 bufsz = sigma_read_dram(curchunk, newchunks, buf);
678 lastts = *(uint16_t *) buf - 1;
680 /* Decode chunks and send them to sigrok. */
681 for (i = 0; i < newchunks; ++i) {
682 decode_chunk_ts(buf + (i * CHUNK_SIZE),
683 &lastts, &lastsample, user_data);
686 curchunk += newchunks;
690 packet.type = DF_END;
692 session_bus(user_data, &packet);
697 static int hw_start_acquisition(int device_index, gpointer session_device_id)
699 struct sigrok_device_instance *sdi;
700 struct datafeed_packet packet;
701 struct datafeed_header header;
702 uint8_t trigger_option[2] = { 0x38, 0x00 };
704 session_device_id = session_device_id;
706 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
709 device_index = device_index;
711 if (cur_firmware == -1) {
712 /* Samplerate has not been set. Default to 200 MHz */
713 set_samplerate(sdi, 200);
716 /* Setup trigger (by trigger-in). */
717 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
719 /* More trigger setup. */
720 sigma_write_register(WRITE_TRIGGER_OPTION,
721 trigger_option, sizeof(trigger_option));
723 /* Trigger normal (falling edge). */
724 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
726 /* Enable pins (200 MHz, 4 pins). */
727 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0);
729 /* Setup maximum post trigger time. */
730 sigma_set_register(WRITE_POST_TRIGGER, 0xff);
732 /* Start acqusition (software trigger start). */
733 gettimeofday(&start_tv, 0);
734 sigma_set_register(WRITE_MODE, 0x0d);
736 /* Add capture source. */
737 source_add(0, G_IO_IN, 10, receive_data, session_device_id);
739 receive_data(0, 1, session_device_id);
741 /* Send header packet to the session bus. */
742 packet.type = DF_HEADER;
743 packet.length = sizeof(struct datafeed_header);
744 packet.payload = &header;
745 header.feed_version = 1;
746 gettimeofday(&header.starttime, NULL);
747 header.samplerate = cur_samplerate;
748 header.protocol_id = PROTO_RAW;
749 header.num_probes = 4;
750 session_bus(session_device_id, &packet);
755 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
757 device_index = device_index;
758 session_device_id = session_device_id;
760 /* Stop acquisition. */
761 sigma_set_register(WRITE_MODE, 0x11);
763 // XXX Set some state to indicate that data should be sent to sigrok
764 // Now, we just wait for timeout
767 struct device_plugin asix_sigma_plugin_info = {
777 hw_set_configuration,
778 hw_start_acquisition,