2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA Logic Analyzer Driver
28 #include <glib/gstdio.h>
33 #include <sigrok-internal.h>
34 #include "asix-sigma.h"
36 #define USB_VENDOR 0xa600
37 #define USB_PRODUCT 0xa000
38 #define USB_DESCRIPTION "ASIX SIGMA"
39 #define USB_VENDOR_NAME "ASIX"
40 #define USB_MODEL_NAME "SIGMA"
41 #define USB_MODEL_VERSION ""
42 #define TRIGGER_TYPES "rf10"
44 static GSList *device_instances = NULL;
46 static uint64_t supported_samplerates[] = {
60 static struct sr_samplerates samplerates = {
64 supported_samplerates,
67 static int capabilities[] = {
68 SR_HWCAP_LOGIC_ANALYZER,
70 SR_HWCAP_CAPTURE_RATIO,
77 /* Force the FPGA to reboot. */
78 static uint8_t suicide[] = {
79 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
82 /* Prepare to upload firmware (FPGA specific). */
83 static uint8_t init[] = {
84 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
87 /* Initialize the logic analyzer mode. */
88 static uint8_t logic_mode_start[] = {
89 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
90 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
93 static const char *firmware_files[] = {
94 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
95 "asix-sigma-100.fw", /* 100 MHz */
96 "asix-sigma-200.fw", /* 200 MHz */
97 "asix-sigma-50sync.fw", /* Synchronous clock from pin */
98 "asix-sigma-phasor.fw", /* Frequency counter */
101 static void hw_stop_acquisition(int device_index, gpointer session_device_id);
103 static int sigma_read(void *buf, size_t size, struct sigma *sigma)
107 ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size);
109 sr_warn("ftdi_read_data failed: %s",
110 ftdi_get_error_string(&sigma->ftdic));
116 static int sigma_write(void *buf, size_t size, struct sigma *sigma)
120 ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size);
122 sr_warn("ftdi_write_data failed: %s",
123 ftdi_get_error_string(&sigma->ftdic));
124 } else if ((size_t) ret != size) {
125 sr_warn("ftdi_write_data did not complete write\n");
131 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
135 uint8_t buf[len + 2];
138 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
139 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
141 for (i = 0; i < len; ++i) {
142 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
143 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
146 return sigma_write(buf, idx, sigma);
149 static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma)
151 return sigma_write_register(reg, &value, 1, sigma);
154 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len,
159 buf[0] = REG_ADDR_LOW | (reg & 0xf);
160 buf[1] = REG_ADDR_HIGH | (reg >> 4);
161 buf[2] = REG_READ_ADDR;
163 sigma_write(buf, sizeof(buf), sigma);
165 return sigma_read(data, len, sigma);
168 static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma)
172 if (1 != sigma_read_register(reg, &value, 1, sigma)) {
173 sr_warn("sigma_get_register: 1 byte expected");
180 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
184 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
186 REG_READ_ADDR | NEXT_REG,
187 REG_READ_ADDR | NEXT_REG,
188 REG_READ_ADDR | NEXT_REG,
189 REG_READ_ADDR | NEXT_REG,
190 REG_READ_ADDR | NEXT_REG,
191 REG_READ_ADDR | NEXT_REG,
195 sigma_write(buf, sizeof(buf), sigma);
197 sigma_read(result, sizeof(result), sigma);
199 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
200 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
202 /* Not really sure why this must be done, but according to spec. */
203 if ((--*stoppos & 0x1ff) == 0x1ff)
206 if ((*--triggerpos & 0x1ff) == 0x1ff)
212 static int sigma_read_dram(uint16_t startchunk, size_t numchunks,
213 uint8_t *data, struct sigma *sigma)
219 /* Send the startchunk. Index start with 1. */
220 buf[0] = startchunk >> 8;
221 buf[1] = startchunk & 0xff;
222 sigma_write_register(WRITE_MEMROW, buf, 2, sigma);
225 buf[idx++] = REG_DRAM_BLOCK;
226 buf[idx++] = REG_DRAM_WAIT_ACK;
228 for (i = 0; i < numchunks; ++i) {
229 /* Alternate bit to copy from DRAM to cache. */
230 if (i != (numchunks - 1))
231 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
233 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
235 if (i != (numchunks - 1))
236 buf[idx++] = REG_DRAM_WAIT_ACK;
239 sigma_write(buf, idx, sigma);
241 return sigma_read(data, numchunks * CHUNK_SIZE, sigma);
244 /* Upload trigger look-up tables to Sigma. */
245 static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma)
251 /* Transpose the table and send to Sigma. */
252 for (i = 0; i < 16; ++i) {
257 if (lut->m2d[0] & bit)
259 if (lut->m2d[1] & bit)
261 if (lut->m2d[2] & bit)
263 if (lut->m2d[3] & bit)
273 if (lut->m0d[0] & bit)
275 if (lut->m0d[1] & bit)
277 if (lut->m0d[2] & bit)
279 if (lut->m0d[3] & bit)
282 if (lut->m1d[0] & bit)
284 if (lut->m1d[1] & bit)
286 if (lut->m1d[2] & bit)
288 if (lut->m1d[3] & bit)
291 sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
293 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma);
296 /* Send the parameters */
297 sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
298 sizeof(lut->params), sigma);
303 /* Generate the bitbang stream for programming the FPGA. */
304 static int bin2bitbang(const char *filename,
305 unsigned char **buf, size_t *buf_size)
309 unsigned long offset = 0;
311 uint8_t *compressed_buf, *firmware;
312 uLongf csize, fwsize;
313 const int buffer_size = 65536;
316 uint32_t imm = 0x3f6df2ab;
318 f = g_fopen(filename, "rb");
320 sr_warn("g_fopen(\"%s\", \"rb\")", filename);
324 if (-1 == fseek(f, 0, SEEK_END)) {
325 sr_warn("fseek on %s failed", filename);
330 file_size = ftell(f);
332 fseek(f, 0, SEEK_SET);
334 if (!(compressed_buf = g_try_malloc(file_size))) {
335 sr_err("asix: %s: compressed_buf malloc failed", __func__);
337 return SR_ERR_MALLOC;
340 if (!(firmware = g_try_malloc(buffer_size))) {
341 sr_err("asix: %s: firmware malloc failed", __func__);
343 g_free(compressed_buf);
344 return SR_ERR_MALLOC;
348 while ((c = getc(f)) != EOF) {
349 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
350 compressed_buf[csize++] = c ^ imm;
354 fwsize = buffer_size;
355 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
357 g_free(compressed_buf);
359 sr_warn("Could not unpack Sigma firmware. (Error %d)\n", ret);
363 g_free(compressed_buf);
365 *buf_size = fwsize * 2 * 8;
367 *buf = p = (unsigned char *)g_try_malloc(*buf_size);
369 sr_err("asix: %s: buf/p malloc failed", __func__);
370 g_free(compressed_buf);
372 return SR_ERR_MALLOC;
375 for (i = 0; i < fwsize; ++i) {
376 for (bit = 7; bit >= 0; --bit) {
377 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
378 p[offset++] = v | 0x01;
385 if (offset != *buf_size) {
387 sr_warn("Error reading firmware %s "
388 "offset=%ld, file_size=%ld, buf_size=%zd\n",
389 filename, offset, file_size, *buf_size);
397 static int hw_init(const char *deviceinfo)
399 struct sr_device_instance *sdi;
402 /* Avoid compiler warnings. */
403 deviceinfo = deviceinfo;
405 if (!(sigma = g_try_malloc(sizeof(struct sigma)))) {
406 sr_err("asix: %s: sigma malloc failed", __func__);
407 return 0; /* FIXME: Should be SR_ERR_MALLOC. */
410 ftdi_init(&sigma->ftdic);
412 /* Look for SIGMAs. */
413 if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT,
414 USB_DESCRIPTION, NULL) < 0)
417 sigma->cur_samplerate = 0;
418 sigma->limit_msec = 0;
419 sigma->cur_firmware = -1;
420 sigma->num_probes = 0;
421 sigma->samples_per_event = 0;
422 sigma->capture_ratio = 50;
423 sigma->use_triggers = 0;
425 /* Register SIGMA device. */
426 sdi = sr_device_instance_new(0, SR_ST_INITIALIZING,
427 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
433 device_instances = g_slist_append(device_instances, sdi);
435 /* We will open the device again when we need it. */
436 ftdi_usb_close(&sigma->ftdic);
444 static int upload_firmware(int firmware_idx, struct sigma *sigma)
450 unsigned char result[32];
451 char firmware_path[128];
453 /* Make sure it's an ASIX SIGMA. */
454 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
455 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
456 sr_warn("ftdi_usb_open failed: %s",
457 ftdi_get_error_string(&sigma->ftdic));
461 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
462 sr_warn("ftdi_set_bitmode failed: %s",
463 ftdi_get_error_string(&sigma->ftdic));
467 /* Four times the speed of sigmalogan - Works well. */
468 if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) {
469 sr_warn("ftdi_set_baudrate failed: %s",
470 ftdi_get_error_string(&sigma->ftdic));
474 /* Force the FPGA to reboot. */
475 sigma_write(suicide, sizeof(suicide), sigma);
476 sigma_write(suicide, sizeof(suicide), sigma);
477 sigma_write(suicide, sizeof(suicide), sigma);
478 sigma_write(suicide, sizeof(suicide), sigma);
480 /* Prepare to upload firmware (FPGA specific). */
481 sigma_write(init, sizeof(init), sigma);
483 ftdi_usb_purge_buffers(&sigma->ftdic);
485 /* Wait until the FPGA asserts INIT_B. */
487 ret = sigma_read(result, 1, sigma);
488 if (result[0] & 0x20)
492 /* Prepare firmware. */
493 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
494 firmware_files[firmware_idx]);
496 if ((ret = bin2bitbang(firmware_path, &buf, &buf_size)) != SR_OK) {
497 sr_warn("An error occured while reading the firmware: %s",
502 /* Upload firmare. */
503 sigma_write(buf, buf_size, sigma);
507 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) {
508 sr_warn("ftdi_set_bitmode failed: %s",
509 ftdi_get_error_string(&sigma->ftdic));
513 ftdi_usb_purge_buffers(&sigma->ftdic);
515 /* Discard garbage. */
516 while (1 == sigma_read(&pins, 1, sigma))
519 /* Initialize the logic analyzer mode. */
520 sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma);
522 /* Expect a 3 byte reply. */
523 ret = sigma_read(result, 3, sigma);
525 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
526 sr_warn("Configuration failed. Invalid reply received.");
530 sigma->cur_firmware = firmware_idx;
535 static int hw_opendev(int device_index)
537 struct sr_device_instance *sdi;
541 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
546 /* Make sure it's an ASIX SIGMA. */
547 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
548 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
550 sr_warn("ftdi_usb_open failed: %s",
551 ftdi_get_error_string(&sigma->ftdic));
556 sdi->status = SR_ST_ACTIVE;
561 static int set_samplerate(struct sr_device_instance *sdi,
565 struct sigma *sigma = sdi->priv;
567 for (i = 0; supported_samplerates[i]; i++) {
568 if (supported_samplerates[i] == samplerate)
571 if (supported_samplerates[i] == 0)
572 return SR_ERR_SAMPLERATE;
574 if (samplerate <= SR_MHZ(50)) {
575 ret = upload_firmware(0, sigma);
576 sigma->num_probes = 16;
578 if (samplerate == SR_MHZ(100)) {
579 ret = upload_firmware(1, sigma);
580 sigma->num_probes = 8;
582 else if (samplerate == SR_MHZ(200)) {
583 ret = upload_firmware(2, sigma);
584 sigma->num_probes = 4;
587 sigma->cur_samplerate = samplerate;
588 sigma->samples_per_event = 16 / sigma->num_probes;
589 sigma->state.state = SIGMA_IDLE;
591 sr_info("Firmware uploaded");
597 * In 100 and 200 MHz mode, only a single pin rising/falling can be
598 * set as trigger. In other modes, two rising/falling triggers can be set,
599 * in addition to value/mask trigger for any number of probes.
601 * The Sigma supports complex triggers using boolean expressions, but this
602 * has not been implemented yet.
604 static int configure_probes(struct sr_device_instance *sdi, GSList *probes)
606 struct sigma *sigma = sdi->priv;
607 struct sr_probe *probe;
612 memset(&sigma->trigger, 0, sizeof(struct sigma_trigger));
614 for (l = probes; l; l = l->next) {
615 probe = (struct sr_probe *)l->data;
616 probebit = 1 << (probe->index - 1);
618 if (!probe->enabled || !probe->trigger)
621 if (sigma->cur_samplerate >= SR_MHZ(100)) {
622 /* Fast trigger support. */
624 sr_warn("ASIX SIGMA only supports a single "
625 "pin trigger in 100 and 200MHz mode.");
628 if (probe->trigger[0] == 'f')
629 sigma->trigger.fallingmask |= probebit;
630 else if (probe->trigger[0] == 'r')
631 sigma->trigger.risingmask |= probebit;
633 sr_warn("ASIX SIGMA only supports "
634 "rising/falling trigger in 100 "
641 /* Simple trigger support (event). */
642 if (probe->trigger[0] == '1') {
643 sigma->trigger.simplevalue |= probebit;
644 sigma->trigger.simplemask |= probebit;
646 else if (probe->trigger[0] == '0') {
647 sigma->trigger.simplevalue &= ~probebit;
648 sigma->trigger.simplemask |= probebit;
650 else if (probe->trigger[0] == 'f') {
651 sigma->trigger.fallingmask |= probebit;
654 else if (probe->trigger[0] == 'r') {
655 sigma->trigger.risingmask |= probebit;
660 * Actually, Sigma supports 2 rising/falling triggers,
661 * but they are ORed and the current trigger syntax
662 * does not permit ORed triggers.
664 if (trigger_set > 1) {
665 sr_warn("ASIX SIGMA only supports 1 rising/"
666 "falling triggers.");
672 sigma->use_triggers = 1;
678 static int hw_closedev(int device_index)
680 struct sr_device_instance *sdi;
683 if (!(sdi = sr_get_device_instance(device_instances, device_index))) {
684 sr_err("asix: %s: sdi was NULL", __func__);
685 return SR_ERR; /* TODO: SR_ERR_ARG? */
688 if (!(sigma = sdi->priv)) {
689 sr_err("asix: %s: sdi->priv was NULL", __func__);
690 return SR_ERR; /* TODO: SR_ERR_ARG? */
694 if (sdi->status == SR_ST_ACTIVE)
695 ftdi_usb_close(&sigma->ftdic);
697 sdi->status = SR_ST_INACTIVE;
702 static void hw_cleanup(void)
705 struct sr_device_instance *sdi;
707 /* Properly close all devices. */
708 for (l = device_instances; l; l = l->next) {
710 if (sdi->priv != NULL)
712 sr_device_instance_free(sdi);
714 g_slist_free(device_instances);
715 device_instances = NULL;
718 static void *hw_get_device_info(int device_index, int device_info_id)
720 struct sr_device_instance *sdi;
724 if (!(sdi = sr_get_device_instance(device_instances, device_index))) {
725 fprintf(stderr, "It's NULL.\n");
731 switch (device_info_id) {
735 case SR_DI_NUM_PROBES:
736 info = GINT_TO_POINTER(16);
738 case SR_DI_SAMPLERATES:
741 case SR_DI_TRIGGER_TYPES:
742 info = (char *)TRIGGER_TYPES;
744 case SR_DI_CUR_SAMPLERATE:
745 info = &sigma->cur_samplerate;
752 static int hw_get_status(int device_index)
754 struct sr_device_instance *sdi;
756 sdi = sr_get_device_instance(device_instances, device_index);
760 return SR_ST_NOT_FOUND;
763 static int *hw_get_capabilities(void)
768 static int hw_set_configuration(int device_index, int capability, void *value)
770 struct sr_device_instance *sdi;
774 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
779 if (capability == SR_HWCAP_SAMPLERATE) {
780 ret = set_samplerate(sdi, *(uint64_t*) value);
781 } else if (capability == SR_HWCAP_PROBECONFIG) {
782 ret = configure_probes(sdi, value);
783 } else if (capability == SR_HWCAP_LIMIT_MSEC) {
784 sigma->limit_msec = *(uint64_t*) value;
785 if (sigma->limit_msec > 0)
789 } else if (capability == SR_HWCAP_CAPTURE_RATIO) {
790 sigma->capture_ratio = *(uint64_t*) value;
791 if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100)
802 /* Software trigger to determine exact trigger position. */
803 static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
804 struct sigma_trigger *t)
808 for (i = 0; i < 8; ++i) {
810 last_sample = samples[i-1];
812 /* Simple triggers. */
813 if ((samples[i] & t->simplemask) != t->simplevalue)
817 if ((last_sample & t->risingmask) != 0 || (samples[i] &
818 t->risingmask) != t->risingmask)
822 if ((last_sample & t->fallingmask) != t->fallingmask ||
823 (samples[i] & t->fallingmask) != 0)
829 /* If we did not match, return original trigger pos. */
834 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
835 * Each event is 20ns apart, and can contain multiple samples.
837 * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart.
838 * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart.
839 * For 50 MHz and below, events contain one sample for each channel,
840 * spread 20 ns apart.
842 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
843 uint16_t *lastsample, int triggerpos,
844 uint16_t limit_chunk, void *user_data)
846 struct sr_device_instance *sdi = user_data;
847 struct sigma *sigma = sdi->priv;
849 uint16_t samples[65536 * sigma->samples_per_event];
850 struct sr_datafeed_packet packet;
851 int i, j, k, l, numpad, tosend;
852 size_t n = 0, sent = 0;
853 int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event;
858 /* Check if trigger is in this chunk. */
859 if (triggerpos != -1) {
860 if (sigma->cur_samplerate <= SR_MHZ(50))
861 triggerpos -= EVENTS_PER_CLUSTER - 1;
866 /* Find in which cluster the trigger occured. */
867 triggerts = triggerpos / 7;
871 for (i = 0; i < 64; ++i) {
872 ts = *(uint16_t *) &buf[i * 16];
873 tsdiff = ts - *lastts;
876 /* Decode partial chunk. */
877 if (limit_chunk && ts > limit_chunk)
880 /* Pad last sample up to current point. */
881 numpad = tsdiff * sigma->samples_per_event - clustersize;
883 for (j = 0; j < numpad; ++j)
884 samples[j] = *lastsample;
889 /* Send samples between previous and this timestamp to sigrok. */
892 tosend = MIN(2048, n - sent);
894 packet.type = SR_DF_LOGIC;
895 packet.length = tosend * sizeof(uint16_t);
897 packet.payload = samples + sent;
898 sr_session_bus(sigma->session_id, &packet);
904 event = (uint16_t *) &buf[i * 16 + 2];
907 /* For each event in cluster. */
908 for (j = 0; j < 7; ++j) {
910 /* For each sample in event. */
911 for (k = 0; k < sigma->samples_per_event; ++k) {
914 /* For each probe. */
915 for (l = 0; l < sigma->num_probes; ++l)
916 cur_sample |= (!!(event[j] & (1 << (l *
917 sigma->samples_per_event
921 samples[n++] = cur_sample;
925 /* Send data up to trigger point (if triggered). */
927 if (i == triggerts) {
929 * Trigger is not always accurate to sample because of
930 * pipeline delay. However, it always triggers before
931 * the actual event. We therefore look at the next
932 * samples to pinpoint the exact position of the trigger.
934 tosend = get_trigger_offset(samples, *lastsample,
938 packet.type = SR_DF_LOGIC;
939 packet.length = tosend * sizeof(uint16_t);
941 packet.payload = samples;
942 sr_session_bus(sigma->session_id, &packet);
947 /* Only send trigger if explicitly enabled. */
948 if (sigma->use_triggers) {
949 packet.type = SR_DF_TRIGGER;
952 sr_session_bus(sigma->session_id, &packet);
956 /* Send rest of the chunk to sigrok. */
960 packet.type = SR_DF_LOGIC;
961 packet.length = tosend * sizeof(uint16_t);
963 packet.payload = samples + sent;
964 sr_session_bus(sigma->session_id, &packet);
967 *lastsample = samples[n - 1];
973 static int receive_data(int fd, int revents, void *user_data)
975 struct sr_device_instance *sdi = user_data;
976 struct sigma *sigma = sdi->priv;
977 struct sr_datafeed_packet packet;
978 const int chunks_per_read = 32;
979 unsigned char buf[chunks_per_read * CHUNK_SIZE];
980 int bufsz, numchunks, i, newchunks;
981 uint64_t running_msec;
987 numchunks = (sigma->state.stoppos + 511) / 512;
989 if (sigma->state.state == SIGMA_IDLE)
992 if (sigma->state.state == SIGMA_CAPTURE) {
994 /* Check if the timer has expired, or memory is full. */
995 gettimeofday(&tv, 0);
996 running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 +
997 (tv.tv_usec - sigma->start_tv.tv_usec) / 1000;
999 if (running_msec < sigma->limit_msec && numchunks < 32767)
1002 hw_stop_acquisition(sdi->index, user_data);
1006 } else if (sigma->state.state == SIGMA_DOWNLOAD) {
1007 if (sigma->state.chunks_downloaded >= numchunks) {
1008 /* End of samples. */
1009 packet.type = SR_DF_END;
1011 sr_session_bus(sigma->session_id, &packet);
1013 sigma->state.state = SIGMA_IDLE;
1018 newchunks = MIN(chunks_per_read,
1019 numchunks - sigma->state.chunks_downloaded);
1021 sr_info("Downloading sample data: %.0f %%",
1022 100.0 * sigma->state.chunks_downloaded / numchunks);
1024 bufsz = sigma_read_dram(sigma->state.chunks_downloaded,
1025 newchunks, buf, sigma);
1027 /* Find first ts. */
1028 if (sigma->state.chunks_downloaded == 0) {
1029 sigma->state.lastts = *(uint16_t *) buf - 1;
1030 sigma->state.lastsample = 0;
1033 /* Decode chunks and send them to sigrok. */
1034 for (i = 0; i < newchunks; ++i) {
1035 int limit_chunk = 0;
1037 /* The last chunk may potentially be only in part. */
1038 if (sigma->state.chunks_downloaded == numchunks - 1)
1040 /* Find the last valid timestamp */
1041 limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts;
1044 if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk)
1045 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1046 &sigma->state.lastts,
1047 &sigma->state.lastsample,
1048 sigma->state.triggerpos & 0x1ff,
1049 limit_chunk, user_data);
1051 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1052 &sigma->state.lastts,
1053 &sigma->state.lastsample,
1054 -1, limit_chunk, user_data);
1056 ++sigma->state.chunks_downloaded;
1063 /* Build a LUT entry used by the trigger functions. */
1064 static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
1068 /* For each quad probe. */
1069 for (i = 0; i < 4; ++i) {
1072 /* For each bit in LUT. */
1073 for (j = 0; j < 16; ++j)
1075 /* For each probe in quad. */
1076 for (k = 0; k < 4; ++k) {
1077 bit = 1 << (i * 4 + k);
1079 /* Set bit in entry */
1081 ((!(value & bit)) !=
1083 entry[i] &= ~(1 << j);
1088 /* Add a logical function to LUT mask. */
1089 static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
1090 int index, int neg, uint16_t *mask)
1093 int x[2][2], tmp, a, b, aset, bset, rset;
1095 memset(x, 0, 4 * sizeof(int));
1097 /* Trigger detect condition. */
1127 case OP_NOTRISEFALL:
1133 /* Transpose if neg is set. */
1135 for (i = 0; i < 2; ++i)
1136 for (j = 0; j < 2; ++j) {
1138 x[i][j] = x[1-i][1-j];
1143 /* Update mask with function. */
1144 for (i = 0; i < 16; ++i) {
1145 a = (i >> (2 * index + 0)) & 1;
1146 b = (i >> (2 * index + 1)) & 1;
1148 aset = (*mask >> i) & 1;
1151 if (func == FUNC_AND || func == FUNC_NAND)
1153 else if (func == FUNC_OR || func == FUNC_NOR)
1155 else if (func == FUNC_XOR || func == FUNC_NXOR)
1158 if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
1169 * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
1170 * simple pin change and state triggers. Only two transitions (rise/fall) can be
1171 * set at any time, but a full mask and value can be set (0/1).
1173 static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma)
1176 uint16_t masks[2] = { 0, 0 };
1178 memset(lut, 0, sizeof(struct triggerlut));
1180 /* Contant for simple triggers. */
1183 /* Value/mask trigger support. */
1184 build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask,
1187 /* Rise/fall trigger support. */
1188 for (i = 0, j = 0; i < 16; ++i) {
1189 if (sigma->trigger.risingmask & (1 << i) ||
1190 sigma->trigger.fallingmask & (1 << i))
1191 masks[j++] = 1 << i;
1194 build_lut_entry(masks[0], masks[0], lut->m0d);
1195 build_lut_entry(masks[1], masks[1], lut->m1d);
1197 /* Add glue logic */
1198 if (masks[0] || masks[1]) {
1199 /* Transition trigger. */
1200 if (masks[0] & sigma->trigger.risingmask)
1201 add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
1202 if (masks[0] & sigma->trigger.fallingmask)
1203 add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
1204 if (masks[1] & sigma->trigger.risingmask)
1205 add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
1206 if (masks[1] & sigma->trigger.fallingmask)
1207 add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
1209 /* Only value/mask trigger. */
1213 /* Triggertype: event. */
1214 lut->params.selres = 3;
1219 static int hw_start_acquisition(int device_index, gpointer session_device_id)
1221 struct sr_device_instance *sdi;
1222 struct sigma *sigma;
1223 struct sr_datafeed_packet packet;
1224 struct sr_datafeed_header header;
1225 struct clockselect_50 clockselect;
1226 int frac, triggerpin, ret;
1227 uint8_t triggerselect;
1228 struct triggerinout triggerinout_conf;
1229 struct triggerlut lut;
1231 session_device_id = session_device_id;
1233 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1238 /* If the samplerate has not been set, default to 200 KHz. */
1239 if (sigma->cur_firmware == -1) {
1240 if ((ret = set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
1244 /* Enter trigger programming mode. */
1245 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma);
1247 /* 100 and 200 MHz mode. */
1248 if (sigma->cur_samplerate >= SR_MHZ(100)) {
1249 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma);
1251 /* Find which pin to trigger on from mask. */
1252 for (triggerpin = 0; triggerpin < 8; ++triggerpin)
1253 if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) &
1257 /* Set trigger pin and light LED on trigger. */
1258 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
1260 /* Default rising edge. */
1261 if (sigma->trigger.fallingmask)
1262 triggerselect |= 1 << 3;
1264 /* All other modes. */
1265 } else if (sigma->cur_samplerate <= SR_MHZ(50)) {
1266 build_basic_trigger(&lut, sigma);
1268 sigma_write_trigger_lut(&lut, sigma);
1270 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
1273 /* Setup trigger in and out pins to default values. */
1274 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
1275 triggerinout_conf.trgout_bytrigger = 1;
1276 triggerinout_conf.trgout_enable = 1;
1278 sigma_write_register(WRITE_TRIGGER_OPTION,
1279 (uint8_t *) &triggerinout_conf,
1280 sizeof(struct triggerinout), sigma);
1282 /* Go back to normal mode. */
1283 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma);
1285 /* Set clock select register. */
1286 if (sigma->cur_samplerate == SR_MHZ(200))
1287 /* Enable 4 probes. */
1288 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma);
1289 else if (sigma->cur_samplerate == SR_MHZ(100))
1290 /* Enable 8 probes. */
1291 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma);
1294 * 50 MHz mode (or fraction thereof). Any fraction down to
1295 * 50 MHz / 256 can be used, but is not supported by sigrok API.
1297 frac = SR_MHZ(50) / sigma->cur_samplerate - 1;
1299 clockselect.async = 0;
1300 clockselect.fraction = frac;
1301 clockselect.disabled_probes = 0;
1303 sigma_write_register(WRITE_CLOCK_SELECT,
1304 (uint8_t *) &clockselect,
1305 sizeof(clockselect), sigma);
1308 /* Setup maximum post trigger time. */
1309 sigma_set_register(WRITE_POST_TRIGGER,
1310 (sigma->capture_ratio * 255) / 100, sigma);
1312 /* Start acqusition. */
1313 gettimeofday(&sigma->start_tv, 0);
1314 sigma_set_register(WRITE_MODE, 0x0d, sigma);
1316 sigma->session_id = session_device_id;
1318 /* Send header packet to the session bus. */
1319 packet.type = SR_DF_HEADER;
1320 packet.length = sizeof(struct sr_datafeed_header);
1321 packet.payload = &header;
1322 header.feed_version = 1;
1323 gettimeofday(&header.starttime, NULL);
1324 header.samplerate = sigma->cur_samplerate;
1325 header.protocol_id = SR_PROTO_RAW;
1326 header.num_logic_probes = sigma->num_probes;
1327 header.num_analog_probes = 0;
1328 sr_session_bus(session_device_id, &packet);
1330 /* Add capture source. */
1331 sr_source_add(0, G_IO_IN, 10, receive_data, sdi);
1333 sigma->state.state = SIGMA_CAPTURE;
1338 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
1340 struct sr_device_instance *sdi;
1341 struct sigma *sigma;
1344 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1349 session_device_id = session_device_id;
1351 /* Stop acquisition. */
1352 sigma_set_register(WRITE_MODE, 0x11, sigma);
1354 /* Set SDRAM Read Enable. */
1355 sigma_set_register(WRITE_MODE, 0x02, sigma);
1357 /* Get the current position. */
1358 sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma);
1360 /* Check if trigger has fired. */
1361 modestatus = sigma_get_register(READ_MODE, sigma);
1362 if (modestatus & 0x20) {
1363 sigma->state.triggerchunk = sigma->state.triggerpos / 512;
1366 sigma->state.triggerchunk = -1;
1368 sigma->state.chunks_downloaded = 0;
1370 sigma->state.state = SIGMA_DOWNLOAD;
1373 struct sr_device_plugin asix_sigma_plugin_info = {
1374 .name = "asix-sigma",
1375 .longname = "ASIX SIGMA",
1378 .cleanup = hw_cleanup,
1379 .opendev = hw_opendev,
1380 .closedev = hw_closedev,
1381 .get_device_info = hw_get_device_info,
1382 .get_status = hw_get_status,
1383 .get_capabilities = hw_get_capabilities,
1384 .set_configuration = hw_set_configuration,
1385 .start_acquisition = hw_start_acquisition,
1386 .stop_acquisition = hw_stop_acquisition,