2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX SIGMA Logic Analyzer Driver
28 #include <glib/gstdio.h>
33 #include "sigrok-internal.h"
34 #include "asix-sigma.h"
36 #define USB_VENDOR 0xa600
37 #define USB_PRODUCT 0xa000
38 #define USB_DESCRIPTION "ASIX SIGMA"
39 #define USB_VENDOR_NAME "ASIX"
40 #define USB_MODEL_NAME "SIGMA"
41 #define USB_MODEL_VERSION ""
42 #define TRIGGER_TYPES "rf10"
45 static GSList *device_instances = NULL;
47 static uint64_t supported_samplerates[] = {
61 static const char* probe_names[NUM_PROBES + 1] = {
81 static struct sr_samplerates samplerates = {
85 supported_samplerates,
88 static int capabilities[] = {
89 SR_HWCAP_LOGIC_ANALYZER,
91 SR_HWCAP_CAPTURE_RATIO,
98 /* Force the FPGA to reboot. */
99 static uint8_t suicide[] = {
100 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
103 /* Prepare to upload firmware (FPGA specific). */
104 static uint8_t init[] = {
105 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
108 /* Initialize the logic analyzer mode. */
109 static uint8_t logic_mode_start[] = {
110 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
111 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
114 static const char *firmware_files[] = {
115 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
116 "asix-sigma-100.fw", /* 100 MHz */
117 "asix-sigma-200.fw", /* 200 MHz */
118 "asix-sigma-50sync.fw", /* Synchronous clock from pin */
119 "asix-sigma-phasor.fw", /* Frequency counter */
122 static void hw_stop_acquisition(int device_index, gpointer session_data);
124 static int sigma_read(void *buf, size_t size, struct sigma *sigma)
128 ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size);
130 sr_warn("ftdi_read_data failed: %s",
131 ftdi_get_error_string(&sigma->ftdic));
137 static int sigma_write(void *buf, size_t size, struct sigma *sigma)
141 ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size);
143 sr_warn("ftdi_write_data failed: %s",
144 ftdi_get_error_string(&sigma->ftdic));
145 } else if ((size_t) ret != size) {
146 sr_warn("ftdi_write_data did not complete write\n");
152 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
156 uint8_t buf[len + 2];
159 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
160 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
162 for (i = 0; i < len; ++i) {
163 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
164 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
167 return sigma_write(buf, idx, sigma);
170 static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma)
172 return sigma_write_register(reg, &value, 1, sigma);
175 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len,
180 buf[0] = REG_ADDR_LOW | (reg & 0xf);
181 buf[1] = REG_ADDR_HIGH | (reg >> 4);
182 buf[2] = REG_READ_ADDR;
184 sigma_write(buf, sizeof(buf), sigma);
186 return sigma_read(data, len, sigma);
189 static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma)
193 if (1 != sigma_read_register(reg, &value, 1, sigma)) {
194 sr_warn("sigma_get_register: 1 byte expected");
201 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos,
205 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
207 REG_READ_ADDR | NEXT_REG,
208 REG_READ_ADDR | NEXT_REG,
209 REG_READ_ADDR | NEXT_REG,
210 REG_READ_ADDR | NEXT_REG,
211 REG_READ_ADDR | NEXT_REG,
212 REG_READ_ADDR | NEXT_REG,
216 sigma_write(buf, sizeof(buf), sigma);
218 sigma_read(result, sizeof(result), sigma);
220 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
221 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
223 /* Not really sure why this must be done, but according to spec. */
224 if ((--*stoppos & 0x1ff) == 0x1ff)
227 if ((*--triggerpos & 0x1ff) == 0x1ff)
233 static int sigma_read_dram(uint16_t startchunk, size_t numchunks,
234 uint8_t *data, struct sigma *sigma)
240 /* Send the startchunk. Index start with 1. */
241 buf[0] = startchunk >> 8;
242 buf[1] = startchunk & 0xff;
243 sigma_write_register(WRITE_MEMROW, buf, 2, sigma);
246 buf[idx++] = REG_DRAM_BLOCK;
247 buf[idx++] = REG_DRAM_WAIT_ACK;
249 for (i = 0; i < numchunks; ++i) {
250 /* Alternate bit to copy from DRAM to cache. */
251 if (i != (numchunks - 1))
252 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
254 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
256 if (i != (numchunks - 1))
257 buf[idx++] = REG_DRAM_WAIT_ACK;
260 sigma_write(buf, idx, sigma);
262 return sigma_read(data, numchunks * CHUNK_SIZE, sigma);
265 /* Upload trigger look-up tables to Sigma. */
266 static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma)
272 /* Transpose the table and send to Sigma. */
273 for (i = 0; i < 16; ++i) {
278 if (lut->m2d[0] & bit)
280 if (lut->m2d[1] & bit)
282 if (lut->m2d[2] & bit)
284 if (lut->m2d[3] & bit)
294 if (lut->m0d[0] & bit)
296 if (lut->m0d[1] & bit)
298 if (lut->m0d[2] & bit)
300 if (lut->m0d[3] & bit)
303 if (lut->m1d[0] & bit)
305 if (lut->m1d[1] & bit)
307 if (lut->m1d[2] & bit)
309 if (lut->m1d[3] & bit)
312 sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
314 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma);
317 /* Send the parameters */
318 sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
319 sizeof(lut->params), sigma);
324 /* Generate the bitbang stream for programming the FPGA. */
325 static int bin2bitbang(const char *filename,
326 unsigned char **buf, size_t *buf_size)
330 unsigned long offset = 0;
332 uint8_t *compressed_buf, *firmware;
333 uLongf csize, fwsize;
334 const int buffer_size = 65536;
337 uint32_t imm = 0x3f6df2ab;
339 f = g_fopen(filename, "rb");
341 sr_warn("g_fopen(\"%s\", \"rb\")", filename);
345 if (-1 == fseek(f, 0, SEEK_END)) {
346 sr_warn("fseek on %s failed", filename);
351 file_size = ftell(f);
353 fseek(f, 0, SEEK_SET);
355 if (!(compressed_buf = g_try_malloc(file_size))) {
356 sr_err("sigma: %s: compressed_buf malloc failed", __func__);
358 return SR_ERR_MALLOC;
361 if (!(firmware = g_try_malloc(buffer_size))) {
362 sr_err("sigma: %s: firmware malloc failed", __func__);
364 g_free(compressed_buf);
365 return SR_ERR_MALLOC;
369 while ((c = getc(f)) != EOF) {
370 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
371 compressed_buf[csize++] = c ^ imm;
375 fwsize = buffer_size;
376 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
378 g_free(compressed_buf);
380 sr_warn("Could not unpack Sigma firmware. (Error %d)\n", ret);
384 g_free(compressed_buf);
386 *buf_size = fwsize * 2 * 8;
388 *buf = p = (unsigned char *)g_try_malloc(*buf_size);
390 sr_err("sigma: %s: buf/p malloc failed", __func__);
391 g_free(compressed_buf);
393 return SR_ERR_MALLOC;
396 for (i = 0; i < fwsize; ++i) {
397 for (bit = 7; bit >= 0; --bit) {
398 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
399 p[offset++] = v | 0x01;
406 if (offset != *buf_size) {
408 sr_warn("Error reading firmware %s "
409 "offset=%ld, file_size=%ld, buf_size=%zd\n",
410 filename, offset, file_size, *buf_size);
418 static int hw_init(const char *deviceinfo)
420 struct sr_device_instance *sdi;
423 /* Avoid compiler warnings. */
426 if (!(sigma = g_try_malloc(sizeof(struct sigma)))) {
427 sr_err("sigma: %s: sigma malloc failed", __func__);
428 return 0; /* FIXME: Should be SR_ERR_MALLOC. */
431 ftdi_init(&sigma->ftdic);
433 /* Look for SIGMAs. */
434 if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT,
435 USB_DESCRIPTION, NULL) < 0)
438 sigma->cur_samplerate = 0;
439 sigma->period_ps = 0;
440 sigma->limit_msec = 0;
441 sigma->cur_firmware = -1;
442 sigma->num_probes = 0;
443 sigma->samples_per_event = 0;
444 sigma->capture_ratio = 50;
445 sigma->use_triggers = 0;
447 /* Register SIGMA device. */
448 sdi = sr_device_instance_new(0, SR_ST_INITIALIZING,
449 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
455 device_instances = g_slist_append(device_instances, sdi);
457 /* We will open the device again when we need it. */
458 ftdi_usb_close(&sigma->ftdic);
466 static int upload_firmware(int firmware_idx, struct sigma *sigma)
472 unsigned char result[32];
473 char firmware_path[128];
475 /* Make sure it's an ASIX SIGMA. */
476 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
477 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
478 sr_warn("ftdi_usb_open failed: %s",
479 ftdi_get_error_string(&sigma->ftdic));
483 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
484 sr_warn("ftdi_set_bitmode failed: %s",
485 ftdi_get_error_string(&sigma->ftdic));
489 /* Four times the speed of sigmalogan - Works well. */
490 if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) {
491 sr_warn("ftdi_set_baudrate failed: %s",
492 ftdi_get_error_string(&sigma->ftdic));
496 /* Force the FPGA to reboot. */
497 sigma_write(suicide, sizeof(suicide), sigma);
498 sigma_write(suicide, sizeof(suicide), sigma);
499 sigma_write(suicide, sizeof(suicide), sigma);
500 sigma_write(suicide, sizeof(suicide), sigma);
502 /* Prepare to upload firmware (FPGA specific). */
503 sigma_write(init, sizeof(init), sigma);
505 ftdi_usb_purge_buffers(&sigma->ftdic);
507 /* Wait until the FPGA asserts INIT_B. */
509 ret = sigma_read(result, 1, sigma);
510 if (result[0] & 0x20)
514 /* Prepare firmware. */
515 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
516 firmware_files[firmware_idx]);
518 if ((ret = bin2bitbang(firmware_path, &buf, &buf_size)) != SR_OK) {
519 sr_warn("An error occured while reading the firmware: %s",
524 /* Upload firmare. */
525 sigma_write(buf, buf_size, sigma);
529 if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) {
530 sr_warn("ftdi_set_bitmode failed: %s",
531 ftdi_get_error_string(&sigma->ftdic));
535 ftdi_usb_purge_buffers(&sigma->ftdic);
537 /* Discard garbage. */
538 while (1 == sigma_read(&pins, 1, sigma))
541 /* Initialize the logic analyzer mode. */
542 sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma);
544 /* Expect a 3 byte reply. */
545 ret = sigma_read(result, 3, sigma);
547 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
548 sr_warn("Configuration failed. Invalid reply received.");
552 sigma->cur_firmware = firmware_idx;
557 static int hw_opendev(int device_index)
559 struct sr_device_instance *sdi;
563 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
568 /* Make sure it's an ASIX SIGMA. */
569 if ((ret = ftdi_usb_open_desc(&sigma->ftdic,
570 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
572 sr_warn("ftdi_usb_open failed: %s",
573 ftdi_get_error_string(&sigma->ftdic));
578 sdi->status = SR_ST_ACTIVE;
583 static int set_samplerate(struct sr_device_instance *sdi,
587 struct sigma *sigma = sdi->priv;
589 for (i = 0; supported_samplerates[i]; i++) {
590 if (supported_samplerates[i] == samplerate)
593 if (supported_samplerates[i] == 0)
594 return SR_ERR_SAMPLERATE;
596 if (samplerate <= SR_MHZ(50)) {
597 ret = upload_firmware(0, sigma);
598 sigma->num_probes = 16;
600 if (samplerate == SR_MHZ(100)) {
601 ret = upload_firmware(1, sigma);
602 sigma->num_probes = 8;
604 else if (samplerate == SR_MHZ(200)) {
605 ret = upload_firmware(2, sigma);
606 sigma->num_probes = 4;
609 sigma->cur_samplerate = samplerate;
610 sigma->period_ps = 1000000000000 / samplerate;
611 sigma->samples_per_event = 16 / sigma->num_probes;
612 sigma->state.state = SIGMA_IDLE;
614 sr_info("Firmware uploaded");
620 * In 100 and 200 MHz mode, only a single pin rising/falling can be
621 * set as trigger. In other modes, two rising/falling triggers can be set,
622 * in addition to value/mask trigger for any number of probes.
624 * The Sigma supports complex triggers using boolean expressions, but this
625 * has not been implemented yet.
627 static int configure_probes(struct sr_device_instance *sdi, GSList *probes)
629 struct sigma *sigma = sdi->priv;
630 struct sr_probe *probe;
635 memset(&sigma->trigger, 0, sizeof(struct sigma_trigger));
637 for (l = probes; l; l = l->next) {
638 probe = (struct sr_probe *)l->data;
639 probebit = 1 << (probe->index - 1);
641 if (!probe->enabled || !probe->trigger)
644 if (sigma->cur_samplerate >= SR_MHZ(100)) {
645 /* Fast trigger support. */
647 sr_warn("ASIX SIGMA only supports a single "
648 "pin trigger in 100 and 200MHz mode.");
651 if (probe->trigger[0] == 'f')
652 sigma->trigger.fallingmask |= probebit;
653 else if (probe->trigger[0] == 'r')
654 sigma->trigger.risingmask |= probebit;
656 sr_warn("ASIX SIGMA only supports "
657 "rising/falling trigger in 100 "
664 /* Simple trigger support (event). */
665 if (probe->trigger[0] == '1') {
666 sigma->trigger.simplevalue |= probebit;
667 sigma->trigger.simplemask |= probebit;
669 else if (probe->trigger[0] == '0') {
670 sigma->trigger.simplevalue &= ~probebit;
671 sigma->trigger.simplemask |= probebit;
673 else if (probe->trigger[0] == 'f') {
674 sigma->trigger.fallingmask |= probebit;
677 else if (probe->trigger[0] == 'r') {
678 sigma->trigger.risingmask |= probebit;
683 * Actually, Sigma supports 2 rising/falling triggers,
684 * but they are ORed and the current trigger syntax
685 * does not permit ORed triggers.
687 if (trigger_set > 1) {
688 sr_warn("ASIX SIGMA only supports 1 rising/"
689 "falling triggers.");
695 sigma->use_triggers = 1;
701 static int hw_closedev(int device_index)
703 struct sr_device_instance *sdi;
706 if (!(sdi = sr_get_device_instance(device_instances, device_index))) {
707 sr_err("sigma: %s: sdi was NULL", __func__);
708 return SR_ERR; /* TODO: SR_ERR_ARG? */
711 if (!(sigma = sdi->priv)) {
712 sr_err("sigma: %s: sdi->priv was NULL", __func__);
713 return SR_ERR; /* TODO: SR_ERR_ARG? */
717 if (sdi->status == SR_ST_ACTIVE)
718 ftdi_usb_close(&sigma->ftdic);
720 sdi->status = SR_ST_INACTIVE;
725 static void hw_cleanup(void)
728 struct sr_device_instance *sdi;
730 /* Properly close all devices. */
731 for (l = device_instances; l; l = l->next) {
733 if (sdi->priv != NULL)
735 sr_device_instance_free(sdi);
737 g_slist_free(device_instances);
738 device_instances = NULL;
741 static void *hw_get_device_info(int device_index, int device_info_id)
743 struct sr_device_instance *sdi;
747 if (!(sdi = sr_get_device_instance(device_instances, device_index))) {
748 sr_err("It's NULL.\n");
754 switch (device_info_id) {
758 case SR_DI_NUM_PROBES:
759 info = GINT_TO_POINTER(NUM_PROBES);
761 case SR_DI_PROBE_NAMES:
764 case SR_DI_SAMPLERATES:
767 case SR_DI_TRIGGER_TYPES:
768 info = (char *)TRIGGER_TYPES;
770 case SR_DI_CUR_SAMPLERATE:
771 info = &sigma->cur_samplerate;
778 static int hw_get_status(int device_index)
780 struct sr_device_instance *sdi;
782 sdi = sr_get_device_instance(device_instances, device_index);
786 return SR_ST_NOT_FOUND;
789 static int *hw_get_capabilities(void)
794 static int hw_set_configuration(int device_index, int capability, void *value)
796 struct sr_device_instance *sdi;
800 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
805 if (capability == SR_HWCAP_SAMPLERATE) {
806 ret = set_samplerate(sdi, *(uint64_t*) value);
807 } else if (capability == SR_HWCAP_PROBECONFIG) {
808 ret = configure_probes(sdi, value);
809 } else if (capability == SR_HWCAP_LIMIT_MSEC) {
810 sigma->limit_msec = *(uint64_t*) value;
811 if (sigma->limit_msec > 0)
815 } else if (capability == SR_HWCAP_CAPTURE_RATIO) {
816 sigma->capture_ratio = *(uint64_t*) value;
817 if (sigma->capture_ratio < 0 || sigma->capture_ratio > 100)
828 /* Software trigger to determine exact trigger position. */
829 static int get_trigger_offset(uint16_t *samples, uint16_t last_sample,
830 struct sigma_trigger *t)
834 for (i = 0; i < 8; ++i) {
836 last_sample = samples[i-1];
838 /* Simple triggers. */
839 if ((samples[i] & t->simplemask) != t->simplevalue)
843 if ((last_sample & t->risingmask) != 0 || (samples[i] &
844 t->risingmask) != t->risingmask)
848 if ((last_sample & t->fallingmask) != t->fallingmask ||
849 (samples[i] & t->fallingmask) != 0)
855 /* If we did not match, return original trigger pos. */
860 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
861 * Each event is 20ns apart, and can contain multiple samples.
863 * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart.
864 * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart.
865 * For 50 MHz and below, events contain one sample for each channel,
866 * spread 20 ns apart.
868 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
869 uint16_t *lastsample, int triggerpos,
870 uint16_t limit_chunk, void *session_data)
872 struct sr_device_instance *sdi = session_data;
873 struct sigma *sigma = sdi->priv;
875 uint16_t samples[65536 * sigma->samples_per_event];
876 struct sr_datafeed_packet packet;
877 struct sr_datafeed_logic logic;
878 int i, j, k, l, numpad, tosend;
879 size_t n = 0, sent = 0;
880 int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event;
885 /* Check if trigger is in this chunk. */
886 if (triggerpos != -1) {
887 if (sigma->cur_samplerate <= SR_MHZ(50))
888 triggerpos -= EVENTS_PER_CLUSTER - 1;
893 /* Find in which cluster the trigger occured. */
894 triggerts = triggerpos / 7;
898 for (i = 0; i < 64; ++i) {
899 ts = *(uint16_t *) &buf[i * 16];
900 tsdiff = ts - *lastts;
903 /* Decode partial chunk. */
904 if (limit_chunk && ts > limit_chunk)
907 /* Pad last sample up to current point. */
908 numpad = tsdiff * sigma->samples_per_event - clustersize;
910 for (j = 0; j < numpad; ++j)
911 samples[j] = *lastsample;
916 /* Send samples between previous and this timestamp to sigrok. */
919 tosend = MIN(2048, n - sent);
921 packet.type = SR_DF_LOGIC;
922 /* TODO: fill in timeoffset and duration */
923 packet.timeoffset = 0;
925 packet.payload = &logic;
926 logic.length = tosend * sizeof(uint16_t);
928 logic.data = samples + sent;
929 sr_session_bus(sigma->session_id, &packet);
935 event = (uint16_t *) &buf[i * 16 + 2];
938 /* For each event in cluster. */
939 for (j = 0; j < 7; ++j) {
941 /* For each sample in event. */
942 for (k = 0; k < sigma->samples_per_event; ++k) {
945 /* For each probe. */
946 for (l = 0; l < sigma->num_probes; ++l)
947 cur_sample |= (!!(event[j] & (1 << (l *
948 sigma->samples_per_event
952 samples[n++] = cur_sample;
956 /* Send data up to trigger point (if triggered). */
958 if (i == triggerts) {
960 * Trigger is not always accurate to sample because of
961 * pipeline delay. However, it always triggers before
962 * the actual event. We therefore look at the next
963 * samples to pinpoint the exact position of the trigger.
965 tosend = get_trigger_offset(samples, *lastsample,
969 packet.type = SR_DF_LOGIC;
970 /* TODO: fill in timeoffset and duration */
971 packet.timeoffset = 0;
973 packet.payload = &logic;
974 logic.length = tosend * sizeof(uint16_t);
976 logic.data = samples;
977 sr_session_bus(sigma->session_id, &packet);
982 /* Only send trigger if explicitly enabled. */
983 if (sigma->use_triggers) {
984 packet.type = SR_DF_TRIGGER;
985 /* TODO: fill in timeoffset only */
986 packet.timeoffset = 0;
988 sr_session_bus(sigma->session_id, &packet);
992 /* Send rest of the chunk to sigrok. */
996 packet.type = SR_DF_LOGIC;
997 /* TODO: fill in timeoffset and duration */
998 packet.timeoffset = 0;
1000 packet.payload = &logic;
1001 logic.length = tosend * sizeof(uint16_t);
1003 logic.data = samples + sent;
1004 sr_session_bus(sigma->session_id, &packet);
1007 *lastsample = samples[n - 1];
1013 static int receive_data(int fd, int revents, void *session_data)
1015 struct sr_device_instance *sdi = session_data;
1016 struct sigma *sigma = sdi->priv;
1017 struct sr_datafeed_packet packet;
1018 const int chunks_per_read = 32;
1019 unsigned char buf[chunks_per_read * CHUNK_SIZE];
1020 int bufsz, numchunks, i, newchunks;
1021 uint64_t running_msec;
1024 /* Avoid compiler warnings. */
1028 numchunks = (sigma->state.stoppos + 511) / 512;
1030 if (sigma->state.state == SIGMA_IDLE)
1033 if (sigma->state.state == SIGMA_CAPTURE) {
1035 /* Check if the timer has expired, or memory is full. */
1036 gettimeofday(&tv, 0);
1037 running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 +
1038 (tv.tv_usec - sigma->start_tv.tv_usec) / 1000;
1040 if (running_msec < sigma->limit_msec && numchunks < 32767)
1043 hw_stop_acquisition(sdi->index, session_data);
1047 } else if (sigma->state.state == SIGMA_DOWNLOAD) {
1048 if (sigma->state.chunks_downloaded >= numchunks) {
1049 /* End of samples. */
1050 packet.type = SR_DF_END;
1051 sr_session_bus(sigma->session_id, &packet);
1053 sigma->state.state = SIGMA_IDLE;
1058 newchunks = MIN(chunks_per_read,
1059 numchunks - sigma->state.chunks_downloaded);
1061 sr_info("Downloading sample data: %.0f %%",
1062 100.0 * sigma->state.chunks_downloaded / numchunks);
1064 bufsz = sigma_read_dram(sigma->state.chunks_downloaded,
1065 newchunks, buf, sigma);
1066 /* TODO: Check bufsz. For now, just avoid compiler warnings. */
1069 /* Find first ts. */
1070 if (sigma->state.chunks_downloaded == 0) {
1071 sigma->state.lastts = *(uint16_t *) buf - 1;
1072 sigma->state.lastsample = 0;
1075 /* Decode chunks and send them to sigrok. */
1076 for (i = 0; i < newchunks; ++i) {
1077 int limit_chunk = 0;
1079 /* The last chunk may potentially be only in part. */
1080 if (sigma->state.chunks_downloaded == numchunks - 1)
1082 /* Find the last valid timestamp */
1083 limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts;
1086 if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk)
1087 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1088 &sigma->state.lastts,
1089 &sigma->state.lastsample,
1090 sigma->state.triggerpos & 0x1ff,
1091 limit_chunk, session_data);
1093 decode_chunk_ts(buf + (i * CHUNK_SIZE),
1094 &sigma->state.lastts,
1095 &sigma->state.lastsample,
1096 -1, limit_chunk, session_data);
1098 ++sigma->state.chunks_downloaded;
1105 /* Build a LUT entry used by the trigger functions. */
1106 static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry)
1110 /* For each quad probe. */
1111 for (i = 0; i < 4; ++i) {
1114 /* For each bit in LUT. */
1115 for (j = 0; j < 16; ++j)
1117 /* For each probe in quad. */
1118 for (k = 0; k < 4; ++k) {
1119 bit = 1 << (i * 4 + k);
1121 /* Set bit in entry */
1123 ((!(value & bit)) !=
1125 entry[i] &= ~(1 << j);
1130 /* Add a logical function to LUT mask. */
1131 static void add_trigger_function(enum triggerop oper, enum triggerfunc func,
1132 int index, int neg, uint16_t *mask)
1135 int x[2][2], tmp, a, b, aset, bset, rset;
1137 memset(x, 0, 4 * sizeof(int));
1139 /* Trigger detect condition. */
1169 case OP_NOTRISEFALL:
1175 /* Transpose if neg is set. */
1177 for (i = 0; i < 2; ++i)
1178 for (j = 0; j < 2; ++j) {
1180 x[i][j] = x[1-i][1-j];
1185 /* Update mask with function. */
1186 for (i = 0; i < 16; ++i) {
1187 a = (i >> (2 * index + 0)) & 1;
1188 b = (i >> (2 * index + 1)) & 1;
1190 aset = (*mask >> i) & 1;
1193 if (func == FUNC_AND || func == FUNC_NAND)
1195 else if (func == FUNC_OR || func == FUNC_NOR)
1197 else if (func == FUNC_XOR || func == FUNC_NXOR)
1200 if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR)
1211 * Build trigger LUTs used by 50 MHz and lower sample rates for supporting
1212 * simple pin change and state triggers. Only two transitions (rise/fall) can be
1213 * set at any time, but a full mask and value can be set (0/1).
1215 static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma)
1218 uint16_t masks[2] = { 0, 0 };
1220 memset(lut, 0, sizeof(struct triggerlut));
1222 /* Contant for simple triggers. */
1225 /* Value/mask trigger support. */
1226 build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask,
1229 /* Rise/fall trigger support. */
1230 for (i = 0, j = 0; i < 16; ++i) {
1231 if (sigma->trigger.risingmask & (1 << i) ||
1232 sigma->trigger.fallingmask & (1 << i))
1233 masks[j++] = 1 << i;
1236 build_lut_entry(masks[0], masks[0], lut->m0d);
1237 build_lut_entry(masks[1], masks[1], lut->m1d);
1239 /* Add glue logic */
1240 if (masks[0] || masks[1]) {
1241 /* Transition trigger. */
1242 if (masks[0] & sigma->trigger.risingmask)
1243 add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3);
1244 if (masks[0] & sigma->trigger.fallingmask)
1245 add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3);
1246 if (masks[1] & sigma->trigger.risingmask)
1247 add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3);
1248 if (masks[1] & sigma->trigger.fallingmask)
1249 add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3);
1251 /* Only value/mask trigger. */
1255 /* Triggertype: event. */
1256 lut->params.selres = 3;
1261 static int hw_start_acquisition(int device_index, gpointer session_data)
1263 struct sr_device_instance *sdi;
1264 struct sigma *sigma;
1265 struct sr_datafeed_packet packet;
1266 struct sr_datafeed_header header;
1267 struct clockselect_50 clockselect;
1268 int frac, triggerpin, ret;
1269 uint8_t triggerselect;
1270 struct triggerinout triggerinout_conf;
1271 struct triggerlut lut;
1273 /* Avoid compiler warnings. */
1276 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1281 /* If the samplerate has not been set, default to 200 KHz. */
1282 if (sigma->cur_firmware == -1) {
1283 if ((ret = set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
1287 /* Enter trigger programming mode. */
1288 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma);
1290 /* 100 and 200 MHz mode. */
1291 if (sigma->cur_samplerate >= SR_MHZ(100)) {
1292 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma);
1294 /* Find which pin to trigger on from mask. */
1295 for (triggerpin = 0; triggerpin < 8; ++triggerpin)
1296 if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) &
1300 /* Set trigger pin and light LED on trigger. */
1301 triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);
1303 /* Default rising edge. */
1304 if (sigma->trigger.fallingmask)
1305 triggerselect |= 1 << 3;
1307 /* All other modes. */
1308 } else if (sigma->cur_samplerate <= SR_MHZ(50)) {
1309 build_basic_trigger(&lut, sigma);
1311 sigma_write_trigger_lut(&lut, sigma);
1313 triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
1316 /* Setup trigger in and out pins to default values. */
1317 memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
1318 triggerinout_conf.trgout_bytrigger = 1;
1319 triggerinout_conf.trgout_enable = 1;
1321 sigma_write_register(WRITE_TRIGGER_OPTION,
1322 (uint8_t *) &triggerinout_conf,
1323 sizeof(struct triggerinout), sigma);
1325 /* Go back to normal mode. */
1326 sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma);
1328 /* Set clock select register. */
1329 if (sigma->cur_samplerate == SR_MHZ(200))
1330 /* Enable 4 probes. */
1331 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma);
1332 else if (sigma->cur_samplerate == SR_MHZ(100))
1333 /* Enable 8 probes. */
1334 sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma);
1337 * 50 MHz mode (or fraction thereof). Any fraction down to
1338 * 50 MHz / 256 can be used, but is not supported by sigrok API.
1340 frac = SR_MHZ(50) / sigma->cur_samplerate - 1;
1342 clockselect.async = 0;
1343 clockselect.fraction = frac;
1344 clockselect.disabled_probes = 0;
1346 sigma_write_register(WRITE_CLOCK_SELECT,
1347 (uint8_t *) &clockselect,
1348 sizeof(clockselect), sigma);
1351 /* Setup maximum post trigger time. */
1352 sigma_set_register(WRITE_POST_TRIGGER,
1353 (sigma->capture_ratio * 255) / 100, sigma);
1355 /* Start acqusition. */
1356 gettimeofday(&sigma->start_tv, 0);
1357 sigma_set_register(WRITE_MODE, 0x0d, sigma);
1359 sigma->session_id = session_data;
1361 /* Send header packet to the session bus. */
1362 packet.type = SR_DF_HEADER;
1363 packet.payload = &header;
1364 header.feed_version = 1;
1365 gettimeofday(&header.starttime, NULL);
1366 header.samplerate = sigma->cur_samplerate;
1367 header.num_logic_probes = sigma->num_probes;
1368 header.num_analog_probes = 0;
1369 sr_session_bus(session_data, &packet);
1371 /* Add capture source. */
1372 sr_source_add(0, G_IO_IN, 10, receive_data, sdi);
1374 sigma->state.state = SIGMA_CAPTURE;
1379 static void hw_stop_acquisition(int device_index, gpointer session_data)
1381 struct sr_device_instance *sdi;
1382 struct sigma *sigma;
1385 if (!(sdi = sr_get_device_instance(device_instances, device_index)))
1390 /* Avoid compiler warnings. */
1393 /* Stop acquisition. */
1394 sigma_set_register(WRITE_MODE, 0x11, sigma);
1396 /* Set SDRAM Read Enable. */
1397 sigma_set_register(WRITE_MODE, 0x02, sigma);
1399 /* Get the current position. */
1400 sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma);
1402 /* Check if trigger has fired. */
1403 modestatus = sigma_get_register(READ_MODE, sigma);
1404 if (modestatus & 0x20) {
1405 sigma->state.triggerchunk = sigma->state.triggerpos / 512;
1408 sigma->state.triggerchunk = -1;
1410 sigma->state.chunks_downloaded = 0;
1412 sigma->state.state = SIGMA_DOWNLOAD;
1415 struct sr_device_plugin asix_sigma_plugin_info = {
1416 .name = "asix-sigma",
1417 .longname = "ASIX SIGMA",
1420 .cleanup = hw_cleanup,
1421 .opendev = hw_opendev,
1422 .closedev = hw_closedev,
1423 .get_device_info = hw_get_device_info,
1424 .get_status = hw_get_status,
1425 .get_capabilities = hw_get_capabilities,
1426 .set_configuration = hw_set_configuration,
1427 .start_acquisition = hw_start_acquisition,
1428 .stop_acquisition = hw_stop_acquisition,