]> sigrok.org Git - libsigrok.git/blame_incremental - src/hardware/fx2lafw/protocol.h
fx2lafw: Always enable wide sampling for dslogic firmware
[libsigrok.git] / src / hardware / fx2lafw / protocol.h
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#ifndef LIBSIGROK_HARDWARE_FX2LAFW_PROTOCOL_H
22#define LIBSIGROK_HARDWARE_FX2LAFW_PROTOCOL_H
23
24#include <glib.h>
25#include <stdint.h>
26#include <stdlib.h>
27#include <string.h>
28#include <libusb.h>
29#include <libsigrok/libsigrok.h>
30#include "libsigrok-internal.h"
31
32#define LOG_PREFIX "fx2lafw"
33
34#define USB_INTERFACE 0
35#define USB_CONFIGURATION 1
36#define NUM_TRIGGER_STAGES 4
37
38#define MAX_RENUM_DELAY_MS 3000
39#define NUM_SIMUL_TRANSFERS 32
40#define MAX_EMPTY_TRANSFERS (NUM_SIMUL_TRANSFERS * 2)
41
42#define NUM_CHANNELS 16
43
44#define FX2LAFW_REQUIRED_VERSION_MAJOR 1
45
46#define MAX_8BIT_SAMPLE_RATE SR_MHZ(24)
47#define MAX_16BIT_SAMPLE_RATE SR_MHZ(12)
48
49/* 6 delay states of up to 256 clock ticks */
50#define MAX_SAMPLE_DELAY (6 * 256)
51
52#define DEV_CAPS_16BIT_POS 0
53#define DEV_CAPS_AX_ANALOG_POS 1
54#define DEV_CAPS_DSLOGIC_FW_POS 2
55
56#define DEV_CAPS_16BIT (1 << DEV_CAPS_16BIT_POS)
57#define DEV_CAPS_AX_ANALOG (1 << DEV_CAPS_AX_ANALOG_POS)
58#define DEV_CAPS_DSLOGIC_FW (1 << DEV_CAPS_DSLOGIC_FW_POS)
59
60#define DSLOGIC_FPGA_FIRMWARE_5V "dreamsourcelab-dslogic-fpga-5v.fw"
61#define DSLOGIC_FPGA_FIRMWARE_3V3 "dreamsourcelab-dslogic-fpga-3v3.fw"
62#define DSCOPE_FPGA_FIRMWARE "dreamsourcelab-dscope-fpga.fw"
63#define DSLOGIC_PRO_FPGA_FIRMWARE "dreamsourcelab-dslogic-pro-fpga.fw"
64
65/* Protocol commands */
66#define CMD_GET_FW_VERSION 0xb0
67#define CMD_START 0xb1
68#define CMD_GET_REVID_VERSION 0xb2
69
70#define CMD_START_FLAGS_CLK_CTL2_POS 4
71#define CMD_START_FLAGS_WIDE_POS 5
72#define CMD_START_FLAGS_CLK_SRC_POS 6
73
74#define CMD_START_FLAGS_CLK_CTL2 (1 << CMD_START_FLAGS_CLK_CTL2_POS)
75#define CMD_START_FLAGS_SAMPLE_8BIT (0 << CMD_START_FLAGS_WIDE_POS)
76#define CMD_START_FLAGS_SAMPLE_16BIT (1 << CMD_START_FLAGS_WIDE_POS)
77
78#define CMD_START_FLAGS_CLK_30MHZ (0 << CMD_START_FLAGS_CLK_SRC_POS)
79#define CMD_START_FLAGS_CLK_48MHZ (1 << CMD_START_FLAGS_CLK_SRC_POS)
80
81struct fx2lafw_profile {
82 uint16_t vid;
83 uint16_t pid;
84
85 const char *vendor;
86 const char *model;
87 const char *model_version;
88
89 const char *firmware;
90
91 uint32_t dev_caps;
92
93 const char *usb_manufacturer;
94 const char *usb_product;
95};
96
97struct dev_context {
98 const struct fx2lafw_profile *profile;
99 GSList *enabled_analog_channels;
100 /*
101 * Since we can't keep track of an fx2lafw device after upgrading
102 * the firmware (it renumerates into a different device address
103 * after the upgrade) this is like a global lock. No device will open
104 * until a proper delay after the last device was upgraded.
105 */
106 int64_t fw_updated;
107
108 /* Supported samplerates */
109 const uint64_t *samplerates;
110 int num_samplerates;
111
112 /* Device/capture settings */
113 uint64_t cur_samplerate;
114 uint64_t limit_samples;
115 uint64_t capture_ratio;
116
117 /* Operational settings */
118 gboolean trigger_fired;
119 gboolean acq_aborted;
120 gboolean sample_wide;
121 struct soft_trigger_logic *stl;
122
123 unsigned int sent_samples;
124 int submitted_transfers;
125 int empty_transfer_count;
126
127 unsigned int num_transfers;
128 struct libusb_transfer **transfers;
129 struct sr_context *ctx;
130 void (*send_data_proc)(struct sr_dev_inst *sdi,
131 uint8_t *data, size_t length, size_t sample_width);
132 uint8_t *logic_buffer;
133 float *analog_buffer;
134
135 /* Is this a DSLogic? */
136 gboolean dslogic;
137 uint16_t dslogic_mode;
138 uint32_t trigger_pos;
139 gboolean dslogic_external_clock;
140 gboolean dslogic_continuous_mode;
141 int dslogic_clock_edge;
142 int dslogic_voltage_threshold;
143};
144
145SR_PRIV int fx2lafw_command_start_acquisition(const struct sr_dev_inst *sdi);
146SR_PRIV gboolean match_manuf_prod(libusb_device *dev, const char *manufacturer,
147 const char *product);
148SR_PRIV int fx2lafw_dev_open(struct sr_dev_inst *sdi, struct sr_dev_driver *di);
149SR_PRIV struct dev_context *fx2lafw_dev_new(void);
150SR_PRIV void fx2lafw_abort_acquisition(struct dev_context *devc);
151SR_PRIV void LIBUSB_CALL fx2lafw_receive_transfer(struct libusb_transfer *transfer);
152SR_PRIV size_t fx2lafw_get_buffer_size(struct dev_context *devc);
153SR_PRIV unsigned int fx2lafw_get_number_of_transfers(struct dev_context *devc);
154SR_PRIV unsigned int fx2lafw_get_timeout(struct dev_context *devc);
155SR_PRIV void la_send_data_proc(struct sr_dev_inst *sdi, uint8_t *data,
156 size_t length, size_t sample_width);
157SR_PRIV void mso_send_data_proc(struct sr_dev_inst *sdi, uint8_t *data,
158 size_t length, size_t sample_width);
159
160#endif