]> sigrok.org Git - libsigrok.git/commitdiff
fx2lafw: Always enable wide sampling for dslogic firmware
authorAngus Gratton <redacted>
Wed, 12 Apr 2017 07:26:45 +0000 (17:26 +1000)
committerUwe Hermann <redacted>
Tue, 23 May 2017 18:00:57 +0000 (20:00 +0200)
Fixes regression in 8399f68a3.

Ref: https://sourceforge.net/p/sigrok/mailman/message/35780588/

Signed-off-by: Angus Gratton <redacted>
src/hardware/fx2lafw/api.c
src/hardware/fx2lafw/protocol.h

index 1ad9bedc56b3b18e83096d7b646c24510f3fc497..856e51854af9eb0bbd6702fe3cce302b480f3724 100644 (file)
@@ -57,29 +57,29 @@ static const struct fx2lafw_profile supported_fx2[] = {
        /* DreamSourceLab DSLogic (before FW upload) */
        { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
                "dreamsourcelab-dslogic-fx2.fw",
-               DEV_CAPS_16BIT, NULL, NULL},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
        /* DreamSourceLab DSLogic (after FW upload) */
        { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
                "dreamsourcelab-dslogic-fx2.fw",
-               DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
 
        /* DreamSourceLab DSCope (before FW upload) */
        { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
                "dreamsourcelab-dscope-fx2.fw",
-               DEV_CAPS_16BIT, NULL, NULL},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
        /* DreamSourceLab DSCope (after FW upload) */
        { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
                "dreamsourcelab-dscope-fx2.fw",
-               DEV_CAPS_16BIT, "DreamSourceLab", "DSCope"},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSCope"},
 
        /* DreamSourceLab DSLogic Pro (before FW upload) */
        { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
                "dreamsourcelab-dslogic-pro-fx2.fw",
-               DEV_CAPS_16BIT, NULL, NULL},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
        /* DreamSourceLab DSLogic Pro (after FW upload) */
        { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
                "dreamsourcelab-dslogic-pro-fx2.fw",
-               DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
+               DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
 
        /*
         * Saleae Logic
@@ -1004,10 +1004,13 @@ static int configure_channels(const struct sr_dev_inst *sdi)
        }
 
        /*
-        * Use wide sampling if either any of the LA channels 8..15 is enabled
-        * and/or at least one analog channel is enabled.
+        * Use wide sampling if either any of the LA channels 8..15 is enabled,
+        * and/or at least one analog channel is enabled, and/or the device
+        * is running DSLogic firmware (not fx2lafw).
         */
-       devc->sample_wide = (channel_mask > 0xff || num_analog > 0);
+       devc->sample_wide = (channel_mask > 0xff
+                       || num_analog > 0
+                       || (devc->profile->dev_caps & DEV_CAPS_DSLOGIC_FW));
 
        return SR_OK;
 }
index e228c87518371b47def45e60b71129ebb3223dcc..24f17a9c8da054a4ea96c0a21a69bbb86b9a5b13 100644 (file)
 
 #define DEV_CAPS_16BIT_POS     0
 #define DEV_CAPS_AX_ANALOG_POS 1
+#define DEV_CAPS_DSLOGIC_FW_POS 2
 
 #define DEV_CAPS_16BIT         (1 << DEV_CAPS_16BIT_POS)
 #define DEV_CAPS_AX_ANALOG     (1 << DEV_CAPS_AX_ANALOG_POS)
+#define DEV_CAPS_DSLOGIC_FW    (1 << DEV_CAPS_DSLOGIC_FW_POS)
 
 #define DSLOGIC_FPGA_FIRMWARE_5V "dreamsourcelab-dslogic-fpga-5v.fw"
 #define DSLOGIC_FPGA_FIRMWARE_3V3 "dreamsourcelab-dslogic-fpga-3v3.fw"