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[libsigrok.git] / src / hardware / yokogawa-dlm / api.c
CommitLineData
10763937
SA
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 abraxa (Soeren Apel) <soeren@apelpie.net>
5 * Based on the Hameg HMO driver by poljar (Damir Jelić) <poljarinho@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
10763937 22#include <stdlib.h>
5a1afc09 23#include "scpi.h"
10763937
SA
24#include "protocol.h"
25
dd5c48a6 26static struct sr_dev_driver yokogawa_dlm_driver_info;
8ab929d6 27
329733d9 28static const char *MANUFACTURER_ID = "YOKOGAWA";
8ab929d6 29
4b25cbff 30static const uint32_t scanopts[] = {
f3c60fb6
SA
31 SR_CONF_CONN,
32};
33
4b25cbff 34static const uint32_t drvopts[] = {
cf0280fa
AJ
35 SR_CONF_LOGIC_ANALYZER,
36 SR_CONF_OSCILLOSCOPE,
37};
38
4b25cbff 39static const uint32_t devopts[] = {
f3c60fb6
SA
40 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
41 SR_CONF_SAMPLERATE | SR_CONF_GET,
42 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_NUM_HDIV | SR_CONF_GET,
44 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
f3c60fb6 45 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 46 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
47};
48
6b82c3e5 49static const uint32_t devopts_cg_analog[] = {
f3c60fb6 50 SR_CONF_NUM_VDIV | SR_CONF_GET,
86621306
UH
51 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
53};
54
6b82c3e5 55static const uint32_t devopts_cg_digital[] = {
f3c60fb6
SA
56};
57
8ab929d6
SA
58enum {
59 CG_INVALID = -1,
60 CG_NONE,
61 CG_ANALOG,
62 CG_DIGITAL,
63};
64
8ab929d6
SA
65static struct sr_dev_inst *probe_usbtmc_device(struct sr_scpi_dev_inst *scpi)
66{
67 struct sr_dev_inst *sdi;
68 struct dev_context *devc;
69 struct sr_scpi_hw_info *hw_info;
70 char *model_name;
71 int model_index;
72
73 sdi = NULL;
74 devc = NULL;
75 hw_info = NULL;
76
77 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
78 sr_info("Couldn't get IDN response.");
79 goto fail;
80 }
81
82 if (strcmp(hw_info->manufacturer, MANUFACTURER_ID) != 0)
83 goto fail;
84
85 if (dlm_model_get(hw_info->model, &model_name, &model_index) != SR_OK)
86 goto fail;
87
aac29cc1 88 sdi = g_malloc0(sizeof(struct sr_dev_inst));
b15ff1c9 89 sdi->vendor = g_strdup("Yokogawa");
0af636be
UH
90 sdi->model = g_strdup(model_name);
91 sdi->version = g_strdup(hw_info->firmware_version);
8ab929d6 92
d1314831
SA
93 sdi->serial_num = g_strdup(hw_info->serial_number);
94
8ab929d6
SA
95 sr_scpi_hw_info_free(hw_info);
96 hw_info = NULL;
97
ac10a927 98 devc = g_malloc0(sizeof(struct dev_context));
8ab929d6 99
4f840ce9 100 sdi->driver = &yokogawa_dlm_driver_info;
8ab929d6
SA
101 sdi->priv = devc;
102 sdi->inst_type = SR_INST_SCPI;
103 sdi->conn = scpi;
104
105 if (dlm_device_init(sdi, model_index) != SR_OK)
106 goto fail;
107
8ab929d6
SA
108 return sdi;
109
110fail:
7b365c47 111 sr_scpi_hw_info_free(hw_info);
4bf93988 112 sr_dev_inst_free(sdi);
b1f83103 113 g_free(devc);
8ab929d6
SA
114
115 return NULL;
116}
117
4f840ce9 118static GSList *scan(struct sr_dev_driver *di, GSList *options)
8ab929d6 119{
41812aca 120 return sr_scpi_scan(di->context, options, probe_usbtmc_device);
8ab929d6
SA
121}
122
3553451f 123static void clear_helper(struct dev_context *devc)
8ab929d6 124{
8ab929d6 125 dlm_scope_state_destroy(devc->model_state);
8ab929d6
SA
126 g_free(devc->analog_groups);
127 g_free(devc->digital_groups);
8ab929d6
SA
128}
129
4f840ce9 130static int dev_clear(const struct sr_dev_driver *di)
8ab929d6 131{
3553451f 132 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
8ab929d6
SA
133}
134
135static int dev_open(struct sr_dev_inst *sdi)
136{
6402c379 137 if (sr_scpi_open(sdi->conn) != SR_OK)
8ab929d6
SA
138 return SR_ERR;
139
140 if (dlm_scope_state_query(sdi) != SR_OK)
141 return SR_ERR;
142
8ab929d6
SA
143 return SR_OK;
144}
145
146static int dev_close(struct sr_dev_inst *sdi)
147{
f1ba6b4b 148 return sr_scpi_close(sdi->conn);
8ab929d6
SA
149}
150
8ab929d6
SA
151/**
152 * Check which category a given channel group belongs to.
153 *
154 * @param devc Our internal device context.
a9308652 155 * @param cg The channel group to check.
8ab929d6 156 *
a9308652
UH
157 * @retval CG_NONE cg is NULL
158 * @retval CG_ANALOG cg is an analog group
8ab929d6
SA
159 * @retval CG_DIGITAL cg is a digital group
160 * @retval CG_INVALID cg is something else
161 */
162static int check_channel_group(struct dev_context *devc,
ac10a927 163 const struct sr_channel_group *cg)
8ab929d6
SA
164{
165 unsigned int i;
329733d9 166 const struct scope_config *model;
8ab929d6
SA
167
168 model = devc->model_config;
169
170 if (!cg)
171 return CG_NONE;
172
a9308652 173 for (i = 0; i < model->analog_channels; i++)
8ab929d6
SA
174 if (cg == devc->analog_groups[i])
175 return CG_ANALOG;
176
a9308652 177 for (i = 0; i < model->pods; i++)
8ab929d6
SA
178 if (cg == devc->digital_groups[i])
179 return CG_DIGITAL;
180
181 sr_err("Invalid channel group specified.");
182 return CG_INVALID;
183}
184
dd7a72ea
UH
185static int config_get(uint32_t key, GVariant **data,
186 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6
SA
187{
188 int ret, cg_type;
189 unsigned int i;
190 struct dev_context *devc;
329733d9 191 const struct scope_config *model;
8ab929d6
SA
192 struct scope_state *state;
193
709468ba 194 if (!sdi)
8ab929d6
SA
195 return SR_ERR_ARG;
196
709468ba
UH
197 devc = sdi->priv;
198
8ab929d6
SA
199 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
200 return SR_ERR;
201
8ab929d6
SA
202 model = devc->model_config;
203 state = devc->model_state;
204
205 switch (key) {
bf622e6d 206 case SR_CONF_NUM_HDIV:
8ab929d6
SA
207 *data = g_variant_new_int32(model->num_xdivs);
208 ret = SR_OK;
209 break;
210 case SR_CONF_TIMEBASE:
211 *data = g_variant_new("(tt)",
f3c60fb6
SA
212 dlm_timebases[state->timebase][0],
213 dlm_timebases[state->timebase][1]);
8ab929d6
SA
214 ret = SR_OK;
215 break;
216 case SR_CONF_NUM_VDIV:
217 if (cg_type == CG_NONE) {
8ab929d6
SA
218 return SR_ERR_CHANNEL_GROUP;
219 } else if (cg_type == CG_ANALOG) {
220 *data = g_variant_new_int32(model->num_ydivs);
221 ret = SR_OK;
222 break;
223 } else {
224 ret = SR_ERR_NA;
225 }
226 break;
227 case SR_CONF_VDIV:
228 ret = SR_ERR_NA;
229 if (cg_type == CG_NONE) {
8ab929d6
SA
230 return SR_ERR_CHANNEL_GROUP;
231 } else if (cg_type != CG_ANALOG)
232 break;
233
a9308652 234 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
235 if (cg != devc->analog_groups[i])
236 continue;
237 *data = g_variant_new("(tt)",
f3c60fb6
SA
238 dlm_vdivs[state->analog_states[i].vdiv][0],
239 dlm_vdivs[state->analog_states[i].vdiv][1]);
8ab929d6
SA
240 ret = SR_OK;
241 break;
242 }
243 break;
244 case SR_CONF_TRIGGER_SOURCE:
245 *data = g_variant_new_string((*model->trigger_sources)[state->trigger_source]);
246 ret = SR_OK;
247 break;
248 case SR_CONF_TRIGGER_SLOPE:
f3c60fb6 249 *data = g_variant_new_string(dlm_trigger_slopes[state->trigger_slope]);
8ab929d6
SA
250 ret = SR_OK;
251 break;
252 case SR_CONF_HORIZ_TRIGGERPOS:
253 *data = g_variant_new_double(state->horiz_triggerpos);
254 ret = SR_OK;
255 break;
256 case SR_CONF_COUPLING:
257 ret = SR_ERR_NA;
258 if (cg_type == CG_NONE) {
8ab929d6
SA
259 return SR_ERR_CHANNEL_GROUP;
260 } else if (cg_type != CG_ANALOG)
261 break;
262
a9308652 263 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
264 if (cg != devc->analog_groups[i])
265 continue;
266 *data = g_variant_new_string((*model->coupling_options)[state->analog_states[i].coupling]);
267 ret = SR_OK;
268 break;
269 }
270 break;
271 case SR_CONF_SAMPLERATE:
272 *data = g_variant_new_uint64(state->sample_rate);
273 ret = SR_OK;
274 break;
275 default:
276 ret = SR_ERR_NA;
277 }
278
279 return ret;
280}
281
dd7a72ea
UH
282static int config_set(uint32_t key, GVariant *data,
283 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 284{
697fb6dd 285 int ret, cg_type, idx;
8ab929d6
SA
286 unsigned int i, j;
287 char float_str[30];
288 struct dev_context *devc;
329733d9 289 const struct scope_config *model;
8ab929d6
SA
290 struct scope_state *state;
291 const char *tmp;
8ab929d6
SA
292 double tmp_d;
293 gboolean update_sample_rate;
294
295 if (!sdi || !(devc = sdi->priv))
296 return SR_ERR_ARG;
297
298 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
299 return SR_ERR;
300
301 model = devc->model_config;
302 state = devc->model_state;
303 update_sample_rate = FALSE;
304
305 ret = SR_ERR_NA;
306
307 switch (key) {
308 case SR_CONF_LIMIT_FRAMES:
309 devc->frame_limit = g_variant_get_uint64(data);
310 ret = SR_OK;
311 break;
312 case SR_CONF_TRIGGER_SOURCE:
313 tmp = g_variant_get_string(data, NULL);
314 for (i = 0; (*model->trigger_sources)[i]; i++) {
315 if (g_strcmp0(tmp, (*model->trigger_sources)[i]) != 0)
316 continue;
317 state->trigger_source = i;
318 /* TODO: A and B trigger support possible? */
319 ret = dlm_trigger_source_set(sdi->conn, (*model->trigger_sources)[i]);
320 break;
321 }
322 break;
323 case SR_CONF_VDIV:
87dc5410 324 if (cg_type == CG_NONE)
8ab929d6 325 return SR_ERR_CHANNEL_GROUP;
697fb6dd
UH
326 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_vdivs))) < 0)
327 return SR_ERR_ARG;
328 for (j = 1; j <= model->analog_channels; j++) {
329 if (cg != devc->analog_groups[j - 1])
8ab929d6 330 continue;
697fb6dd
UH
331 state->analog_states[j - 1].vdiv = idx;
332 g_ascii_formatd(float_str, sizeof(float_str),
333 "%E", (float) dlm_vdivs[idx][0] / dlm_vdivs[idx][1]);
334 if (dlm_analog_chan_vdiv_set(sdi->conn, j, float_str) != SR_OK ||
335 sr_scpi_get_opc(sdi->conn) != SR_OK)
336 return SR_ERR;
8ab929d6
SA
337 break;
338 }
697fb6dd 339 ret = SR_OK;
8ab929d6
SA
340 break;
341 case SR_CONF_TIMEBASE:
697fb6dd
UH
342 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_timebases))) < 0)
343 return SR_ERR_ARG;
344 state->timebase = idx;
345 g_ascii_formatd(float_str, sizeof(float_str),
346 "%E", (float) dlm_timebases[idx][0] / dlm_timebases[idx][1]);
347 ret = dlm_timebase_set(sdi->conn, float_str);
348 update_sample_rate = TRUE;
8ab929d6
SA
349 break;
350 case SR_CONF_HORIZ_TRIGGERPOS:
351 tmp_d = g_variant_get_double(data);
352
353 /* TODO: Check if the calculation makes sense for the DLM. */
354 if (tmp_d < 0.0 || tmp_d > 1.0)
355 return SR_ERR;
356
357 state->horiz_triggerpos = tmp_d;
358 tmp_d = -(tmp_d - 0.5) *
f3c60fb6
SA
359 ((double) dlm_timebases[state->timebase][0] /
360 dlm_timebases[state->timebase][1])
ac10a927 361 * model->num_xdivs;
8ab929d6
SA
362
363 g_ascii_formatd(float_str, sizeof(float_str), "%E", tmp_d);
364 ret = dlm_horiz_trigger_pos_set(sdi->conn, float_str);
365 break;
366 case SR_CONF_TRIGGER_SLOPE:
367 tmp = g_variant_get_string(data, NULL);
368
369 if (!tmp || !(tmp[0] == 'f' || tmp[0] == 'r'))
370 return SR_ERR_ARG;
371
372 /* Note: See dlm_trigger_slopes[] in protocol.c. */
373 state->trigger_slope = (tmp[0] == 'r') ?
374 SLOPE_POSITIVE : SLOPE_NEGATIVE;
375
376 ret = dlm_trigger_slope_set(sdi->conn, state->trigger_slope);
377 break;
378 case SR_CONF_COUPLING:
87dc5410 379 if (cg_type == CG_NONE)
8ab929d6 380 return SR_ERR_CHANNEL_GROUP;
8ab929d6
SA
381
382 tmp = g_variant_get_string(data, NULL);
383
384 for (i = 0; (*model->coupling_options)[i]; i++) {
385 if (strcmp(tmp, (*model->coupling_options)[i]) != 0)
386 continue;
a9308652 387 for (j = 1; j <= model->analog_channels; j++) {
8ab929d6
SA
388 if (cg != devc->analog_groups[j - 1])
389 continue;
390 state->analog_states[j-1].coupling = i;
391
392 if (dlm_analog_chan_coupl_set(sdi->conn, j, tmp) != SR_OK ||
ac10a927 393 sr_scpi_get_opc(sdi->conn) != SR_OK)
8ab929d6
SA
394 return SR_ERR;
395 break;
396 }
397
398 ret = SR_OK;
399 break;
400 }
401 break;
402 default:
403 ret = SR_ERR_NA;
404 break;
405 }
406
407 if (ret == SR_OK)
408 ret = sr_scpi_get_opc(sdi->conn);
409
410 if (ret == SR_OK && update_sample_rate)
411 ret = dlm_sample_rate_query(sdi);
412
413 return ret;
414}
415
c65a021c 416static int config_channel_set(const struct sr_dev_inst *sdi,
dd7a72ea 417 struct sr_channel *ch, unsigned int changes)
c65a021c 418{
a9308652 419 /* Currently we only handle SR_CHANNEL_SET_ENABLED. */
c65a021c
SA
420 if (changes != SR_CHANNEL_SET_ENABLED)
421 return SR_ERR_NA;
422
423 return dlm_channel_state_set(sdi, ch->index, ch->enabled);
424}
425
dd7a72ea
UH
426static int config_list(uint32_t key, GVariant **data,
427 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 428{
cf0280fa 429 int cg_type = CG_NONE;
e66d1892
UH
430 struct dev_context *devc;
431 const struct scope_config *model;
f3c60fb6 432
e66d1892
UH
433 devc = (sdi) ? sdi->priv : NULL;
434 model = (devc) ? devc->model_config : NULL;
f3c60fb6 435
f3c60fb6
SA
436 if (!cg) {
437 switch (key) {
e66d1892 438 case SR_CONF_SCAN_OPTIONS:
f3c60fb6 439 case SR_CONF_DEVICE_OPTIONS:
4b25cbff 440 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
f3c60fb6 441 case SR_CONF_TIMEBASE:
58ffcf97 442 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_timebases));
f3c60fb6
SA
443 return SR_OK;
444 case SR_CONF_TRIGGER_SOURCE:
445 if (!model)
446 return SR_ERR_ARG;
447 *data = g_variant_new_strv(*model->trigger_sources,
448 g_strv_length((char **)*model->trigger_sources));
449 return SR_OK;
450 case SR_CONF_TRIGGER_SLOPE:
451 *data = g_variant_new_strv(dlm_trigger_slopes,
452 g_strv_length((char **)dlm_trigger_slopes));
453 return SR_OK;
454 case SR_CONF_NUM_HDIV:
49f49cb5 455 *data = g_variant_new_uint32(model->num_xdivs);
f3c60fb6
SA
456 return SR_OK;
457 default:
458 return SR_ERR_NA;
459 }
460 }
461
462 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
463 return SR_ERR;
464
8ab929d6 465 switch (key) {
8ab929d6 466 case SR_CONF_DEVICE_OPTIONS:
105df674 467 if (cg_type == CG_ANALOG)
53012da6 468 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
105df674 469 else if (cg_type == CG_DIGITAL)
53012da6 470 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_digital));
105df674
UH
471 else
472 *data = std_gvar_array_u32(NULL, 0);
8ab929d6
SA
473 break;
474 case SR_CONF_COUPLING:
475 if (cg_type == CG_NONE)
476 return SR_ERR_CHANNEL_GROUP;
477 *data = g_variant_new_strv(*model->coupling_options,
ac10a927 478 g_strv_length((char **)*model->coupling_options));
8ab929d6 479 break;
8ab929d6
SA
480 case SR_CONF_VDIV:
481 if (cg_type == CG_NONE)
482 return SR_ERR_CHANNEL_GROUP;
58ffcf97 483 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_vdivs));
8ab929d6
SA
484 break;
485 default:
486 return SR_ERR_NA;
487 }
488
489 return SR_OK;
490}
491
492static int dlm_check_channels(GSList *channels)
493{
494 GSList *l;
495 struct sr_channel *ch;
496 gboolean enabled_pod1, enabled_chan4;
497
498 enabled_pod1 = enabled_chan4 = FALSE;
499
500 /* Note: On the DLM2000, CH4 and Logic are shared. */
501 /* TODO Handle non-DLM2000 models. */
502 for (l = channels; l; l = l->next) {
503 ch = l->data;
504 switch (ch->type) {
505 case SR_CHANNEL_ANALOG:
506 if (ch->index == 3)
507 enabled_chan4 = TRUE;
508 break;
509 case SR_CHANNEL_LOGIC:
510 enabled_pod1 = TRUE;
511 break;
512 default:
513 return SR_ERR;
514 }
515 }
516
517 if (enabled_pod1 && enabled_chan4)
518 return SR_ERR;
519
520 return SR_OK;
521}
522
695dc859 523static int dev_acquisition_start(const struct sr_dev_inst *sdi)
8ab929d6
SA
524{
525 GSList *l;
526 gboolean digital_added;
527 struct sr_channel *ch;
528 struct dev_context *devc;
529 struct sr_scpi_dev_inst *scpi;
530
8ab929d6
SA
531 scpi = sdi->conn;
532 devc = sdi->priv;
533 digital_added = FALSE;
534
535 g_slist_free(devc->enabled_channels);
536 devc->enabled_channels = NULL;
537
538 for (l = sdi->channels; l; l = l->next) {
539 ch = l->data;
540 if (!ch->enabled)
541 continue;
542 /* Only add a single digital channel. */
543 if (ch->type != SR_CHANNEL_LOGIC || !digital_added) {
544 devc->enabled_channels = g_slist_append(
ac10a927
SA
545 devc->enabled_channels, ch);
546 if (ch->type == SR_CHANNEL_LOGIC)
547 digital_added = TRUE;
8ab929d6
SA
548 }
549 }
550
551 if (!devc->enabled_channels)
552 return SR_ERR;
553
554 if (dlm_check_channels(devc->enabled_channels) != SR_OK) {
555 sr_err("Invalid channel configuration specified!");
556 return SR_ERR_NA;
557 }
558
af3487ec
SA
559 /* Request data for the first enabled channel. */
560 devc->current_channel = devc->enabled_channels;
561 dlm_channel_data_request(sdi);
562
0028d5a1 563 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 5,
8ab929d6
SA
564 dlm_data_receive, (void *)sdi);
565
566 return SR_OK;
567}
568
695dc859 569static int dev_acquisition_stop(struct sr_dev_inst *sdi)
8ab929d6
SA
570{
571 struct dev_context *devc;
8ab929d6 572
bee2b016 573 std_session_send_df_end(sdi);
8ab929d6 574
8ab929d6
SA
575 devc = sdi->priv;
576
577 devc->num_frames = 0;
578 g_slist_free(devc->enabled_channels);
579 devc->enabled_channels = NULL;
af3487ec
SA
580
581 sr_scpi_source_remove(sdi->session, sdi->conn);
8ab929d6
SA
582
583 return SR_OK;
584}
10763937 585
dd5c48a6 586static struct sr_dev_driver yokogawa_dlm_driver_info = {
10763937 587 .name = "yokogawa-dlm",
ac10a927 588 .longname = "Yokogawa DL/DLM",
10763937 589 .api_version = 1,
c2fdcc25 590 .init = std_init,
700d6b64 591 .cleanup = std_cleanup,
8ab929d6 592 .scan = scan,
c01bf34c 593 .dev_list = std_dev_list,
8ab929d6
SA
594 .dev_clear = dev_clear,
595 .config_get = config_get,
596 .config_set = config_set,
c65a021c 597 .config_channel_set = config_channel_set,
8ab929d6
SA
598 .config_list = config_list,
599 .dev_open = dev_open,
600 .dev_close = dev_close,
601 .dev_acquisition_start = dev_acquisition_start,
602 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 603 .context = NULL,
10763937 604};
dd5c48a6 605SR_REGISTER_DEV_DRIVER(yokogawa_dlm_driver_info);