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CommitLineData
10763937
SA
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 abraxa (Soeren Apel) <soeren@apelpie.net>
5 * Based on the Hameg HMO driver by poljar (Damir Jelić) <poljarinho@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
10763937 22#include <stdlib.h>
5a1afc09 23#include "scpi.h"
10763937
SA
24#include "protocol.h"
25
dd5c48a6 26static struct sr_dev_driver yokogawa_dlm_driver_info;
8ab929d6 27
329733d9
UH
28static const char *MANUFACTURER_ID = "YOKOGAWA";
29static const char *MANUFACTURER_NAME = "Yokogawa";
8ab929d6 30
f3c60fb6
SA
31static const uint32_t dlm_scanopts[] = {
32 SR_CONF_CONN,
33};
34
35static const uint32_t dlm_drvopts[] = {
cf0280fa
AJ
36 SR_CONF_LOGIC_ANALYZER,
37 SR_CONF_OSCILLOSCOPE,
38};
39
f3c60fb6
SA
40static const uint32_t dlm_devopts[] = {
41 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
42 SR_CONF_SAMPLERATE | SR_CONF_GET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_NUM_HDIV | SR_CONF_GET,
45 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
f3c60fb6 46 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 47 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
48};
49
50static const uint32_t dlm_analog_devopts[] = {
f3c60fb6 51 SR_CONF_NUM_VDIV | SR_CONF_GET,
86621306
UH
52 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
53 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
54};
55
56static const uint32_t dlm_digital_devopts[] = {
57};
58
8ab929d6
SA
59enum {
60 CG_INVALID = -1,
61 CG_NONE,
62 CG_ANALOG,
63 CG_DIGITAL,
64};
65
8ab929d6
SA
66static struct sr_dev_inst *probe_usbtmc_device(struct sr_scpi_dev_inst *scpi)
67{
68 struct sr_dev_inst *sdi;
69 struct dev_context *devc;
70 struct sr_scpi_hw_info *hw_info;
71 char *model_name;
72 int model_index;
73
74 sdi = NULL;
75 devc = NULL;
76 hw_info = NULL;
77
78 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
79 sr_info("Couldn't get IDN response.");
80 goto fail;
81 }
82
83 if (strcmp(hw_info->manufacturer, MANUFACTURER_ID) != 0)
84 goto fail;
85
86 if (dlm_model_get(hw_info->model, &model_name, &model_index) != SR_OK)
87 goto fail;
88
aac29cc1 89 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
90 sdi->vendor = g_strdup(MANUFACTURER_NAME);
91 sdi->model = g_strdup(model_name);
92 sdi->version = g_strdup(hw_info->firmware_version);
8ab929d6 93
d1314831
SA
94 sdi->serial_num = g_strdup(hw_info->serial_number);
95
8ab929d6
SA
96 sr_scpi_hw_info_free(hw_info);
97 hw_info = NULL;
98
ac10a927 99 devc = g_malloc0(sizeof(struct dev_context));
8ab929d6 100
4f840ce9 101 sdi->driver = &yokogawa_dlm_driver_info;
8ab929d6
SA
102 sdi->priv = devc;
103 sdi->inst_type = SR_INST_SCPI;
104 sdi->conn = scpi;
105
106 if (dlm_device_init(sdi, model_index) != SR_OK)
107 goto fail;
108
8ab929d6
SA
109 return sdi;
110
111fail:
7b365c47 112 sr_scpi_hw_info_free(hw_info);
4bf93988 113 sr_dev_inst_free(sdi);
b1f83103 114 g_free(devc);
8ab929d6
SA
115
116 return NULL;
117}
118
4f840ce9 119static GSList *scan(struct sr_dev_driver *di, GSList *options)
8ab929d6 120{
41812aca 121 return sr_scpi_scan(di->context, options, probe_usbtmc_device);
8ab929d6
SA
122}
123
8ab929d6
SA
124static void clear_helper(void *priv)
125{
126 struct dev_context *devc;
127
128 devc = priv;
129
130 dlm_scope_state_destroy(devc->model_state);
131
132 g_free(devc->analog_groups);
133 g_free(devc->digital_groups);
134 g_free(devc);
135}
136
4f840ce9 137static int dev_clear(const struct sr_dev_driver *di)
8ab929d6
SA
138{
139 return std_dev_clear(di, clear_helper);
140}
141
142static int dev_open(struct sr_dev_inst *sdi)
143{
6402c379 144 if (sr_scpi_open(sdi->conn) != SR_OK)
8ab929d6
SA
145 return SR_ERR;
146
147 if (dlm_scope_state_query(sdi) != SR_OK)
148 return SR_ERR;
149
8ab929d6
SA
150 return SR_OK;
151}
152
153static int dev_close(struct sr_dev_inst *sdi)
154{
8ab929d6
SA
155 sr_scpi_close(sdi->conn);
156
157 sdi->status = SR_ST_INACTIVE;
158
159 return SR_OK;
160}
161
8ab929d6
SA
162/**
163 * Check which category a given channel group belongs to.
164 *
165 * @param devc Our internal device context.
a9308652 166 * @param cg The channel group to check.
8ab929d6 167 *
a9308652
UH
168 * @retval CG_NONE cg is NULL
169 * @retval CG_ANALOG cg is an analog group
8ab929d6
SA
170 * @retval CG_DIGITAL cg is a digital group
171 * @retval CG_INVALID cg is something else
172 */
173static int check_channel_group(struct dev_context *devc,
ac10a927 174 const struct sr_channel_group *cg)
8ab929d6
SA
175{
176 unsigned int i;
329733d9 177 const struct scope_config *model;
8ab929d6
SA
178
179 model = devc->model_config;
180
181 if (!cg)
182 return CG_NONE;
183
a9308652 184 for (i = 0; i < model->analog_channels; i++)
8ab929d6
SA
185 if (cg == devc->analog_groups[i])
186 return CG_ANALOG;
187
a9308652 188 for (i = 0; i < model->pods; i++)
8ab929d6
SA
189 if (cg == devc->digital_groups[i])
190 return CG_DIGITAL;
191
192 sr_err("Invalid channel group specified.");
193 return CG_INVALID;
194}
195
584560f1 196static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
ac10a927 197 const struct sr_channel_group *cg)
8ab929d6
SA
198{
199 int ret, cg_type;
200 unsigned int i;
201 struct dev_context *devc;
329733d9 202 const struct scope_config *model;
8ab929d6
SA
203 struct scope_state *state;
204
709468ba 205 if (!sdi)
8ab929d6
SA
206 return SR_ERR_ARG;
207
709468ba
UH
208 devc = sdi->priv;
209
8ab929d6
SA
210 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
211 return SR_ERR;
212
8ab929d6
SA
213 model = devc->model_config;
214 state = devc->model_state;
215
216 switch (key) {
bf622e6d 217 case SR_CONF_NUM_HDIV:
8ab929d6
SA
218 *data = g_variant_new_int32(model->num_xdivs);
219 ret = SR_OK;
220 break;
221 case SR_CONF_TIMEBASE:
222 *data = g_variant_new("(tt)",
f3c60fb6
SA
223 dlm_timebases[state->timebase][0],
224 dlm_timebases[state->timebase][1]);
8ab929d6
SA
225 ret = SR_OK;
226 break;
227 case SR_CONF_NUM_VDIV:
228 if (cg_type == CG_NONE) {
229 sr_err("No channel group specified.");
230 return SR_ERR_CHANNEL_GROUP;
231 } else if (cg_type == CG_ANALOG) {
232 *data = g_variant_new_int32(model->num_ydivs);
233 ret = SR_OK;
234 break;
235 } else {
236 ret = SR_ERR_NA;
237 }
238 break;
239 case SR_CONF_VDIV:
240 ret = SR_ERR_NA;
241 if (cg_type == CG_NONE) {
242 sr_err("No channel group specified.");
243 return SR_ERR_CHANNEL_GROUP;
244 } else if (cg_type != CG_ANALOG)
245 break;
246
a9308652 247 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
248 if (cg != devc->analog_groups[i])
249 continue;
250 *data = g_variant_new("(tt)",
f3c60fb6
SA
251 dlm_vdivs[state->analog_states[i].vdiv][0],
252 dlm_vdivs[state->analog_states[i].vdiv][1]);
8ab929d6
SA
253 ret = SR_OK;
254 break;
255 }
256 break;
257 case SR_CONF_TRIGGER_SOURCE:
258 *data = g_variant_new_string((*model->trigger_sources)[state->trigger_source]);
259 ret = SR_OK;
260 break;
261 case SR_CONF_TRIGGER_SLOPE:
f3c60fb6 262 *data = g_variant_new_string(dlm_trigger_slopes[state->trigger_slope]);
8ab929d6
SA
263 ret = SR_OK;
264 break;
265 case SR_CONF_HORIZ_TRIGGERPOS:
266 *data = g_variant_new_double(state->horiz_triggerpos);
267 ret = SR_OK;
268 break;
269 case SR_CONF_COUPLING:
270 ret = SR_ERR_NA;
271 if (cg_type == CG_NONE) {
272 sr_err("No channel group specified.");
273 return SR_ERR_CHANNEL_GROUP;
274 } else if (cg_type != CG_ANALOG)
275 break;
276
a9308652 277 for (i = 0; i < model->analog_channels; i++) {
8ab929d6
SA
278 if (cg != devc->analog_groups[i])
279 continue;
280 *data = g_variant_new_string((*model->coupling_options)[state->analog_states[i].coupling]);
281 ret = SR_OK;
282 break;
283 }
284 break;
285 case SR_CONF_SAMPLERATE:
286 *data = g_variant_new_uint64(state->sample_rate);
287 ret = SR_OK;
288 break;
289 default:
290 ret = SR_ERR_NA;
291 }
292
293 return ret;
294}
295
296static GVariant *build_tuples(const uint64_t (*array)[][2], unsigned int n)
297{
298 unsigned int i;
299 GVariant *rational[2];
300 GVariantBuilder gvb;
301
302 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
303
304 for (i = 0; i < n; i++) {
305 rational[0] = g_variant_new_uint64((*array)[i][0]);
306 rational[1] = g_variant_new_uint64((*array)[i][1]);
307
308 /* FIXME: Valgrind reports a memory leak here. */
309 g_variant_builder_add_value(&gvb, g_variant_new_tuple(rational, 2));
310 }
311
312 return g_variant_builder_end(&gvb);
313}
314
584560f1 315static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
ac10a927 316 const struct sr_channel_group *cg)
8ab929d6
SA
317{
318 int ret, cg_type;
319 unsigned int i, j;
320 char float_str[30];
321 struct dev_context *devc;
329733d9 322 const struct scope_config *model;
8ab929d6
SA
323 struct scope_state *state;
324 const char *tmp;
325 uint64_t p, q;
326 double tmp_d;
327 gboolean update_sample_rate;
328
329 if (!sdi || !(devc = sdi->priv))
330 return SR_ERR_ARG;
331
332 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
333 return SR_ERR;
334
335 model = devc->model_config;
336 state = devc->model_state;
337 update_sample_rate = FALSE;
338
339 ret = SR_ERR_NA;
340
341 switch (key) {
342 case SR_CONF_LIMIT_FRAMES:
343 devc->frame_limit = g_variant_get_uint64(data);
344 ret = SR_OK;
345 break;
346 case SR_CONF_TRIGGER_SOURCE:
347 tmp = g_variant_get_string(data, NULL);
348 for (i = 0; (*model->trigger_sources)[i]; i++) {
349 if (g_strcmp0(tmp, (*model->trigger_sources)[i]) != 0)
350 continue;
351 state->trigger_source = i;
352 /* TODO: A and B trigger support possible? */
353 ret = dlm_trigger_source_set(sdi->conn, (*model->trigger_sources)[i]);
354 break;
355 }
356 break;
357 case SR_CONF_VDIV:
358 if (cg_type == CG_NONE) {
359 sr_err("No channel group specified.");
360 return SR_ERR_CHANNEL_GROUP;
361 }
362
363 g_variant_get(data, "(tt)", &p, &q);
364
f3c60fb6
SA
365 for (i = 0; i < ARRAY_SIZE(dlm_vdivs); i++) {
366 if (p != dlm_vdivs[i][0] ||
367 q != dlm_vdivs[i][1])
8ab929d6 368 continue;
a9308652 369 for (j = 1; j <= model->analog_channels; j++) {
8ab929d6
SA
370 if (cg != devc->analog_groups[j - 1])
371 continue;
372 state->analog_states[j - 1].vdiv = i;
373 g_ascii_formatd(float_str, sizeof(float_str),
374 "%E", (float) p / q);
375 if (dlm_analog_chan_vdiv_set(sdi->conn, j, float_str) != SR_OK ||
ac10a927 376 sr_scpi_get_opc(sdi->conn) != SR_OK)
8ab929d6
SA
377 return SR_ERR;
378
379 break;
380 }
381
382 ret = SR_OK;
383 break;
384 }
385 break;
386 case SR_CONF_TIMEBASE:
387 g_variant_get(data, "(tt)", &p, &q);
388
f3c60fb6
SA
389 for (i = 0; i < ARRAY_SIZE(dlm_timebases); i++) {
390 if (p != dlm_timebases[i][0] ||
391 q != dlm_timebases[i][1])
8ab929d6
SA
392 continue;
393 state->timebase = i;
394 g_ascii_formatd(float_str, sizeof(float_str),
395 "%E", (float) p / q);
396 ret = dlm_timebase_set(sdi->conn, float_str);
397 update_sample_rate = TRUE;
398 break;
399 }
400 break;
401 case SR_CONF_HORIZ_TRIGGERPOS:
402 tmp_d = g_variant_get_double(data);
403
404 /* TODO: Check if the calculation makes sense for the DLM. */
405 if (tmp_d < 0.0 || tmp_d > 1.0)
406 return SR_ERR;
407
408 state->horiz_triggerpos = tmp_d;
409 tmp_d = -(tmp_d - 0.5) *
f3c60fb6
SA
410 ((double) dlm_timebases[state->timebase][0] /
411 dlm_timebases[state->timebase][1])
ac10a927 412 * model->num_xdivs;
8ab929d6
SA
413
414 g_ascii_formatd(float_str, sizeof(float_str), "%E", tmp_d);
415 ret = dlm_horiz_trigger_pos_set(sdi->conn, float_str);
416 break;
417 case SR_CONF_TRIGGER_SLOPE:
418 tmp = g_variant_get_string(data, NULL);
419
420 if (!tmp || !(tmp[0] == 'f' || tmp[0] == 'r'))
421 return SR_ERR_ARG;
422
423 /* Note: See dlm_trigger_slopes[] in protocol.c. */
424 state->trigger_slope = (tmp[0] == 'r') ?
425 SLOPE_POSITIVE : SLOPE_NEGATIVE;
426
427 ret = dlm_trigger_slope_set(sdi->conn, state->trigger_slope);
428 break;
429 case SR_CONF_COUPLING:
430 if (cg_type == CG_NONE) {
431 sr_err("No channel group specified.");
432 return SR_ERR_CHANNEL_GROUP;
433 }
434
435 tmp = g_variant_get_string(data, NULL);
436
437 for (i = 0; (*model->coupling_options)[i]; i++) {
438 if (strcmp(tmp, (*model->coupling_options)[i]) != 0)
439 continue;
a9308652 440 for (j = 1; j <= model->analog_channels; j++) {
8ab929d6
SA
441 if (cg != devc->analog_groups[j - 1])
442 continue;
443 state->analog_states[j-1].coupling = i;
444
445 if (dlm_analog_chan_coupl_set(sdi->conn, j, tmp) != SR_OK ||
ac10a927 446 sr_scpi_get_opc(sdi->conn) != SR_OK)
8ab929d6
SA
447 return SR_ERR;
448 break;
449 }
450
451 ret = SR_OK;
452 break;
453 }
454 break;
455 default:
456 ret = SR_ERR_NA;
457 break;
458 }
459
460 if (ret == SR_OK)
461 ret = sr_scpi_get_opc(sdi->conn);
462
463 if (ret == SR_OK && update_sample_rate)
464 ret = dlm_sample_rate_query(sdi);
465
466 return ret;
467}
468
c65a021c
SA
469static int config_channel_set(const struct sr_dev_inst *sdi,
470 struct sr_channel *ch, unsigned int changes)
471{
a9308652 472 /* Currently we only handle SR_CHANNEL_SET_ENABLED. */
c65a021c
SA
473 if (changes != SR_CHANNEL_SET_ENABLED)
474 return SR_ERR_NA;
475
476 return dlm_channel_state_set(sdi, ch->index, ch->enabled);
477}
478
584560f1 479static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
ac10a927 480 const struct sr_channel_group *cg)
8ab929d6 481{
cf0280fa
AJ
482 int cg_type = CG_NONE;
483 struct dev_context *devc = NULL;
329733d9 484 const struct scope_config *model = NULL;
8ab929d6 485
9a512113 486 /* SR_CONF_SCAN_OPTIONS is always valid, regardless of sdi or channel group. */
f3c60fb6
SA
487 if (key == SR_CONF_SCAN_OPTIONS) {
488 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
489 dlm_scanopts, ARRAY_SIZE(dlm_scanopts), sizeof(uint32_t));
490 return SR_OK;
491 }
8ab929d6 492
f3c60fb6
SA
493 /* If sdi is NULL, nothing except SR_CONF_DEVICE_OPTIONS can be provided. */
494 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
495 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
496 dlm_drvopts, ARRAY_SIZE(dlm_drvopts), sizeof(uint32_t));
497 return SR_OK;
cf0280fa 498 }
8ab929d6 499
f3c60fb6
SA
500 if (!sdi)
501 return SR_ERR_ARG;
502
503 devc = sdi->priv;
504 model = devc->model_config;
505
a9308652
UH
506 /*
507 * If cg is NULL, only the SR_CONF_DEVICE_OPTIONS that are not
9a512113 508 * specific to a channel group must be returned.
a9308652 509 */
f3c60fb6
SA
510 if (!cg) {
511 switch (key) {
512 case SR_CONF_DEVICE_OPTIONS:
513 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
514 dlm_devopts, ARRAY_SIZE(dlm_devopts), sizeof(uint32_t));
515 return SR_OK;
516 case SR_CONF_TIMEBASE:
517 *data = build_tuples(&dlm_timebases, ARRAY_SIZE(dlm_timebases));
518 return SR_OK;
519 case SR_CONF_TRIGGER_SOURCE:
520 if (!model)
521 return SR_ERR_ARG;
522 *data = g_variant_new_strv(*model->trigger_sources,
523 g_strv_length((char **)*model->trigger_sources));
524 return SR_OK;
525 case SR_CONF_TRIGGER_SLOPE:
526 *data = g_variant_new_strv(dlm_trigger_slopes,
527 g_strv_length((char **)dlm_trigger_slopes));
528 return SR_OK;
529 case SR_CONF_NUM_HDIV:
49f49cb5 530 *data = g_variant_new_uint32(model->num_xdivs);
f3c60fb6
SA
531 return SR_OK;
532 default:
533 return SR_ERR_NA;
534 }
535 }
536
537 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
538 return SR_ERR;
539
8ab929d6 540 switch (key) {
8ab929d6 541 case SR_CONF_DEVICE_OPTIONS:
f3c60fb6 542 if (cg_type == CG_ANALOG) {
584560f1 543 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f3c60fb6
SA
544 dlm_analog_devopts, ARRAY_SIZE(dlm_analog_devopts), sizeof(uint32_t));
545 } else if (cg_type == CG_DIGITAL) {
546 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
547 dlm_digital_devopts, ARRAY_SIZE(dlm_digital_devopts), sizeof(uint32_t));
8ab929d6 548 } else {
584560f1
BV
549 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
550 NULL, 0, sizeof(uint32_t));
8ab929d6
SA
551 }
552 break;
553 case SR_CONF_COUPLING:
554 if (cg_type == CG_NONE)
555 return SR_ERR_CHANNEL_GROUP;
556 *data = g_variant_new_strv(*model->coupling_options,
ac10a927 557 g_strv_length((char **)*model->coupling_options));
8ab929d6 558 break;
8ab929d6
SA
559 case SR_CONF_VDIV:
560 if (cg_type == CG_NONE)
561 return SR_ERR_CHANNEL_GROUP;
f3c60fb6 562 *data = build_tuples(&dlm_vdivs, ARRAY_SIZE(dlm_vdivs));
8ab929d6
SA
563 break;
564 default:
565 return SR_ERR_NA;
566 }
567
568 return SR_OK;
569}
570
571static int dlm_check_channels(GSList *channels)
572{
573 GSList *l;
574 struct sr_channel *ch;
575 gboolean enabled_pod1, enabled_chan4;
576
577 enabled_pod1 = enabled_chan4 = FALSE;
578
579 /* Note: On the DLM2000, CH4 and Logic are shared. */
580 /* TODO Handle non-DLM2000 models. */
581 for (l = channels; l; l = l->next) {
582 ch = l->data;
583 switch (ch->type) {
584 case SR_CHANNEL_ANALOG:
585 if (ch->index == 3)
586 enabled_chan4 = TRUE;
587 break;
588 case SR_CHANNEL_LOGIC:
589 enabled_pod1 = TRUE;
590 break;
591 default:
592 return SR_ERR;
593 }
594 }
595
596 if (enabled_pod1 && enabled_chan4)
597 return SR_ERR;
598
599 return SR_OK;
600}
601
695dc859 602static int dev_acquisition_start(const struct sr_dev_inst *sdi)
8ab929d6
SA
603{
604 GSList *l;
605 gboolean digital_added;
606 struct sr_channel *ch;
607 struct dev_context *devc;
608 struct sr_scpi_dev_inst *scpi;
609
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610 scpi = sdi->conn;
611 devc = sdi->priv;
612 digital_added = FALSE;
613
614 g_slist_free(devc->enabled_channels);
615 devc->enabled_channels = NULL;
616
617 for (l = sdi->channels; l; l = l->next) {
618 ch = l->data;
619 if (!ch->enabled)
620 continue;
621 /* Only add a single digital channel. */
622 if (ch->type != SR_CHANNEL_LOGIC || !digital_added) {
623 devc->enabled_channels = g_slist_append(
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624 devc->enabled_channels, ch);
625 if (ch->type == SR_CHANNEL_LOGIC)
626 digital_added = TRUE;
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627 }
628 }
629
630 if (!devc->enabled_channels)
631 return SR_ERR;
632
633 if (dlm_check_channels(devc->enabled_channels) != SR_OK) {
634 sr_err("Invalid channel configuration specified!");
635 return SR_ERR_NA;
636 }
637
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638 /* Request data for the first enabled channel. */
639 devc->current_channel = devc->enabled_channels;
640 dlm_channel_data_request(sdi);
641
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642 /* Call our callback when data comes in or after 5ms. */
643 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 5,
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644 dlm_data_receive, (void *)sdi);
645
646 return SR_OK;
647}
648
695dc859 649static int dev_acquisition_stop(struct sr_dev_inst *sdi)
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650{
651 struct dev_context *devc;
8ab929d6 652
bee2b016 653 std_session_send_df_end(sdi);
8ab929d6 654
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655 devc = sdi->priv;
656
657 devc->num_frames = 0;
658 g_slist_free(devc->enabled_channels);
659 devc->enabled_channels = NULL;
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660
661 sr_scpi_source_remove(sdi->session, sdi->conn);
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662
663 return SR_OK;
664}
10763937 665
dd5c48a6 666static struct sr_dev_driver yokogawa_dlm_driver_info = {
10763937 667 .name = "yokogawa-dlm",
ac10a927 668 .longname = "Yokogawa DL/DLM",
10763937 669 .api_version = 1,
c2fdcc25 670 .init = std_init,
700d6b64 671 .cleanup = std_cleanup,
8ab929d6 672 .scan = scan,
c01bf34c 673 .dev_list = std_dev_list,
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674 .dev_clear = dev_clear,
675 .config_get = config_get,
676 .config_set = config_set,
c65a021c 677 .config_channel_set = config_channel_set,
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678 .config_list = config_list,
679 .dev_open = dev_open,
680 .dev_close = dev_close,
681 .dev_acquisition_start = dev_acquisition_start,
682 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 683 .context = NULL,
10763937 684};
dd5c48a6 685SR_REGISTER_DEV_DRIVER(yokogawa_dlm_driver_info);