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[libsigrok.git] / src / hardware / yokogawa-dlm / api.c
CommitLineData
10763937
SA
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 abraxa (Soeren Apel) <soeren@apelpie.net>
5 * Based on the Hameg HMO driver by poljar (Damir Jelić) <poljarinho@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
10763937 22#include <stdlib.h>
5a1afc09 23#include "scpi.h"
10763937
SA
24#include "protocol.h"
25
dd5c48a6 26static struct sr_dev_driver yokogawa_dlm_driver_info;
8ab929d6 27
329733d9 28static const char *MANUFACTURER_ID = "YOKOGAWA";
8ab929d6 29
4b25cbff 30static const uint32_t scanopts[] = {
f3c60fb6
SA
31 SR_CONF_CONN,
32};
33
4b25cbff 34static const uint32_t drvopts[] = {
cf0280fa
AJ
35 SR_CONF_LOGIC_ANALYZER,
36 SR_CONF_OSCILLOSCOPE,
37};
38
4b25cbff 39static const uint32_t devopts[] = {
f3c60fb6
SA
40 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
41 SR_CONF_SAMPLERATE | SR_CONF_GET,
42 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_NUM_HDIV | SR_CONF_GET,
44 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
f3c60fb6 45 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 46 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
47};
48
6b82c3e5 49static const uint32_t devopts_cg_analog[] = {
f3c60fb6 50 SR_CONF_NUM_VDIV | SR_CONF_GET,
86621306
UH
51 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
53};
54
6b82c3e5 55static const uint32_t devopts_cg_digital[] = {
f3c60fb6
SA
56};
57
8ab929d6
SA
58enum {
59 CG_INVALID = -1,
60 CG_NONE,
61 CG_ANALOG,
62 CG_DIGITAL,
63};
64
373e92a4 65static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
8ab929d6
SA
66{
67 struct sr_dev_inst *sdi;
68 struct dev_context *devc;
69 struct sr_scpi_hw_info *hw_info;
70 char *model_name;
71 int model_index;
72
73 sdi = NULL;
74 devc = NULL;
75 hw_info = NULL;
76
77 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
78 sr_info("Couldn't get IDN response.");
79 goto fail;
80 }
81
82 if (strcmp(hw_info->manufacturer, MANUFACTURER_ID) != 0)
83 goto fail;
84
85 if (dlm_model_get(hw_info->model, &model_name, &model_index) != SR_OK)
86 goto fail;
87
aac29cc1 88 sdi = g_malloc0(sizeof(struct sr_dev_inst));
b15ff1c9 89 sdi->vendor = g_strdup("Yokogawa");
0af636be
UH
90 sdi->model = g_strdup(model_name);
91 sdi->version = g_strdup(hw_info->firmware_version);
8ab929d6 92
d1314831
SA
93 sdi->serial_num = g_strdup(hw_info->serial_number);
94
8ab929d6
SA
95 sr_scpi_hw_info_free(hw_info);
96 hw_info = NULL;
97
ac10a927 98 devc = g_malloc0(sizeof(struct dev_context));
8ab929d6 99
4f840ce9 100 sdi->driver = &yokogawa_dlm_driver_info;
8ab929d6
SA
101 sdi->priv = devc;
102 sdi->inst_type = SR_INST_SCPI;
103 sdi->conn = scpi;
104
105 if (dlm_device_init(sdi, model_index) != SR_OK)
106 goto fail;
107
8ab929d6
SA
108 return sdi;
109
110fail:
7b365c47 111 sr_scpi_hw_info_free(hw_info);
4bf93988 112 sr_dev_inst_free(sdi);
b1f83103 113 g_free(devc);
8ab929d6
SA
114
115 return NULL;
116}
117
4f840ce9 118static GSList *scan(struct sr_dev_driver *di, GSList *options)
8ab929d6 119{
373e92a4 120 return sr_scpi_scan(di->context, options, probe_device);
8ab929d6
SA
121}
122
3553451f 123static void clear_helper(struct dev_context *devc)
8ab929d6 124{
8ab929d6 125 dlm_scope_state_destroy(devc->model_state);
8ab929d6
SA
126 g_free(devc->analog_groups);
127 g_free(devc->digital_groups);
8ab929d6
SA
128}
129
4f840ce9 130static int dev_clear(const struct sr_dev_driver *di)
8ab929d6 131{
3553451f 132 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
8ab929d6
SA
133}
134
135static int dev_open(struct sr_dev_inst *sdi)
136{
6402c379 137 if (sr_scpi_open(sdi->conn) != SR_OK)
8ab929d6
SA
138 return SR_ERR;
139
140 if (dlm_scope_state_query(sdi) != SR_OK)
141 return SR_ERR;
142
8ab929d6
SA
143 return SR_OK;
144}
145
146static int dev_close(struct sr_dev_inst *sdi)
147{
f1ba6b4b 148 return sr_scpi_close(sdi->conn);
8ab929d6
SA
149}
150
8ab929d6
SA
151/**
152 * Check which category a given channel group belongs to.
153 *
154 * @param devc Our internal device context.
a9308652 155 * @param cg The channel group to check.
8ab929d6 156 *
a9308652
UH
157 * @retval CG_NONE cg is NULL
158 * @retval CG_ANALOG cg is an analog group
8ab929d6
SA
159 * @retval CG_DIGITAL cg is a digital group
160 * @retval CG_INVALID cg is something else
161 */
162static int check_channel_group(struct dev_context *devc,
ac10a927 163 const struct sr_channel_group *cg)
8ab929d6 164{
329733d9 165 const struct scope_config *model;
8ab929d6
SA
166
167 model = devc->model_config;
168
169 if (!cg)
170 return CG_NONE;
171
fcd6a8bd
UH
172 if (std_cg_idx(cg, devc->analog_groups, model->analog_channels) >= 0)
173 return CG_ANALOG;
8ab929d6 174
fcd6a8bd
UH
175 if (std_cg_idx(cg, devc->digital_groups, model->pods) >= 0)
176 return CG_DIGITAL;
8ab929d6
SA
177
178 sr_err("Invalid channel group specified.");
fcd6a8bd 179
8ab929d6
SA
180 return CG_INVALID;
181}
182
dd7a72ea
UH
183static int config_get(uint32_t key, GVariant **data,
184 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 185{
fcd6a8bd 186 int ret, cg_type, idx;
8ab929d6 187 struct dev_context *devc;
329733d9 188 const struct scope_config *model;
8ab929d6
SA
189 struct scope_state *state;
190
709468ba 191 if (!sdi)
8ab929d6
SA
192 return SR_ERR_ARG;
193
709468ba
UH
194 devc = sdi->priv;
195
8ab929d6
SA
196 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
197 return SR_ERR;
198
8ab929d6
SA
199 model = devc->model_config;
200 state = devc->model_state;
201
202 switch (key) {
bf622e6d 203 case SR_CONF_NUM_HDIV:
8ab929d6
SA
204 *data = g_variant_new_int32(model->num_xdivs);
205 ret = SR_OK;
206 break;
207 case SR_CONF_TIMEBASE:
208 *data = g_variant_new("(tt)",
f3c60fb6
SA
209 dlm_timebases[state->timebase][0],
210 dlm_timebases[state->timebase][1]);
8ab929d6
SA
211 ret = SR_OK;
212 break;
213 case SR_CONF_NUM_VDIV:
3782e571 214 if (!cg)
8ab929d6 215 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
216 if (cg_type != CG_ANALOG)
217 return SR_ERR_NA;
218 *data = g_variant_new_int32(model->num_ydivs);
219 ret = SR_OK;
8ab929d6
SA
220 break;
221 case SR_CONF_VDIV:
3782e571 222 if (!cg)
8ab929d6 223 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
224 if (cg_type != CG_ANALOG)
225 return SR_ERR_NA;
fcd6a8bd
UH
226 if ((idx = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
227 return SR_ERR_ARG;
228 *data = g_variant_new("(tt)",
229 dlm_vdivs[state->analog_states[idx].vdiv][0],
230 dlm_vdivs[state->analog_states[idx].vdiv][1]);
231 ret = SR_OK;
8ab929d6
SA
232 break;
233 case SR_CONF_TRIGGER_SOURCE:
234 *data = g_variant_new_string((*model->trigger_sources)[state->trigger_source]);
235 ret = SR_OK;
236 break;
237 case SR_CONF_TRIGGER_SLOPE:
f3c60fb6 238 *data = g_variant_new_string(dlm_trigger_slopes[state->trigger_slope]);
8ab929d6
SA
239 ret = SR_OK;
240 break;
241 case SR_CONF_HORIZ_TRIGGERPOS:
242 *data = g_variant_new_double(state->horiz_triggerpos);
243 ret = SR_OK;
244 break;
245 case SR_CONF_COUPLING:
3782e571 246 if (!cg)
8ab929d6 247 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
248 if (cg_type != CG_ANALOG)
249 return SR_ERR_NA;
fcd6a8bd
UH
250 if ((idx = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
251 return SR_ERR_ARG;
252 *data = g_variant_new_string((*model->coupling_options)[state->analog_states[idx].coupling]);
253 ret = SR_OK;
8ab929d6
SA
254 break;
255 case SR_CONF_SAMPLERATE:
256 *data = g_variant_new_uint64(state->sample_rate);
257 ret = SR_OK;
258 break;
259 default:
260 ret = SR_ERR_NA;
261 }
262
263 return ret;
264}
265
dd7a72ea
UH
266static int config_set(uint32_t key, GVariant *data,
267 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 268{
fcd6a8bd 269 int ret, cg_type, idx, j;
8ab929d6
SA
270 char float_str[30];
271 struct dev_context *devc;
329733d9 272 const struct scope_config *model;
8ab929d6 273 struct scope_state *state;
8ab929d6
SA
274 double tmp_d;
275 gboolean update_sample_rate;
276
277 if (!sdi || !(devc = sdi->priv))
278 return SR_ERR_ARG;
279
280 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
281 return SR_ERR;
282
283 model = devc->model_config;
284 state = devc->model_state;
285 update_sample_rate = FALSE;
286
287 ret = SR_ERR_NA;
288
289 switch (key) {
290 case SR_CONF_LIMIT_FRAMES:
291 devc->frame_limit = g_variant_get_uint64(data);
292 ret = SR_OK;
293 break;
294 case SR_CONF_TRIGGER_SOURCE:
bd633efa
UH
295 if ((idx = std_str_idx(data, *model->trigger_sources, model->num_trigger_sources)) < 0)
296 return SR_ERR_ARG;
297 state->trigger_source = idx;
298 /* TODO: A and B trigger support possible? */
299 ret = dlm_trigger_source_set(sdi->conn, (*model->trigger_sources)[idx]);
8ab929d6
SA
300 break;
301 case SR_CONF_VDIV:
61233697 302 if (!cg)
8ab929d6 303 return SR_ERR_CHANNEL_GROUP;
697fb6dd
UH
304 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_vdivs))) < 0)
305 return SR_ERR_ARG;
fcd6a8bd
UH
306 if ((j = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
307 return SR_ERR_ARG;
308 state->analog_states[j].vdiv = idx;
309 g_ascii_formatd(float_str, sizeof(float_str),
310 "%E", (float) dlm_vdivs[idx][0] / dlm_vdivs[idx][1]);
311 if (dlm_analog_chan_vdiv_set(sdi->conn, j + 1, float_str) != SR_OK ||
312 sr_scpi_get_opc(sdi->conn) != SR_OK)
313 return SR_ERR;
697fb6dd 314 ret = SR_OK;
8ab929d6
SA
315 break;
316 case SR_CONF_TIMEBASE:
697fb6dd
UH
317 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_timebases))) < 0)
318 return SR_ERR_ARG;
319 state->timebase = idx;
320 g_ascii_formatd(float_str, sizeof(float_str),
321 "%E", (float) dlm_timebases[idx][0] / dlm_timebases[idx][1]);
322 ret = dlm_timebase_set(sdi->conn, float_str);
323 update_sample_rate = TRUE;
8ab929d6
SA
324 break;
325 case SR_CONF_HORIZ_TRIGGERPOS:
326 tmp_d = g_variant_get_double(data);
327
328 /* TODO: Check if the calculation makes sense for the DLM. */
329 if (tmp_d < 0.0 || tmp_d > 1.0)
330 return SR_ERR;
331
332 state->horiz_triggerpos = tmp_d;
333 tmp_d = -(tmp_d - 0.5) *
f3c60fb6
SA
334 ((double) dlm_timebases[state->timebase][0] /
335 dlm_timebases[state->timebase][1])
ac10a927 336 * model->num_xdivs;
8ab929d6
SA
337
338 g_ascii_formatd(float_str, sizeof(float_str), "%E", tmp_d);
339 ret = dlm_horiz_trigger_pos_set(sdi->conn, float_str);
340 break;
341 case SR_CONF_TRIGGER_SLOPE:
bd633efa 342 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(dlm_trigger_slopes))) < 0)
8ab929d6 343 return SR_ERR_ARG;
8ab929d6 344 /* Note: See dlm_trigger_slopes[] in protocol.c. */
bd633efa 345 state->trigger_slope = idx;
8ab929d6
SA
346 ret = dlm_trigger_slope_set(sdi->conn, state->trigger_slope);
347 break;
348 case SR_CONF_COUPLING:
61233697 349 if (!cg)
8ab929d6 350 return SR_ERR_CHANNEL_GROUP;
bd633efa
UH
351 if ((idx = std_str_idx(data, *model->coupling_options, model->num_coupling_options)) < 0)
352 return SR_ERR_ARG;
fcd6a8bd
UH
353 if ((j = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
354 return SR_ERR_ARG;
355 state->analog_states[j].coupling = idx;
356 if (dlm_analog_chan_coupl_set(sdi->conn, j + 1, (*model->coupling_options)[idx]) != SR_OK ||
357 sr_scpi_get_opc(sdi->conn) != SR_OK)
358 return SR_ERR;
bd633efa 359 ret = SR_OK;
8ab929d6
SA
360 break;
361 default:
362 ret = SR_ERR_NA;
363 break;
364 }
365
366 if (ret == SR_OK)
367 ret = sr_scpi_get_opc(sdi->conn);
368
369 if (ret == SR_OK && update_sample_rate)
370 ret = dlm_sample_rate_query(sdi);
371
372 return ret;
373}
374
c65a021c 375static int config_channel_set(const struct sr_dev_inst *sdi,
dd7a72ea 376 struct sr_channel *ch, unsigned int changes)
c65a021c 377{
a9308652 378 /* Currently we only handle SR_CHANNEL_SET_ENABLED. */
c65a021c
SA
379 if (changes != SR_CHANNEL_SET_ENABLED)
380 return SR_ERR_NA;
381
382 return dlm_channel_state_set(sdi, ch->index, ch->enabled);
383}
384
dd7a72ea
UH
385static int config_list(uint32_t key, GVariant **data,
386 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 387{
cf0280fa 388 int cg_type = CG_NONE;
e66d1892
UH
389 struct dev_context *devc;
390 const struct scope_config *model;
f3c60fb6 391
e66d1892
UH
392 devc = (sdi) ? sdi->priv : NULL;
393 model = (devc) ? devc->model_config : NULL;
f3c60fb6 394
f3c60fb6
SA
395 if (!cg) {
396 switch (key) {
e66d1892 397 case SR_CONF_SCAN_OPTIONS:
f3c60fb6 398 case SR_CONF_DEVICE_OPTIONS:
4b25cbff 399 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
f3c60fb6 400 case SR_CONF_TIMEBASE:
58ffcf97 401 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_timebases));
f3c60fb6
SA
402 return SR_OK;
403 case SR_CONF_TRIGGER_SOURCE:
404 if (!model)
405 return SR_ERR_ARG;
692716f5 406 *data = g_variant_new_strv(*model->trigger_sources, model->num_trigger_sources);
f3c60fb6
SA
407 return SR_OK;
408 case SR_CONF_TRIGGER_SLOPE:
692716f5 409 *data = g_variant_new_strv(ARRAY_AND_SIZE(dlm_trigger_slopes));
f3c60fb6
SA
410 return SR_OK;
411 case SR_CONF_NUM_HDIV:
49f49cb5 412 *data = g_variant_new_uint32(model->num_xdivs);
f3c60fb6
SA
413 return SR_OK;
414 default:
415 return SR_ERR_NA;
416 }
417 }
418
419 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
420 return SR_ERR;
421
8ab929d6 422 switch (key) {
8ab929d6 423 case SR_CONF_DEVICE_OPTIONS:
105df674 424 if (cg_type == CG_ANALOG)
53012da6 425 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
105df674 426 else if (cg_type == CG_DIGITAL)
53012da6 427 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_digital));
105df674
UH
428 else
429 *data = std_gvar_array_u32(NULL, 0);
8ab929d6
SA
430 break;
431 case SR_CONF_COUPLING:
61233697 432 if (!cg)
8ab929d6 433 return SR_ERR_CHANNEL_GROUP;
692716f5 434 *data = g_variant_new_strv(*model->coupling_options, model->num_coupling_options);
8ab929d6 435 break;
8ab929d6 436 case SR_CONF_VDIV:
61233697 437 if (!cg)
8ab929d6 438 return SR_ERR_CHANNEL_GROUP;
58ffcf97 439 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_vdivs));
8ab929d6
SA
440 break;
441 default:
442 return SR_ERR_NA;
443 }
444
445 return SR_OK;
446}
447
448static int dlm_check_channels(GSList *channels)
449{
450 GSList *l;
451 struct sr_channel *ch;
452 gboolean enabled_pod1, enabled_chan4;
453
454 enabled_pod1 = enabled_chan4 = FALSE;
455
456 /* Note: On the DLM2000, CH4 and Logic are shared. */
457 /* TODO Handle non-DLM2000 models. */
458 for (l = channels; l; l = l->next) {
459 ch = l->data;
460 switch (ch->type) {
461 case SR_CHANNEL_ANALOG:
462 if (ch->index == 3)
463 enabled_chan4 = TRUE;
464 break;
465 case SR_CHANNEL_LOGIC:
466 enabled_pod1 = TRUE;
467 break;
468 default:
469 return SR_ERR;
470 }
471 }
472
473 if (enabled_pod1 && enabled_chan4)
474 return SR_ERR;
475
476 return SR_OK;
477}
478
695dc859 479static int dev_acquisition_start(const struct sr_dev_inst *sdi)
8ab929d6
SA
480{
481 GSList *l;
482 gboolean digital_added;
483 struct sr_channel *ch;
484 struct dev_context *devc;
485 struct sr_scpi_dev_inst *scpi;
486
8ab929d6
SA
487 scpi = sdi->conn;
488 devc = sdi->priv;
489 digital_added = FALSE;
490
491 g_slist_free(devc->enabled_channels);
492 devc->enabled_channels = NULL;
493
494 for (l = sdi->channels; l; l = l->next) {
495 ch = l->data;
496 if (!ch->enabled)
497 continue;
498 /* Only add a single digital channel. */
499 if (ch->type != SR_CHANNEL_LOGIC || !digital_added) {
500 devc->enabled_channels = g_slist_append(
ac10a927
SA
501 devc->enabled_channels, ch);
502 if (ch->type == SR_CHANNEL_LOGIC)
503 digital_added = TRUE;
8ab929d6
SA
504 }
505 }
506
507 if (!devc->enabled_channels)
508 return SR_ERR;
509
510 if (dlm_check_channels(devc->enabled_channels) != SR_OK) {
511 sr_err("Invalid channel configuration specified!");
512 return SR_ERR_NA;
513 }
514
af3487ec
SA
515 /* Request data for the first enabled channel. */
516 devc->current_channel = devc->enabled_channels;
517 dlm_channel_data_request(sdi);
518
0028d5a1 519 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 5,
8ab929d6
SA
520 dlm_data_receive, (void *)sdi);
521
522 return SR_OK;
523}
524
695dc859 525static int dev_acquisition_stop(struct sr_dev_inst *sdi)
8ab929d6
SA
526{
527 struct dev_context *devc;
8ab929d6 528
bee2b016 529 std_session_send_df_end(sdi);
8ab929d6 530
8ab929d6
SA
531 devc = sdi->priv;
532
533 devc->num_frames = 0;
534 g_slist_free(devc->enabled_channels);
535 devc->enabled_channels = NULL;
af3487ec
SA
536
537 sr_scpi_source_remove(sdi->session, sdi->conn);
8ab929d6
SA
538
539 return SR_OK;
540}
10763937 541
dd5c48a6 542static struct sr_dev_driver yokogawa_dlm_driver_info = {
10763937 543 .name = "yokogawa-dlm",
ac10a927 544 .longname = "Yokogawa DL/DLM",
10763937 545 .api_version = 1,
c2fdcc25 546 .init = std_init,
700d6b64 547 .cleanup = std_cleanup,
8ab929d6 548 .scan = scan,
c01bf34c 549 .dev_list = std_dev_list,
8ab929d6
SA
550 .dev_clear = dev_clear,
551 .config_get = config_get,
552 .config_set = config_set,
c65a021c 553 .config_channel_set = config_channel_set,
8ab929d6
SA
554 .config_list = config_list,
555 .dev_open = dev_open,
556 .dev_close = dev_close,
557 .dev_acquisition_start = dev_acquisition_start,
558 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 559 .context = NULL,
10763937 560};
dd5c48a6 561SR_REGISTER_DEV_DRIVER(yokogawa_dlm_driver_info);