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scpi-pps: don't break SCPI devices when scanning for HP-IB devices
[libsigrok.git] / src / hardware / yokogawa-dlm / api.c
CommitLineData
10763937
SA
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 abraxa (Soeren Apel) <soeren@apelpie.net>
5 * Based on the Hameg HMO driver by poljar (Damir Jelić) <poljarinho@gmail.com>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
10763937 22#include <stdlib.h>
5a1afc09 23#include "scpi.h"
10763937
SA
24#include "protocol.h"
25
dd5c48a6 26static struct sr_dev_driver yokogawa_dlm_driver_info;
8ab929d6 27
329733d9 28static const char *MANUFACTURER_ID = "YOKOGAWA";
8ab929d6 29
4b25cbff 30static const uint32_t scanopts[] = {
f3c60fb6
SA
31 SR_CONF_CONN,
32};
33
4b25cbff 34static const uint32_t drvopts[] = {
cf0280fa
AJ
35 SR_CONF_LOGIC_ANALYZER,
36 SR_CONF_OSCILLOSCOPE,
37};
38
4b25cbff 39static const uint32_t devopts[] = {
f3c60fb6
SA
40 SR_CONF_LIMIT_FRAMES | SR_CONF_GET | SR_CONF_SET,
41 SR_CONF_SAMPLERATE | SR_CONF_GET,
42 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_NUM_HDIV | SR_CONF_GET,
44 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_GET | SR_CONF_SET,
f3c60fb6 45 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
86621306 46 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
47};
48
6b82c3e5 49static const uint32_t devopts_cg_analog[] = {
f3c60fb6 50 SR_CONF_NUM_VDIV | SR_CONF_GET,
86621306
UH
51 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
f3c60fb6
SA
53};
54
6b82c3e5 55static const uint32_t devopts_cg_digital[] = {
f3c60fb6
SA
56};
57
8ab929d6
SA
58enum {
59 CG_INVALID = -1,
60 CG_NONE,
61 CG_ANALOG,
62 CG_DIGITAL,
63};
64
373e92a4 65static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
8ab929d6
SA
66{
67 struct sr_dev_inst *sdi;
68 struct dev_context *devc;
69 struct sr_scpi_hw_info *hw_info;
70 char *model_name;
71 int model_index;
72
73 sdi = NULL;
74 devc = NULL;
75 hw_info = NULL;
76
77 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
78 sr_info("Couldn't get IDN response.");
79 goto fail;
80 }
81
82 if (strcmp(hw_info->manufacturer, MANUFACTURER_ID) != 0)
83 goto fail;
84
85 if (dlm_model_get(hw_info->model, &model_name, &model_index) != SR_OK)
86 goto fail;
87
aac29cc1 88 sdi = g_malloc0(sizeof(struct sr_dev_inst));
b15ff1c9 89 sdi->vendor = g_strdup("Yokogawa");
0af636be
UH
90 sdi->model = g_strdup(model_name);
91 sdi->version = g_strdup(hw_info->firmware_version);
8ab929d6 92
d1314831
SA
93 sdi->serial_num = g_strdup(hw_info->serial_number);
94
8ab929d6
SA
95 sr_scpi_hw_info_free(hw_info);
96 hw_info = NULL;
97
ac10a927 98 devc = g_malloc0(sizeof(struct dev_context));
8ab929d6 99
4f840ce9 100 sdi->driver = &yokogawa_dlm_driver_info;
8ab929d6
SA
101 sdi->priv = devc;
102 sdi->inst_type = SR_INST_SCPI;
103 sdi->conn = scpi;
104
105 if (dlm_device_init(sdi, model_index) != SR_OK)
106 goto fail;
107
8ab929d6
SA
108 return sdi;
109
110fail:
7b365c47 111 sr_scpi_hw_info_free(hw_info);
4bf93988 112 sr_dev_inst_free(sdi);
b1f83103 113 g_free(devc);
8ab929d6
SA
114
115 return NULL;
116}
117
4f840ce9 118static GSList *scan(struct sr_dev_driver *di, GSList *options)
8ab929d6 119{
373e92a4 120 return sr_scpi_scan(di->context, options, probe_device);
8ab929d6
SA
121}
122
3553451f 123static void clear_helper(struct dev_context *devc)
8ab929d6 124{
8ab929d6 125 dlm_scope_state_destroy(devc->model_state);
8ab929d6
SA
126 g_free(devc->analog_groups);
127 g_free(devc->digital_groups);
8ab929d6
SA
128}
129
4f840ce9 130static int dev_clear(const struct sr_dev_driver *di)
8ab929d6 131{
3553451f 132 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
8ab929d6
SA
133}
134
135static int dev_open(struct sr_dev_inst *sdi)
136{
6402c379 137 if (sr_scpi_open(sdi->conn) != SR_OK)
8ab929d6
SA
138 return SR_ERR;
139
140 if (dlm_scope_state_query(sdi) != SR_OK)
141 return SR_ERR;
142
8ab929d6
SA
143 return SR_OK;
144}
145
146static int dev_close(struct sr_dev_inst *sdi)
147{
f1ba6b4b 148 return sr_scpi_close(sdi->conn);
8ab929d6
SA
149}
150
8ab929d6
SA
151/**
152 * Check which category a given channel group belongs to.
153 *
154 * @param devc Our internal device context.
a9308652 155 * @param cg The channel group to check.
8ab929d6 156 *
a9308652
UH
157 * @retval CG_NONE cg is NULL
158 * @retval CG_ANALOG cg is an analog group
8ab929d6
SA
159 * @retval CG_DIGITAL cg is a digital group
160 * @retval CG_INVALID cg is something else
161 */
162static int check_channel_group(struct dev_context *devc,
ac10a927 163 const struct sr_channel_group *cg)
8ab929d6 164{
329733d9 165 const struct scope_config *model;
8ab929d6 166
93b5cd69
GS
167 if (!devc)
168 return CG_INVALID;
8ab929d6
SA
169 model = devc->model_config;
170
171 if (!cg)
172 return CG_NONE;
173
fcd6a8bd
UH
174 if (std_cg_idx(cg, devc->analog_groups, model->analog_channels) >= 0)
175 return CG_ANALOG;
8ab929d6 176
fcd6a8bd
UH
177 if (std_cg_idx(cg, devc->digital_groups, model->pods) >= 0)
178 return CG_DIGITAL;
8ab929d6
SA
179
180 sr_err("Invalid channel group specified.");
fcd6a8bd 181
8ab929d6
SA
182 return CG_INVALID;
183}
184
dd7a72ea
UH
185static int config_get(uint32_t key, GVariant **data,
186 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 187{
fcd6a8bd 188 int ret, cg_type, idx;
8ab929d6 189 struct dev_context *devc;
329733d9 190 const struct scope_config *model;
8ab929d6
SA
191 struct scope_state *state;
192
709468ba 193 if (!sdi)
8ab929d6
SA
194 return SR_ERR_ARG;
195
709468ba
UH
196 devc = sdi->priv;
197
8ab929d6
SA
198 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
199 return SR_ERR;
200
8ab929d6
SA
201 model = devc->model_config;
202 state = devc->model_state;
203
204 switch (key) {
bf622e6d 205 case SR_CONF_NUM_HDIV:
8ab929d6
SA
206 *data = g_variant_new_int32(model->num_xdivs);
207 ret = SR_OK;
208 break;
209 case SR_CONF_TIMEBASE:
210 *data = g_variant_new("(tt)",
f3c60fb6
SA
211 dlm_timebases[state->timebase][0],
212 dlm_timebases[state->timebase][1]);
8ab929d6
SA
213 ret = SR_OK;
214 break;
215 case SR_CONF_NUM_VDIV:
3782e571 216 if (!cg)
8ab929d6 217 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
218 if (cg_type != CG_ANALOG)
219 return SR_ERR_NA;
220 *data = g_variant_new_int32(model->num_ydivs);
221 ret = SR_OK;
8ab929d6
SA
222 break;
223 case SR_CONF_VDIV:
3782e571 224 if (!cg)
8ab929d6 225 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
226 if (cg_type != CG_ANALOG)
227 return SR_ERR_NA;
fcd6a8bd
UH
228 if ((idx = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
229 return SR_ERR_ARG;
230 *data = g_variant_new("(tt)",
231 dlm_vdivs[state->analog_states[idx].vdiv][0],
232 dlm_vdivs[state->analog_states[idx].vdiv][1]);
233 ret = SR_OK;
8ab929d6
SA
234 break;
235 case SR_CONF_TRIGGER_SOURCE:
236 *data = g_variant_new_string((*model->trigger_sources)[state->trigger_source]);
237 ret = SR_OK;
238 break;
239 case SR_CONF_TRIGGER_SLOPE:
f3c60fb6 240 *data = g_variant_new_string(dlm_trigger_slopes[state->trigger_slope]);
8ab929d6
SA
241 ret = SR_OK;
242 break;
243 case SR_CONF_HORIZ_TRIGGERPOS:
244 *data = g_variant_new_double(state->horiz_triggerpos);
245 ret = SR_OK;
246 break;
247 case SR_CONF_COUPLING:
3782e571 248 if (!cg)
8ab929d6 249 return SR_ERR_CHANNEL_GROUP;
3782e571
UH
250 if (cg_type != CG_ANALOG)
251 return SR_ERR_NA;
fcd6a8bd
UH
252 if ((idx = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
253 return SR_ERR_ARG;
254 *data = g_variant_new_string((*model->coupling_options)[state->analog_states[idx].coupling]);
255 ret = SR_OK;
8ab929d6
SA
256 break;
257 case SR_CONF_SAMPLERATE:
258 *data = g_variant_new_uint64(state->sample_rate);
259 ret = SR_OK;
260 break;
261 default:
262 ret = SR_ERR_NA;
263 }
264
265 return ret;
266}
267
dd7a72ea
UH
268static int config_set(uint32_t key, GVariant *data,
269 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 270{
fcd6a8bd 271 int ret, cg_type, idx, j;
8ab929d6
SA
272 char float_str[30];
273 struct dev_context *devc;
329733d9 274 const struct scope_config *model;
8ab929d6 275 struct scope_state *state;
8ab929d6
SA
276 double tmp_d;
277 gboolean update_sample_rate;
278
279 if (!sdi || !(devc = sdi->priv))
280 return SR_ERR_ARG;
281
282 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
283 return SR_ERR;
284
285 model = devc->model_config;
286 state = devc->model_state;
287 update_sample_rate = FALSE;
288
8ab929d6
SA
289 switch (key) {
290 case SR_CONF_LIMIT_FRAMES:
291 devc->frame_limit = g_variant_get_uint64(data);
292 ret = SR_OK;
293 break;
294 case SR_CONF_TRIGGER_SOURCE:
bd633efa
UH
295 if ((idx = std_str_idx(data, *model->trigger_sources, model->num_trigger_sources)) < 0)
296 return SR_ERR_ARG;
297 state->trigger_source = idx;
298 /* TODO: A and B trigger support possible? */
299 ret = dlm_trigger_source_set(sdi->conn, (*model->trigger_sources)[idx]);
8ab929d6
SA
300 break;
301 case SR_CONF_VDIV:
61233697 302 if (!cg)
8ab929d6 303 return SR_ERR_CHANNEL_GROUP;
697fb6dd
UH
304 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_vdivs))) < 0)
305 return SR_ERR_ARG;
fcd6a8bd
UH
306 if ((j = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
307 return SR_ERR_ARG;
308 state->analog_states[j].vdiv = idx;
309 g_ascii_formatd(float_str, sizeof(float_str),
310 "%E", (float) dlm_vdivs[idx][0] / dlm_vdivs[idx][1]);
311 if (dlm_analog_chan_vdiv_set(sdi->conn, j + 1, float_str) != SR_OK ||
312 sr_scpi_get_opc(sdi->conn) != SR_OK)
313 return SR_ERR;
697fb6dd 314 ret = SR_OK;
8ab929d6
SA
315 break;
316 case SR_CONF_TIMEBASE:
697fb6dd
UH
317 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(dlm_timebases))) < 0)
318 return SR_ERR_ARG;
319 state->timebase = idx;
320 g_ascii_formatd(float_str, sizeof(float_str),
321 "%E", (float) dlm_timebases[idx][0] / dlm_timebases[idx][1]);
322 ret = dlm_timebase_set(sdi->conn, float_str);
323 update_sample_rate = TRUE;
8ab929d6
SA
324 break;
325 case SR_CONF_HORIZ_TRIGGERPOS:
326 tmp_d = g_variant_get_double(data);
327
328 /* TODO: Check if the calculation makes sense for the DLM. */
329 if (tmp_d < 0.0 || tmp_d > 1.0)
330 return SR_ERR;
331
332 state->horiz_triggerpos = tmp_d;
333 tmp_d = -(tmp_d - 0.5) *
f3c60fb6
SA
334 ((double) dlm_timebases[state->timebase][0] /
335 dlm_timebases[state->timebase][1])
ac10a927 336 * model->num_xdivs;
8ab929d6
SA
337
338 g_ascii_formatd(float_str, sizeof(float_str), "%E", tmp_d);
339 ret = dlm_horiz_trigger_pos_set(sdi->conn, float_str);
340 break;
341 case SR_CONF_TRIGGER_SLOPE:
bd633efa 342 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(dlm_trigger_slopes))) < 0)
8ab929d6 343 return SR_ERR_ARG;
8ab929d6 344 /* Note: See dlm_trigger_slopes[] in protocol.c. */
bd633efa 345 state->trigger_slope = idx;
8ab929d6
SA
346 ret = dlm_trigger_slope_set(sdi->conn, state->trigger_slope);
347 break;
348 case SR_CONF_COUPLING:
61233697 349 if (!cg)
8ab929d6 350 return SR_ERR_CHANNEL_GROUP;
bd633efa
UH
351 if ((idx = std_str_idx(data, *model->coupling_options, model->num_coupling_options)) < 0)
352 return SR_ERR_ARG;
fcd6a8bd
UH
353 if ((j = std_cg_idx(cg, devc->analog_groups, model->analog_channels)) < 0)
354 return SR_ERR_ARG;
355 state->analog_states[j].coupling = idx;
356 if (dlm_analog_chan_coupl_set(sdi->conn, j + 1, (*model->coupling_options)[idx]) != SR_OK ||
357 sr_scpi_get_opc(sdi->conn) != SR_OK)
358 return SR_ERR;
bd633efa 359 ret = SR_OK;
8ab929d6
SA
360 break;
361 default:
362 ret = SR_ERR_NA;
363 break;
364 }
365
366 if (ret == SR_OK)
367 ret = sr_scpi_get_opc(sdi->conn);
368
369 if (ret == SR_OK && update_sample_rate)
370 ret = dlm_sample_rate_query(sdi);
371
372 return ret;
373}
374
c65a021c 375static int config_channel_set(const struct sr_dev_inst *sdi,
dd7a72ea 376 struct sr_channel *ch, unsigned int changes)
c65a021c 377{
a9308652 378 /* Currently we only handle SR_CHANNEL_SET_ENABLED. */
c65a021c
SA
379 if (changes != SR_CHANNEL_SET_ENABLED)
380 return SR_ERR_NA;
381
382 return dlm_channel_state_set(sdi, ch->index, ch->enabled);
383}
384
dd7a72ea
UH
385static int config_list(uint32_t key, GVariant **data,
386 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
8ab929d6 387{
cf0280fa 388 int cg_type = CG_NONE;
e66d1892
UH
389 struct dev_context *devc;
390 const struct scope_config *model;
f3c60fb6 391
e66d1892
UH
392 devc = (sdi) ? sdi->priv : NULL;
393 model = (devc) ? devc->model_config : NULL;
f3c60fb6 394
f3c60fb6
SA
395 if (!cg) {
396 switch (key) {
e66d1892 397 case SR_CONF_SCAN_OPTIONS:
f3c60fb6 398 case SR_CONF_DEVICE_OPTIONS:
4b25cbff 399 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
f3c60fb6 400 case SR_CONF_TIMEBASE:
58ffcf97 401 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_timebases));
f3c60fb6
SA
402 return SR_OK;
403 case SR_CONF_TRIGGER_SOURCE:
404 if (!model)
405 return SR_ERR_ARG;
692716f5 406 *data = g_variant_new_strv(*model->trigger_sources, model->num_trigger_sources);
f3c60fb6
SA
407 return SR_OK;
408 case SR_CONF_TRIGGER_SLOPE:
692716f5 409 *data = g_variant_new_strv(ARRAY_AND_SIZE(dlm_trigger_slopes));
f3c60fb6
SA
410 return SR_OK;
411 case SR_CONF_NUM_HDIV:
93b5cd69
GS
412 if (!model)
413 return SR_ERR_ARG;
49f49cb5 414 *data = g_variant_new_uint32(model->num_xdivs);
f3c60fb6
SA
415 return SR_OK;
416 default:
417 return SR_ERR_NA;
418 }
419 }
420
421 if ((cg_type = check_channel_group(devc, cg)) == CG_INVALID)
422 return SR_ERR;
423
8ab929d6 424 switch (key) {
8ab929d6 425 case SR_CONF_DEVICE_OPTIONS:
105df674 426 if (cg_type == CG_ANALOG)
53012da6 427 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
105df674 428 else if (cg_type == CG_DIGITAL)
53012da6 429 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_digital));
105df674
UH
430 else
431 *data = std_gvar_array_u32(NULL, 0);
8ab929d6
SA
432 break;
433 case SR_CONF_COUPLING:
61233697 434 if (!cg)
8ab929d6 435 return SR_ERR_CHANNEL_GROUP;
692716f5 436 *data = g_variant_new_strv(*model->coupling_options, model->num_coupling_options);
8ab929d6 437 break;
8ab929d6 438 case SR_CONF_VDIV:
61233697 439 if (!cg)
8ab929d6 440 return SR_ERR_CHANNEL_GROUP;
58ffcf97 441 *data = std_gvar_tuple_array(ARRAY_AND_SIZE(dlm_vdivs));
8ab929d6
SA
442 break;
443 default:
444 return SR_ERR_NA;
445 }
446
447 return SR_OK;
448}
449
450static int dlm_check_channels(GSList *channels)
451{
452 GSList *l;
453 struct sr_channel *ch;
454 gboolean enabled_pod1, enabled_chan4;
455
456 enabled_pod1 = enabled_chan4 = FALSE;
457
458 /* Note: On the DLM2000, CH4 and Logic are shared. */
459 /* TODO Handle non-DLM2000 models. */
460 for (l = channels; l; l = l->next) {
461 ch = l->data;
462 switch (ch->type) {
463 case SR_CHANNEL_ANALOG:
464 if (ch->index == 3)
465 enabled_chan4 = TRUE;
466 break;
467 case SR_CHANNEL_LOGIC:
468 enabled_pod1 = TRUE;
469 break;
470 default:
471 return SR_ERR;
472 }
473 }
474
475 if (enabled_pod1 && enabled_chan4)
476 return SR_ERR;
477
478 return SR_OK;
479}
480
695dc859 481static int dev_acquisition_start(const struct sr_dev_inst *sdi)
8ab929d6
SA
482{
483 GSList *l;
484 gboolean digital_added;
485 struct sr_channel *ch;
486 struct dev_context *devc;
487 struct sr_scpi_dev_inst *scpi;
488
8ab929d6
SA
489 scpi = sdi->conn;
490 devc = sdi->priv;
491 digital_added = FALSE;
492
493 g_slist_free(devc->enabled_channels);
494 devc->enabled_channels = NULL;
495
496 for (l = sdi->channels; l; l = l->next) {
497 ch = l->data;
498 if (!ch->enabled)
499 continue;
500 /* Only add a single digital channel. */
501 if (ch->type != SR_CHANNEL_LOGIC || !digital_added) {
502 devc->enabled_channels = g_slist_append(
ac10a927
SA
503 devc->enabled_channels, ch);
504 if (ch->type == SR_CHANNEL_LOGIC)
505 digital_added = TRUE;
8ab929d6
SA
506 }
507 }
508
509 if (!devc->enabled_channels)
510 return SR_ERR;
511
512 if (dlm_check_channels(devc->enabled_channels) != SR_OK) {
513 sr_err("Invalid channel configuration specified!");
514 return SR_ERR_NA;
515 }
516
af3487ec
SA
517 /* Request data for the first enabled channel. */
518 devc->current_channel = devc->enabled_channels;
519 dlm_channel_data_request(sdi);
520
0028d5a1 521 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 5,
8ab929d6
SA
522 dlm_data_receive, (void *)sdi);
523
524 return SR_OK;
525}
526
695dc859 527static int dev_acquisition_stop(struct sr_dev_inst *sdi)
8ab929d6
SA
528{
529 struct dev_context *devc;
8ab929d6 530
bee2b016 531 std_session_send_df_end(sdi);
8ab929d6 532
8ab929d6
SA
533 devc = sdi->priv;
534
535 devc->num_frames = 0;
536 g_slist_free(devc->enabled_channels);
537 devc->enabled_channels = NULL;
af3487ec
SA
538
539 sr_scpi_source_remove(sdi->session, sdi->conn);
8ab929d6
SA
540
541 return SR_OK;
542}
10763937 543
dd5c48a6 544static struct sr_dev_driver yokogawa_dlm_driver_info = {
10763937 545 .name = "yokogawa-dlm",
ac10a927 546 .longname = "Yokogawa DL/DLM",
10763937 547 .api_version = 1,
c2fdcc25 548 .init = std_init,
700d6b64 549 .cleanup = std_cleanup,
8ab929d6 550 .scan = scan,
c01bf34c 551 .dev_list = std_dev_list,
8ab929d6
SA
552 .dev_clear = dev_clear,
553 .config_get = config_get,
554 .config_set = config_set,
c65a021c 555 .config_channel_set = config_channel_set,
8ab929d6
SA
556 .config_list = config_list,
557 .dev_open = dev_open,
558 .dev_close = dev_close,
559 .dev_acquisition_start = dev_acquisition_start,
560 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 561 .context = NULL,
10763937 562};
dd5c48a6 563SR_REGISTER_DEV_DRIVER(yokogawa_dlm_driver_info);