[libsigrok.git] / src / hardware / sysclk-lwla / protocol.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include <string.h>
#include "lwla.h"
#include "protocol.h"

/* Status polling interval during acquisition.
 */
#define POLL_INTERVAL 100 /* ms */

/* Submit an already filled-in USB transfer.
 */
static int submit_transfer(struct dev_context *devc,
			   struct libusb_transfer *xfer)
{
	int ret;

	ret = libusb_submit_transfer(xfer);

	if (ret != 0) {
		sr_err("Submit transfer failed: %s.", libusb_error_name(ret));
		devc->transfer_error = TRUE;
		return SR_ERR;
	}

	return SR_OK;
}

/* Set up transfer for the next register in a write sequence.
 */
static void next_reg_write(struct acquisition_state *acq)
{
	struct regval *regval;

	regval = &acq->reg_sequence[acq->reg_seq_pos];

	acq->xfer_buf_out[0] = LWLA_WORD(CMD_WRITE_REG);
	acq->xfer_buf_out[1] = LWLA_WORD(regval->reg);
	acq->xfer_buf_out[2] = LWLA_WORD_0(regval->val);
	acq->xfer_buf_out[3] = LWLA_WORD_1(regval->val);

	acq->xfer_out->length = 4 * sizeof(acq->xfer_buf_out[0]);
}

/* Set up transfer for the next register in a read sequence.
 */
static void next_reg_read(struct acquisition_state *acq)
{
	unsigned int addr;

	addr = acq->reg_sequence[acq->reg_seq_pos].reg;

	acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_REG);
	acq->xfer_buf_out[1] = LWLA_WORD(addr);

	acq->xfer_out->length = 2 * sizeof(acq->xfer_buf_out[0]);
}

/* Decode the response to a register read request.
 */
static int read_reg_response(struct acquisition_state *acq)
{
	uint32_t value;

	if (acq->xfer_in->actual_length != 4) {
		sr_err("Received size %d doesn't match expected size 4.",
		       acq->xfer_in->actual_length);
		return SR_ERR;
	}
	value = LWLA_TO_UINT32(acq->xfer_buf_in[0]);
	acq->reg_sequence[acq->reg_seq_pos].val = value;

	return SR_OK;
}

/* Enter a new state and submit the corresponding request to the device.
 */
static int submit_request(const struct sr_dev_inst *sdi,
			  enum protocol_state state)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	int ret;

	devc = sdi->priv;
	acq  = devc->acquisition;

	devc->state = state;

	acq->xfer_out->length = 0;
	acq->reg_seq_pos = 0;
	acq->reg_seq_len = 0;

	/* Perform the model-specific action for the new state. */
	ret = (*devc->model->prepare_request)(sdi);

	if (ret != SR_OK) {
		devc->transfer_error = TRUE;
		return ret;
	}

	if (acq->reg_seq_pos < acq->reg_seq_len) {
		if ((state & STATE_EXPECT_RESPONSE) != 0)
			next_reg_read(acq);
		else
			next_reg_write(acq);
	}

	return submit_transfer(devc, acq->xfer_out);
}

/* Evaluate and act on the response to a capture status request.
 */
static void handle_status_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	unsigned int old_status;

	devc = sdi->priv;
	acq  = devc->acquisition;
	old_status = acq->status;

	if ((*devc->model->handle_response)(sdi) != SR_OK) {
		devc->transfer_error = TRUE;
		return;
	}
	devc->state = STATE_STATUS_WAIT;

	sr_spew("Captured %zu words, %" PRIu64 " ms, status 0x%02X.",
		acq->mem_addr_fill, acq->duration_now, acq->status);

	if ((~old_status & acq->status & STATUS_TRIGGERED) != 0)
		sr_info("Capture triggered.");

	if (acq->duration_now >= acq->duration_max) {
		sr_dbg("Time limit reached, stopping capture.");
		submit_request(sdi, STATE_STOP_CAPTURE);
	} else if ((acq->status & STATUS_TRIGGERED) == 0) {
		sr_spew("Waiting for trigger.");
	} else if ((acq->status & STATUS_MEM_AVAIL) == 0) {
		sr_dbg("Capture memory filled.");
		submit_request(sdi, STATE_LENGTH_REQUEST);
	} else if ((acq->status & STATUS_CAPTURING) != 0) {
		sr_spew("Sampling in progress.");
	}
}

/* Evaluate and act on the response to a capture length request.
 */
static void handle_length_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;

	devc = sdi->priv;
	acq  = devc->acquisition;

	if ((*devc->model->handle_response)(sdi) != SR_OK) {
		devc->transfer_error = TRUE;
		return;
	}
	acq->rle = RLE_STATE_DATA;
	acq->sample = 0;
	acq->run_len = 0;
	acq->samples_done = 0;
	acq->mem_addr_done = acq->mem_addr_next;
	acq->out_index = 0;

	if (acq->mem_addr_next >= acq->mem_addr_stop) {
		submit_request(sdi, STATE_READ_FINISH);
		return;
	}
	sr_dbg("%zu words in capture buffer.",
	       acq->mem_addr_stop - acq->mem_addr_next);

	submit_request(sdi, STATE_READ_PREPARE);
}

/* Evaluate and act on the response to a capture length request.
 */
static void handle_read_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	struct sr_datafeed_packet packet;
	struct sr_datafeed_logic logic;
	size_t end_addr;

	devc = sdi->priv;
	acq  = devc->acquisition;

	/* Prepare session packet. */
	packet.type    = SR_DF_LOGIC;
	packet.payload = &logic;
	logic.unitsize = (devc->model->num_channels + 7) / 8;
	logic.data     = acq->out_packet;

	end_addr = MIN(acq->mem_addr_next, acq->mem_addr_stop);
	acq->in_index = 0;
	/*
	 * Repeatedly call the model-specific read response handler until
	 * all data received in the transfer has been accounted for.
	 */
	while (!devc->cancel_requested
			&& (acq->run_len > 0 || acq->mem_addr_done < end_addr)
			&& acq->samples_done < acq->samples_max) {

		if ((*devc->model->handle_response)(sdi) != SR_OK) {
			devc->transfer_error = TRUE;
			return;
		}
		if (acq->out_index * logic.unitsize >= PACKET_SIZE) {
			/* Send off full logic packet. */
			logic.length = acq->out_index * logic.unitsize;
			sr_session_send(sdi, &packet);
			acq->out_index = 0;
		}
	}

	if (!devc->cancel_requested
			&& acq->samples_done < acq->samples_max
			&& acq->mem_addr_next < acq->mem_addr_stop) {
		/* Request the next block. */
		submit_request(sdi, STATE_READ_REQUEST);
		return;
	}

	/* Send partially filled packet as it is the last one. */
	if (!devc->cancel_requested && acq->out_index > 0) {
 		logic.length = acq->out_index * logic.unitsize;
		sr_session_send(sdi, &packet);
		acq->out_index = 0;
	}
	submit_request(sdi, STATE_READ_FINISH);
}

/* Destroy and unset the acquisition state record.
 */
static void clear_acquisition_state(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;

	devc = sdi->priv;
	acq  = devc->acquisition;

	devc->acquisition = NULL;

	if (acq) {
		libusb_free_transfer(acq->xfer_out);
		libusb_free_transfer(acq->xfer_in);
		g_free(acq);
	}
}

/* USB I/O source callback.
 */
static int transfer_event(int fd, int revents, void *cb_data)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct drv_context *drvc;
	struct timeval tv;
	struct sr_datafeed_packet packet;
	int ret;

	(void)fd;

	sdi  = cb_data;
	devc = sdi->priv;
	drvc = sdi->driver->context;

	if (!devc || !drvc)
		return G_SOURCE_REMOVE;

	/* Handle pending USB events without blocking. */
	tv.tv_sec  = 0;
	tv.tv_usec = 0;
	ret = libusb_handle_events_timeout_completed(drvc->sr_ctx->libusb_ctx,
						     &tv, NULL);
	if (ret != 0) {
		sr_err("Event handling failed: %s.", libusb_error_name(ret));
		devc->transfer_error = TRUE;
	}

	if (!devc->transfer_error && devc->state == STATE_STATUS_WAIT) {
		if (devc->cancel_requested)
			submit_request(sdi, STATE_STOP_CAPTURE);
		else if (revents == 0) /* status poll timeout */
			submit_request(sdi, STATE_STATUS_REQUEST);
	}

	/* Stop processing events if an error occurred on a transfer. */
	if (devc->transfer_error)
		devc->state = STATE_IDLE;

	if (devc->state != STATE_IDLE)
		return G_SOURCE_CONTINUE;

	sr_info("Acquisition stopped.");

	/* We are done, clean up and send end packet to session bus. */
	clear_acquisition_state(sdi);

	packet.type = SR_DF_END;
	packet.payload = NULL;
	sr_session_send(sdi, &packet);

	return G_SOURCE_REMOVE;
}

/* USB output transfer completion callback.
 */
static void LIBUSB_CALL transfer_out_completed(struct libusb_transfer *transfer)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct acquisition_state *acq;

	sdi  = transfer->user_data;
	devc = sdi->priv;
	acq  = devc->acquisition;

	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
		sr_err("Transfer to device failed: %d.", transfer->status);
		devc->transfer_error = TRUE;
		return;
	}

	/* If this was a read request, wait for the response. */
	if ((devc->state & STATE_EXPECT_RESPONSE) != 0) {
		submit_transfer(devc, acq->xfer_in);
		return;
	}
	if (acq->reg_seq_pos < acq->reg_seq_len)
		acq->reg_seq_pos++; /* register write completed */

	/* Repeat until all queued registers have been written. */
	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
		next_reg_write(acq);
		submit_transfer(devc, acq->xfer_out);
		return;
	}

	switch (devc->state) {
	case STATE_START_CAPTURE:
		sr_info("Acquisition started.");

		if (!devc->cancel_requested)
			devc->state = STATE_STATUS_WAIT;
		else
			submit_request(sdi, STATE_STOP_CAPTURE);
		break;
	case STATE_STOP_CAPTURE:
		if (!devc->cancel_requested)
			submit_request(sdi, STATE_LENGTH_REQUEST);
		else
			devc->state = STATE_IDLE;
		break;
	case STATE_READ_PREPARE:
		if (acq->mem_addr_next < acq->mem_addr_stop && !devc->cancel_requested)
			submit_request(sdi, STATE_READ_REQUEST);
		else
			submit_request(sdi, STATE_READ_FINISH);
		break;
	case STATE_READ_FINISH:
		devc->state = STATE_IDLE;
		break;
	default:
		sr_err("Unexpected device state %d.", devc->state);
		devc->transfer_error = TRUE;
		break;
	}
}

/* USB input transfer completion callback.
 */
static void LIBUSB_CALL transfer_in_completed(struct libusb_transfer *transfer)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct acquisition_state *acq;

	sdi  = transfer->user_data;
	devc = sdi->priv;
	acq  = devc->acquisition;

	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
		sr_err("Transfer from device failed (state %d): %s.",
		       devc->state, libusb_error_name(transfer->status));
		devc->transfer_error = TRUE;
		return;
	}
	if ((devc->state & STATE_EXPECT_RESPONSE) == 0) {
		sr_err("Unexpected completion of input transfer (state %d).",
		       devc->state);
		devc->transfer_error = TRUE;
		return;
	}

	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
		/* Complete register read sequence. */
		if (read_reg_response(acq) != SR_OK) {
			devc->transfer_error = TRUE;
			return;
		}
		/* Repeat until all queued registers have been read. */
		if (++acq->reg_seq_pos < acq->reg_seq_len) {
			next_reg_read(acq);
			submit_transfer(devc, acq->xfer_out);
			return;
		}
	}

	switch (devc->state) {
	case STATE_STATUS_REQUEST:
		if (devc->cancel_requested)
			submit_request(sdi, STATE_STOP_CAPTURE);
		else
			handle_status_response(sdi);
		break;
	case STATE_LENGTH_REQUEST:
		if (devc->cancel_requested)
			submit_request(sdi, STATE_READ_FINISH);
		else
			handle_length_response(sdi);
		break;
	case STATE_READ_REQUEST:
		handle_read_response(sdi);
		break;
	default:
		sr_err("Unexpected device state %d.", devc->state);
		devc->transfer_error = TRUE;
		break;
	}
}

/* Set up the acquisition state record.
 */
static int init_acquisition_state(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct sr_usb_dev_inst *usb;
	struct acquisition_state *acq;

	devc = sdi->priv;
	usb  = sdi->conn;

	if (devc->acquisition) {
		sr_err("Acquisition still in progress?");
		return SR_ERR;
	}
	if (devc->cfg_clock_source == CLOCK_INTERNAL && devc->samplerate == 0) {
		sr_err("Samplerate not set.");
		return SR_ERR;
	}

	acq = g_try_malloc0(sizeof(struct acquisition_state));
	if (!acq)
		return SR_ERR_MALLOC;

	acq->xfer_in = libusb_alloc_transfer(0);
	if (!acq->xfer_in) {
		g_free(acq);
		return SR_ERR_MALLOC;
	}
	acq->xfer_out = libusb_alloc_transfer(0);
	if (!acq->xfer_out) {
		libusb_free_transfer(acq->xfer_in);
		g_free(acq);
		return SR_ERR_MALLOC;
	}

	libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
				  (unsigned char *)acq->xfer_buf_out, 0,
				  &transfer_out_completed,
				  (struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);

	libusb_fill_bulk_transfer(acq->xfer_in, usb->devhdl, EP_REPLY,
				  (unsigned char *)acq->xfer_buf_in,
				  sizeof(acq->xfer_buf_in),
				  &transfer_in_completed,
				  (struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);

	if (devc->limit_msec > 0) {
		acq->duration_max = devc->limit_msec;
		sr_info("Acquisition time limit %" PRIu64 " ms.",
			devc->limit_msec);
	} else
		acq->duration_max = MAX_LIMIT_MSEC;

	if (devc->limit_samples > 0) {
		acq->samples_max = devc->limit_samples;
		sr_info("Acquisition sample count limit %" PRIu64 ".",
			devc->limit_samples);
	} else
		acq->samples_max = MAX_LIMIT_SAMPLES;

	if (devc->cfg_clock_source == CLOCK_INTERNAL) {
		sr_info("Internal clock, samplerate %" PRIu64 ".",
			devc->samplerate);
		/* Ramp up clock speed to enable samplerates above 100 MS/s. */
		acq->clock_boost = (devc->samplerate > SR_MHZ(100));

		/* If only one of the limits is set, derive the other one. */
		if (devc->limit_msec == 0 && devc->limit_samples > 0)
			acq->duration_max = devc->limit_samples
					* 1000 / devc->samplerate + 1;
		else if (devc->limit_samples == 0 && devc->limit_msec > 0)
			acq->samples_max = devc->limit_msec
					* devc->samplerate / 1000;
	} else {
		acq->clock_boost = TRUE;

		if (devc->cfg_clock_edge == EDGE_POSITIVE)
			sr_info("External clock, rising edge.");
		else
			sr_info("External clock, falling edge.");
	}

	acq->rle_enabled = devc->cfg_rle;
	devc->acquisition = acq;

	return SR_OK;
}

SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
{
	struct drv_context *drvc;
	struct dev_context *devc;
	int ret;

	drvc = sdi->driver->context;
	devc = sdi->priv;

	if (devc->state != STATE_IDLE) {
		sr_err("Not in idle state, cannot start acquisition.");
		return SR_ERR;
	}
	devc->cancel_requested = FALSE;
	devc->transfer_error = FALSE;

	ret = init_acquisition_state(sdi);
	if (ret != SR_OK)
		return ret;

	ret = (*devc->model->setup_acquisition)(sdi);
	if (ret != SR_OK) {
		sr_err("Failed to set up device for acquisition.");
		clear_acquisition_state(sdi);
		return ret;
	}
	/* Register event source for asynchronous USB I/O. */
	ret = usb_source_add(sdi->session, drvc->sr_ctx, POLL_INTERVAL,
			     &transfer_event, (struct sr_dev_inst *)sdi);
	if (ret != SR_OK) {
		clear_acquisition_state(sdi);
		return ret;
	}
	ret = submit_request(sdi, STATE_START_CAPTURE);

	if (ret == SR_OK) {
		/* Send header packet to the session bus. */
		ret = std_session_send_df_header(sdi, LOG_PREFIX);
	}
	if (ret != SR_OK) {
		usb_source_remove(sdi->session, drvc->sr_ctx);
		clear_acquisition_state(sdi);
	}
	return ret;
}
Commit	Line	Data
aeaad0b0 DE	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
6ec6c43b	20	#include <config.h>
5874e88d	21	#include <string.h>
be64f90b	22	#include "lwla.h"
515ab088	23	#include "protocol.h"
aeaad0b0	24
be64f90b	25	/* Status polling interval during acquisition.
5874e88d	26	*/
be64f90b	27	#define POLL_INTERVAL 100 /* ms */
5874e88d DE	28
	29	/* Submit an already filled-in USB transfer.
	30	*/
	31	static int submit_transfer(struct dev_context *devc,
	32	struct libusb_transfer *xfer)
	33	{
	34	int ret;
	35
	36	ret = libusb_submit_transfer(xfer);
	37
	38	if (ret != 0) {
	39	sr_err("Submit transfer failed: %s.", libusb_error_name(ret));
	40	devc->transfer_error = TRUE;
	41	return SR_ERR;
	42	}
	43
	44	return SR_OK;
	45	}
	46
be64f90b	47	/* Set up transfer for the next register in a write sequence.
5874e88d	48	*/
be64f90b	49	static void next_reg_write(struct acquisition_state *acq)
aeaad0b0	50	{
be64f90b	51	struct regval *regval;
5874e88d	52
be64f90b	53	regval = &acq->reg_sequence[acq->reg_seq_pos];
5874e88d	54
be64f90b DE	55	acq->xfer_buf_out[0] = LWLA_WORD(CMD_WRITE_REG);
	56	acq->xfer_buf_out[1] = LWLA_WORD(regval->reg);
	57	acq->xfer_buf_out[2] = LWLA_WORD_0(regval->val);
	58	acq->xfer_buf_out[3] = LWLA_WORD_1(regval->val);
5874e88d	59
be64f90b	60	acq->xfer_out->length = 4 * sizeof(acq->xfer_buf_out[0]);
5874e88d DE	61	}
5874e88d DE	62
be64f90b	63	/* Set up transfer for the next register in a read sequence.
5874e88d	64	*/
be64f90b	65	static void next_reg_read(struct acquisition_state *acq)
5874e88d	66	{
be64f90b	67	unsigned int addr;
5874e88d	68
be64f90b	69	addr = acq->reg_sequence[acq->reg_seq_pos].reg;
5874e88d	70
be64f90b DE	71	acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_REG);
be64f90b DE	72	acq->xfer_buf_out[1] = LWLA_WORD(addr);
5874e88d	73
be64f90b	74	acq->xfer_out->length = 2 * sizeof(acq->xfer_buf_out[0]);
5874e88d DE	75	}
5874e88d DE	76
be64f90b	77	/* Decode the response to a register read request.
5874e88d	78	*/
be64f90b	79	static int read_reg_response(struct acquisition_state *acq)
5874e88d	80	{
be64f90b	81	uint32_t value;
5874e88d	82
be64f90b DE	83	if (acq->xfer_in->actual_length != 4) {
	84	sr_err("Received size %d doesn't match expected size 4.",
	85	acq->xfer_in->actual_length);
	86	return SR_ERR;
5874e88d	87	}
be64f90b DE	88	value = LWLA_TO_UINT32(acq->xfer_buf_in[0]);
be64f90b DE	89	acq->reg_sequence[acq->reg_seq_pos].val = value;
5874e88d	90
5874e88d DE	91	return SR_OK;
	92	}
	93
be64f90b	94	/* Enter a new state and submit the corresponding request to the device.
5874e88d	95	*/
be64f90b DE	96	static int submit_request(const struct sr_dev_inst *sdi,
be64f90b DE	97	enum protocol_state state)
5874e88d DE	98	{
	99	struct dev_context *devc;
	100	struct acquisition_state *acq;
be64f90b	101	int ret;
5874e88d DE	102
	103	devc = sdi->priv;
	104	acq = devc->acquisition;
	105
be64f90b	106	devc->state = state;
5874e88d	107
be64f90b DE	108	acq->xfer_out->length = 0;
	109	acq->reg_seq_pos = 0;
	110	acq->reg_seq_len = 0;
5874e88d	111
be64f90b DE	112	/* Perform the model-specific action for the new state. */
be64f90b DE	113	ret = (*devc->model->prepare_request)(sdi);
5874e88d	114
be64f90b DE	115	if (ret != SR_OK) {
	116	devc->transfer_error = TRUE;
	117	return ret;
	118	}
5874e88d	119
be64f90b DE	120	if (acq->reg_seq_pos < acq->reg_seq_len) {
	121	if ((state & STATE_EXPECT_RESPONSE) != 0)
	122	next_reg_read(acq);
	123	else
	124	next_reg_write(acq);
	125	}
5874e88d	126
be64f90b	127	return submit_transfer(devc, acq->xfer_out);
5874e88d DE	128	}
5874e88d DE	129
be64f90b	130	/* Evaluate and act on the response to a capture status request.
5874e88d	131	*/
be64f90b	132	static void handle_status_response(const struct sr_dev_inst *sdi)
5874e88d DE	133	{
	134	struct dev_context *devc;
	135	struct acquisition_state *acq;
be64f90b	136	unsigned int old_status;
5874e88d DE	137
	138	devc = sdi->priv;
	139	acq = devc->acquisition;
be64f90b	140	old_status = acq->status;
5874e88d	141
be64f90b DE	142	if ((*devc->model->handle_response)(sdi) != SR_OK) {
	143	devc->transfer_error = TRUE;
	144	return;
	145	}
	146	devc->state = STATE_STATUS_WAIT;
5874e88d	147
be64f90b DE	148	sr_spew("Captured %zu words, %" PRIu64 " ms, status 0x%02X.",
be64f90b DE	149	acq->mem_addr_fill, acq->duration_now, acq->status);
5874e88d	150
be64f90b DE	151	if ((~old_status & acq->status & STATUS_TRIGGERED) != 0)
be64f90b DE	152	sr_info("Capture triggered.");
5874e88d	153
be64f90b DE	154	if (acq->duration_now >= acq->duration_max) {
	155	sr_dbg("Time limit reached, stopping capture.");
	156	submit_request(sdi, STATE_STOP_CAPTURE);
	157	} else if ((acq->status & STATUS_TRIGGERED) == 0) {
	158	sr_spew("Waiting for trigger.");
	159	} else if ((acq->status & STATUS_MEM_AVAIL) == 0) {
	160	sr_dbg("Capture memory filled.");
	161	submit_request(sdi, STATE_LENGTH_REQUEST);
	162	} else if ((acq->status & STATUS_CAPTURING) != 0) {
	163	sr_spew("Sampling in progress.");
	164	}
5874e88d DE	165	}
5874e88d DE	166
be64f90b	167	/* Evaluate and act on the response to a capture length request.
5874e88d	168	*/
be64f90b	169	static void handle_length_response(const struct sr_dev_inst *sdi)
5874e88d DE	170	{
	171	struct dev_context *devc;
	172	struct acquisition_state *acq;
	173
	174	devc = sdi->priv;
	175	acq = devc->acquisition;
	176
be64f90b	177	if ((*devc->model->handle_response)(sdi) != SR_OK) {
5874e88d DE	178	devc->transfer_error = TRUE;
	179	return;
	180	}
be64f90b DE	181	acq->rle = RLE_STATE_DATA;
	182	acq->sample = 0;
	183	acq->run_len = 0;
	184	acq->samples_done = 0;
	185	acq->mem_addr_done = acq->mem_addr_next;
	186	acq->out_index = 0;
5874e88d	187
be64f90b DE	188	if (acq->mem_addr_next >= acq->mem_addr_stop) {
be64f90b DE	189	submit_request(sdi, STATE_READ_FINISH);
5874e88d	190	return;
5874e88d	191	}
be64f90b DE	192	sr_dbg("%zu words in capture buffer.",
	193	acq->mem_addr_stop - acq->mem_addr_next);
	194
	195	submit_request(sdi, STATE_READ_PREPARE);
5874e88d DE	196	}
5874e88d DE	197
be64f90b	198	/* Evaluate and act on the response to a capture length request.
5874e88d	199	*/
be64f90b	200	static void handle_read_response(const struct sr_dev_inst *sdi)
5874e88d DE	201	{
	202	struct dev_context *devc;
	203	struct acquisition_state *acq;
be64f90b DE	204	struct sr_datafeed_packet packet;
	205	struct sr_datafeed_logic logic;
	206	size_t end_addr;
5874e88d DE	207
	208	devc = sdi->priv;
	209	acq = devc->acquisition;
	210
be64f90b DE	211	/* Prepare session packet. */
	212	packet.type = SR_DF_LOGIC;
	213	packet.payload = &logic;
	214	logic.unitsize = (devc->model->num_channels + 7) / 8;
	215	logic.data = acq->out_packet;
5874e88d	216
be64f90b DE	217	end_addr = MIN(acq->mem_addr_next, acq->mem_addr_stop);
	218	acq->in_index = 0;
	219	/*
	220	* Repeatedly call the model-specific read response handler until
	221	* all data received in the transfer has been accounted for.
8a3ddd88	222	*/
be64f90b DE	223	while (!devc->cancel_requested
	224	&& (acq->run_len > 0 \|\| acq->mem_addr_done < end_addr)
	225	&& acq->samples_done < acq->samples_max) {
9497f49e	226
be64f90b DE	227	if ((*devc->model->handle_response)(sdi) != SR_OK) {
	228	devc->transfer_error = TRUE;
	229	return;
	230	}
	231	if (acq->out_index * logic.unitsize >= PACKET_SIZE) {
	232	/* Send off full logic packet. */
	233	logic.length = acq->out_index * logic.unitsize;
	234	sr_session_send(sdi, &packet);
	235	acq->out_index = 0;
	236	}
	237	}
5874e88d	238
be64f90b DE	239	if (!devc->cancel_requested
	240	&& acq->samples_done < acq->samples_max
	241	&& acq->mem_addr_next < acq->mem_addr_stop) {
	242	/* Request the next block. */
	243	submit_request(sdi, STATE_READ_REQUEST);
5874e88d DE	244	return;
5874e88d DE	245	}
5874e88d	246
be64f90b DE	247	/* Send partially filled packet as it is the last one. */
	248	if (!devc->cancel_requested && acq->out_index > 0) {
	249	logic.length = acq->out_index * logic.unitsize;
	250	sr_session_send(sdi, &packet);
	251	acq->out_index = 0;
5874e88d	252	}
be64f90b	253	submit_request(sdi, STATE_READ_FINISH);
5874e88d DE	254	}
5874e88d DE	255
be64f90b	256	/* Destroy and unset the acquisition state record.
5874e88d	257	*/
be64f90b	258	static void clear_acquisition_state(const struct sr_dev_inst *sdi)
5874e88d DE	259	{
	260	struct dev_context *devc;
	261	struct acquisition_state *acq;
5874e88d DE	262
	263	devc = sdi->priv;
	264	acq = devc->acquisition;
	265
be64f90b	266	devc->acquisition = NULL;
5874e88d	267
be64f90b DE	268	if (acq) {
	269	libusb_free_transfer(acq->xfer_out);
	270	libusb_free_transfer(acq->xfer_in);
	271	g_free(acq);
5874e88d DE	272	}
	273	}
	274
be64f90b	275	/* USB I/O source callback.
5874e88d	276	*/
be64f90b	277	static int transfer_event(int fd, int revents, void *cb_data)
5874e88d	278	{
be64f90b	279	const struct sr_dev_inst *sdi;
5874e88d	280	struct dev_context *devc;
be64f90b DE	281	struct drv_context *drvc;
be64f90b DE	282	struct timeval tv;
2cfd16a3	283	struct sr_datafeed_packet packet;
be64f90b	284	int ret;
5874e88d	285
be64f90b	286	(void)fd;
5874e88d	287
be64f90b DE	288	sdi = cb_data;
	289	devc = sdi->priv;
	290	drvc = sdi->driver->context;
5874e88d	291
be64f90b DE	292	if (!devc \|\| !drvc)
be64f90b DE	293	return G_SOURCE_REMOVE;
5874e88d	294
be64f90b DE	295	/* Handle pending USB events without blocking. */
	296	tv.tv_sec = 0;
	297	tv.tv_usec = 0;
	298	ret = libusb_handle_events_timeout_completed(drvc->sr_ctx->libusb_ctx,
	299	&tv, NULL);
	300	if (ret != 0) {
	301	sr_err("Event handling failed: %s.", libusb_error_name(ret));
5874e88d	302	devc->transfer_error = TRUE;
5874e88d	303	}
2cfd16a3	304
be64f90b DE	305	if (!devc->transfer_error && devc->state == STATE_STATUS_WAIT) {
	306	if (devc->cancel_requested)
	307	submit_request(sdi, STATE_STOP_CAPTURE);
	308	else if (revents == 0) /* status poll timeout */
	309	submit_request(sdi, STATE_STATUS_REQUEST);
2cfd16a3	310	}
5874e88d	311
be64f90b DE	312	/* Stop processing events if an error occurred on a transfer. */
	313	if (devc->transfer_error)
	314	devc->state = STATE_IDLE;
5874e88d	315
be64f90b DE	316	if (devc->state != STATE_IDLE)
be64f90b DE	317	return G_SOURCE_CONTINUE;
5874e88d	318
be64f90b	319	sr_info("Acquisition stopped.");
5874e88d	320
be64f90b DE	321	/* We are done, clean up and send end packet to session bus. */
be64f90b DE	322	clear_acquisition_state(sdi);
5874e88d DE	323
5874e88d DE	324	packet.type = SR_DF_END;
be64f90b	325	packet.payload = NULL;
5874e88d DE	326	sr_session_send(sdi, &packet);
5874e88d DE	327
be64f90b	328	return G_SOURCE_REMOVE;
5874e88d DE	329	}
	330
	331	/* USB output transfer completion callback.
	332	*/
be64f90b	333	static void LIBUSB_CALL transfer_out_completed(struct libusb_transfer *transfer)
5874e88d	334	{
be64f90b	335	const struct sr_dev_inst *sdi;
5874e88d	336	struct dev_context *devc;
be64f90b	337	struct acquisition_state *acq;
5874e88d DE	338
	339	sdi = transfer->user_data;
	340	devc = sdi->priv;
be64f90b	341	acq = devc->acquisition;
5874e88d DE	342
	343	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
	344	sr_err("Transfer to device failed: %d.", transfer->status);
	345	devc->transfer_error = TRUE;
	346	return;
	347	}
	348
be64f90b DE	349	/* If this was a read request, wait for the response. */
	350	if ((devc->state & STATE_EXPECT_RESPONSE) != 0) {
	351	submit_transfer(devc, acq->xfer_in);
	352	return;
	353	}
	354	if (acq->reg_seq_pos < acq->reg_seq_len)
	355	acq->reg_seq_pos++; /* register write completed */
	356
	357	/* Repeat until all queued registers have been written. */
	358	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
	359	next_reg_write(acq);
	360	submit_transfer(devc, acq->xfer_out);
	361	return;
	362	}
	363
	364	switch (devc->state) {
	365	case STATE_START_CAPTURE:
	366	sr_info("Acquisition started.");
	367
	368	if (!devc->cancel_requested)
5874e88d	369	devc->state = STATE_STATUS_WAIT;
be64f90b DE	370	else
	371	submit_request(sdi, STATE_STOP_CAPTURE);
	372	break;
	373	case STATE_STOP_CAPTURE:
	374	if (!devc->cancel_requested)
	375	submit_request(sdi, STATE_LENGTH_REQUEST);
	376	else
	377	devc->state = STATE_IDLE;
	378	break;
	379	case STATE_READ_PREPARE:
	380	if (acq->mem_addr_next < acq->mem_addr_stop && !devc->cancel_requested)
	381	submit_request(sdi, STATE_READ_REQUEST);
	382	else
	383	submit_request(sdi, STATE_READ_FINISH);
	384	break;
	385	case STATE_READ_FINISH:
	386	devc->state = STATE_IDLE;
	387	break;
	388	default:
	389	sr_err("Unexpected device state %d.", devc->state);
	390	devc->transfer_error = TRUE;
	391	break;
5874e88d DE	392	}
	393	}
	394
	395	/* USB input transfer completion callback.
	396	*/
be64f90b	397	static void LIBUSB_CALL transfer_in_completed(struct libusb_transfer *transfer)
5874e88d	398	{
be64f90b	399	const struct sr_dev_inst *sdi;
5874e88d DE	400	struct dev_context *devc;
	401	struct acquisition_state *acq;
	402
	403	sdi = transfer->user_data;
	404	devc = sdi->priv;
	405	acq = devc->acquisition;
	406
	407	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
be64f90b DE	408	sr_err("Transfer from device failed (state %d): %s.",
	409	devc->state, libusb_error_name(transfer->status));
	410	devc->transfer_error = TRUE;
	411	return;
	412	}
	413	if ((devc->state & STATE_EXPECT_RESPONSE) == 0) {
	414	sr_err("Unexpected completion of input transfer (state %d).",
	415	devc->state);
5874e88d DE	416	devc->transfer_error = TRUE;
	417	return;
	418	}
	419
be64f90b DE	420	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
	421	/* Complete register read sequence. */
	422	if (read_reg_response(acq) != SR_OK) {
	423	devc->transfer_error = TRUE;
	424	return;
	425	}
	426	/* Repeat until all queued registers have been read. */
	427	if (++acq->reg_seq_pos < acq->reg_seq_len) {
	428	next_reg_read(acq);
	429	submit_transfer(devc, acq->xfer_out);
	430	return;
	431	}
	432	}
	433
5874e88d	434	switch (devc->state) {
be64f90b DE	435	case STATE_STATUS_REQUEST:
	436	if (devc->cancel_requested)
	437	submit_request(sdi, STATE_STOP_CAPTURE);
	438	else
	439	handle_status_response(sdi);
5874e88d	440	break;
be64f90b DE	441	case STATE_LENGTH_REQUEST:
	442	if (devc->cancel_requested)
	443	submit_request(sdi, STATE_READ_FINISH);
5874e88d	444	else
be64f90b DE	445	handle_length_response(sdi);
	446	break;
	447	case STATE_READ_REQUEST:
	448	handle_read_response(sdi);
5874e88d DE	449	break;
	450	default:
	451	sr_err("Unexpected device state %d.", devc->state);
be64f90b	452	devc->transfer_error = TRUE;
5874e88d DE	453	break;
	454	}
	455	}
	456
be64f90b	457	/* Set up the acquisition state record.
5874e88d	458	*/
be64f90b	459	static int init_acquisition_state(const struct sr_dev_inst *sdi)
5874e88d DE	460	{
5874e88d DE	461	struct dev_context *devc;
be64f90b DE	462	struct sr_usb_dev_inst *usb;
be64f90b DE	463	struct acquisition_state *acq;
5874e88d DE	464
5874e88d DE	465	devc = sdi->priv;
be64f90b	466	usb = sdi->conn;
5874e88d	467
be64f90b DE	468	if (devc->acquisition) {
	469	sr_err("Acquisition still in progress?");
	470	return SR_ERR;
	471	}
	472	if (devc->cfg_clock_source == CLOCK_INTERNAL && devc->samplerate == 0) {
	473	sr_err("Samplerate not set.");
5874e88d	474	return SR_ERR;
e1172cf8	475	}
5874e88d	476
be64f90b DE	477	acq = g_try_malloc0(sizeof(struct acquisition_state));
	478	if (!acq)
	479	return SR_ERR_MALLOC;
5874e88d	480
be64f90b DE	481	acq->xfer_in = libusb_alloc_transfer(0);
	482	if (!acq->xfer_in) {
	483	g_free(acq);
	484	return SR_ERR_MALLOC;
	485	}
	486	acq->xfer_out = libusb_alloc_transfer(0);
	487	if (!acq->xfer_out) {
	488	libusb_free_transfer(acq->xfer_in);
	489	g_free(acq);
	490	return SR_ERR_MALLOC;
aeaad0b0	491	}
5874e88d	492
be64f90b DE	493	libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
	494	(unsigned char *)acq->xfer_buf_out, 0,
	495	&transfer_out_completed,
	496	(struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);
5874e88d	497
be64f90b DE	498	libusb_fill_bulk_transfer(acq->xfer_in, usb->devhdl, EP_REPLY,
	499	(unsigned char *)acq->xfer_buf_in,
	500	sizeof(acq->xfer_buf_in),
	501	&transfer_in_completed,
	502	(struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);
29d58767	503
9497f49e DE	504	if (devc->limit_msec > 0) {
	505	acq->duration_max = devc->limit_msec;
	506	sr_info("Acquisition time limit %" PRIu64 " ms.",
	507	devc->limit_msec);
	508	} else
	509	acq->duration_max = MAX_LIMIT_MSEC;
	510
	511	if (devc->limit_samples > 0) {
	512	acq->samples_max = devc->limit_samples;
	513	sr_info("Acquisition sample count limit %" PRIu64 ".",
	514	devc->limit_samples);
	515	} else
	516	acq->samples_max = MAX_LIMIT_SAMPLES;
29d58767	517
6358f0a9	518	if (devc->cfg_clock_source == CLOCK_INTERNAL) {
9497f49e DE	519	sr_info("Internal clock, samplerate %" PRIu64 ".",
9497f49e DE	520	devc->samplerate);
be64f90b DE	521	/* Ramp up clock speed to enable samplerates above 100 MS/s. */
be64f90b DE	522	acq->clock_boost = (devc->samplerate > SR_MHZ(100));
29d58767 DE	523
	524	/* If only one of the limits is set, derive the other one. */
	525	if (devc->limit_msec == 0 && devc->limit_samples > 0)
	526	acq->duration_max = devc->limit_samples
	527	* 1000 / devc->samplerate + 1;
	528	else if (devc->limit_samples == 0 && devc->limit_msec > 0)
	529	acq->samples_max = devc->limit_msec
	530	* devc->samplerate / 1000;
6358f0a9	531	} else {
be64f90b	532	acq->clock_boost = TRUE;
6358f0a9	533
be64f90b	534	if (devc->cfg_clock_edge == EDGE_POSITIVE)
6358f0a9	535	sr_info("External clock, rising edge.");
be64f90b DE	536	else
be64f90b DE	537	sr_info("External clock, falling edge.");
29d58767	538	}
5874e88d	539
be64f90b DE	540	acq->rle_enabled = devc->cfg_rle;
be64f90b DE	541	devc->acquisition = acq;
5874e88d	542
be64f90b	543	return SR_OK;
5874e88d DE	544	}
5874e88d DE	545
5874e88d DE	546	SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
5874e88d DE	547	{
be64f90b	548	struct drv_context *drvc;
5874e88d	549	struct dev_context *devc;
be64f90b	550	int ret;
5874e88d	551
be64f90b	552	drvc = sdi->driver->context;
5874e88d	553	devc = sdi->priv;
29d58767	554
be64f90b DE	555	if (devc->state != STATE_IDLE) {
	556	sr_err("Not in idle state, cannot start acquisition.");
	557	return SR_ERR;
	558	}
	559	devc->cancel_requested = FALSE;
	560	devc->transfer_error = FALSE;
5874e88d	561
be64f90b DE	562	ret = init_acquisition_state(sdi);
	563	if (ret != SR_OK)
	564	return ret;
5874e88d	565
be64f90b DE	566	ret = (*devc->model->setup_acquisition)(sdi);
	567	if (ret != SR_OK) {
	568	sr_err("Failed to set up device for acquisition.");
	569	clear_acquisition_state(sdi);
	570	return ret;
5874e88d	571	}
be64f90b DE	572	/* Register event source for asynchronous USB I/O. */
	573	ret = usb_source_add(sdi->session, drvc->sr_ctx, POLL_INTERVAL,
	574	&transfer_event, (struct sr_dev_inst *)sdi);
	575	if (ret != SR_OK) {
	576	clear_acquisition_state(sdi);
	577	return ret;
5874e88d	578	}
be64f90b	579	ret = submit_request(sdi, STATE_START_CAPTURE);
5874e88d	580
be64f90b DE	581	if (ret == SR_OK) {
	582	/* Send header packet to the session bus. */
	583	ret = std_session_send_df_header(sdi, LOG_PREFIX);
5874e88d	584	}
be64f90b DE	585	if (ret != SR_OK) {
	586	usb_source_remove(sdi->session, drvc->sr_ctx);
	587	clear_acquisition_state(sdi);
5874e88d	588	}
be64f90b	589	return ret;
aeaad0b0	590	}