[libsigrok.git] / src / hardware / sysclk-lwla / protocol.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include <string.h>
#include "protocol.h"
#include "lwla.h"

/* Submit an already filled-in USB transfer.
 */
static int submit_transfer(struct dev_context *devc,
			   struct libusb_transfer *xfer)
{
	int ret;

	ret = libusb_submit_transfer(xfer);

	if (ret != 0) {
		sr_err("Submit transfer failed: %s.", libusb_error_name(ret));
		devc->transfer_error = TRUE;
		return SR_ERR;
	}

	return SR_OK;
}

/* Set up transfer for the next register in a write sequence.
 */
static void next_reg_write(struct acquisition_state *acq)
{
	struct regval *regval;

	regval = &acq->reg_sequence[acq->reg_seq_pos];

	acq->xfer_buf_out[0] = LWLA_WORD(CMD_WRITE_REG);
	acq->xfer_buf_out[1] = LWLA_WORD(regval->reg);
	acq->xfer_buf_out[2] = LWLA_WORD_0(regval->val);
	acq->xfer_buf_out[3] = LWLA_WORD_1(regval->val);

	acq->xfer_out->length = 4 * sizeof(acq->xfer_buf_out[0]);
}

/* Set up transfer for the next register in a read sequence.
 */
static void next_reg_read(struct acquisition_state *acq)
{
	unsigned int addr;

	addr = acq->reg_sequence[acq->reg_seq_pos].reg;

	acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_REG);
	acq->xfer_buf_out[1] = LWLA_WORD(addr);

	acq->xfer_out->length = 2 * sizeof(acq->xfer_buf_out[0]);
}

/* Decode the response to a register read request.
 */
static int read_reg_response(struct acquisition_state *acq)
{
	uint32_t value;

	if (acq->xfer_in->actual_length != 4) {
		sr_err("Received size %d doesn't match expected size 4.",
		       acq->xfer_in->actual_length);
		return SR_ERR;
	}
	value = LWLA_TO_UINT32(acq->xfer_buf_in[0]);
	acq->reg_sequence[acq->reg_seq_pos].val = value;

	return SR_OK;
}

/* Enter a new state and submit the corresponding request to the device.
 */
static int submit_request(const struct sr_dev_inst *sdi,
			  enum protocol_state state)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	int ret;

	devc = sdi->priv;
	acq  = devc->acquisition;

	devc->state = state;

	acq->xfer_out->length = 0;
	acq->reg_seq_pos = 0;
	acq->reg_seq_len = 0;

	/* Perform the model-specific action for the new state. */
	ret = (*devc->model->prepare_request)(sdi);

	if (ret != SR_OK) {
		devc->transfer_error = TRUE;
		return ret;
	}

	if (acq->reg_seq_pos < acq->reg_seq_len) {
		if ((state & STATE_EXPECT_RESPONSE) != 0)
			next_reg_read(acq);
		else
			next_reg_write(acq);
	}

	return submit_transfer(devc, acq->xfer_out);
}

/* Evaluate and act on the response to a capture status request.
 */
static void handle_status_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	unsigned int old_status;

	devc = sdi->priv;
	acq  = devc->acquisition;
	old_status = acq->status;

	if ((*devc->model->handle_response)(sdi) != SR_OK) {
		devc->transfer_error = TRUE;
		return;
	}
	devc->state = STATE_STATUS_WAIT;

	sr_spew("Captured %u words, %" PRIu64 " ms, status 0x%02X.",
		acq->mem_addr_fill, acq->duration_now, acq->status);

	if ((~old_status & acq->status & STATUS_TRIGGERED) != 0)
		sr_info("Capture triggered.");

	if (acq->duration_now >= acq->duration_max) {
		sr_dbg("Time limit reached, stopping capture.");
		submit_request(sdi, STATE_STOP_CAPTURE);
	} else if ((acq->status & STATUS_TRIGGERED) == 0) {
		sr_spew("Waiting for trigger.");
	} else if ((acq->status & STATUS_MEM_AVAIL) == 0) {
		sr_dbg("Capture memory filled.");
		submit_request(sdi, STATE_LENGTH_REQUEST);
	} else if ((acq->status & STATUS_CAPTURING) != 0) {
		sr_spew("Sampling in progress.");
	}
}

/* Evaluate and act on the response to a capture length request.
 */
static void handle_length_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;

	devc = sdi->priv;
	acq  = devc->acquisition;

	if ((*devc->model->handle_response)(sdi) != SR_OK) {
		devc->transfer_error = TRUE;
		return;
	}
	acq->rle = RLE_STATE_DATA;
	acq->sample = 0;
	acq->run_len = 0;
	acq->samples_done = 0;
	acq->mem_addr_done = acq->mem_addr_next;
	acq->out_index = 0;

	if (acq->mem_addr_next >= acq->mem_addr_stop) {
		submit_request(sdi, STATE_READ_FINISH);
		return;
	}
	sr_dbg("%u words in capture buffer.",
	       acq->mem_addr_stop - acq->mem_addr_next);

	submit_request(sdi, STATE_READ_PREPARE);
}

/* Evaluate and act on the response to a capture memory read request.
 */
static void handle_read_response(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;
	struct sr_datafeed_packet packet;
	struct sr_datafeed_logic logic;
	unsigned int end_addr;

	devc = sdi->priv;
	acq  = devc->acquisition;

	/* Prepare session packet. */
	packet.type    = SR_DF_LOGIC;
	packet.payload = &logic;
	logic.unitsize = (devc->model->num_channels + 7) / 8;
	logic.data     = acq->out_packet;

	end_addr = MIN(acq->mem_addr_next, acq->mem_addr_stop);
	acq->in_index = 0;

	/*
	 * Repeatedly call the model-specific read response handler until
	 * all data received in the transfer has been accounted for.
	 */
	while (!devc->cancel_requested
			&& (acq->run_len > 0 || acq->mem_addr_done < end_addr)
			&& acq->samples_done < acq->samples_max) {

		if ((*devc->model->handle_response)(sdi) != SR_OK) {
			devc->transfer_error = TRUE;
			return;
		}
		if (acq->out_index * logic.unitsize >= PACKET_SIZE) {
			/* Send off full logic packet. */
			logic.length = acq->out_index * logic.unitsize;
			sr_session_send(sdi, &packet);
			acq->out_index = 0;
		}
	}

	if (!devc->cancel_requested
			&& acq->samples_done < acq->samples_max
			&& acq->mem_addr_next < acq->mem_addr_stop) {
		/* Request the next block. */
		submit_request(sdi, STATE_READ_REQUEST);
		return;
	}

	/* Send partially filled packet as it is the last one. */
	if (!devc->cancel_requested && acq->out_index > 0) {
 		logic.length = acq->out_index * logic.unitsize;
		sr_session_send(sdi, &packet);
		acq->out_index = 0;
	}
	submit_request(sdi, STATE_READ_FINISH);
}

/* Destroy and unset the acquisition state record.
 */
static void clear_acquisition_state(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct acquisition_state *acq;

	devc = sdi->priv;
	acq  = devc->acquisition;

	devc->acquisition = NULL;

	if (acq) {
		libusb_free_transfer(acq->xfer_out);
		libusb_free_transfer(acq->xfer_in);
		g_free(acq);
	}
}

/* USB I/O source callback.
 */
static int transfer_event(int fd, int revents, void *cb_data)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct drv_context *drvc;
	struct timeval tv;
	int ret;

	(void)fd;

	sdi  = cb_data;
	devc = sdi->priv;
	drvc = sdi->driver->context;

	if (!devc || !drvc)
		return G_SOURCE_REMOVE;

	/* Handle pending USB events without blocking. */
	tv.tv_sec  = 0;
	tv.tv_usec = 0;
	ret = libusb_handle_events_timeout_completed(drvc->sr_ctx->libusb_ctx,
						     &tv, NULL);
	if (ret != 0) {
		sr_err("Event handling failed: %s.", libusb_error_name(ret));
		devc->transfer_error = TRUE;
	}

	if (!devc->transfer_error && devc->state == STATE_STATUS_WAIT) {
		if (devc->cancel_requested)
			submit_request(sdi, STATE_STOP_CAPTURE);
		else if (revents == 0) /* status poll timeout */
			submit_request(sdi, STATE_STATUS_REQUEST);
	}

	/* Stop processing events if an error occurred on a transfer. */
	if (devc->transfer_error)
		devc->state = STATE_IDLE;

	if (devc->state != STATE_IDLE)
		return G_SOURCE_CONTINUE;

	sr_info("Acquisition stopped.");

	/* We are done, clean up and send end packet to session bus. */
	clear_acquisition_state(sdi);
	std_session_send_df_end(sdi, LOG_PREFIX);

	return G_SOURCE_REMOVE;
}

/* USB output transfer completion callback.
 */
static void LIBUSB_CALL transfer_out_completed(struct libusb_transfer *transfer)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct acquisition_state *acq;

	sdi  = transfer->user_data;
	devc = sdi->priv;
	acq  = devc->acquisition;

	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
		sr_err("Transfer to device failed (state %d): %s.",
		       devc->state, libusb_error_name(transfer->status));
		devc->transfer_error = TRUE;
		return;
	}

	/* If this was a read request, wait for the response. */
	if ((devc->state & STATE_EXPECT_RESPONSE) != 0) {
		submit_transfer(devc, acq->xfer_in);
		return;
	}
	if (acq->reg_seq_pos < acq->reg_seq_len)
		acq->reg_seq_pos++; /* register write completed */

	/* Repeat until all queued registers have been written. */
	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
		next_reg_write(acq);
		submit_transfer(devc, acq->xfer_out);
		return;
	}

	switch (devc->state) {
	case STATE_START_CAPTURE:
		sr_info("Acquisition started.");

		if (!devc->cancel_requested)
			devc->state = STATE_STATUS_WAIT;
		else
			submit_request(sdi, STATE_STOP_CAPTURE);
		break;
	case STATE_STOP_CAPTURE:
		if (!devc->cancel_requested)
			submit_request(sdi, STATE_LENGTH_REQUEST);
		else
			devc->state = STATE_IDLE;
		break;
	case STATE_READ_PREPARE:
		if (acq->mem_addr_next < acq->mem_addr_stop && !devc->cancel_requested)
			submit_request(sdi, STATE_READ_REQUEST);
		else
			submit_request(sdi, STATE_READ_FINISH);
		break;
	case STATE_READ_FINISH:
		devc->state = STATE_IDLE;
		break;
	default:
		sr_err("Unexpected device state %d.", devc->state);
		devc->transfer_error = TRUE;
		break;
	}
}

/* USB input transfer completion callback.
 */
static void LIBUSB_CALL transfer_in_completed(struct libusb_transfer *transfer)
{
	const struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct acquisition_state *acq;

	sdi  = transfer->user_data;
	devc = sdi->priv;
	acq  = devc->acquisition;

	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
		sr_err("Transfer from device failed (state %d): %s.",
		       devc->state, libusb_error_name(transfer->status));
		devc->transfer_error = TRUE;
		return;
	}
	if ((devc->state & STATE_EXPECT_RESPONSE) == 0) {
		sr_err("Unexpected completion of input transfer (state %d).",
		       devc->state);
		devc->transfer_error = TRUE;
		return;
	}

	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
		/* Complete register read sequence. */
		if (read_reg_response(acq) != SR_OK) {
			devc->transfer_error = TRUE;
			return;
		}
		/* Repeat until all queued registers have been read. */
		if (++acq->reg_seq_pos < acq->reg_seq_len) {
			next_reg_read(acq);
			submit_transfer(devc, acq->xfer_out);
			return;
		}
	}

	switch (devc->state) {
	case STATE_STATUS_REQUEST:
		if (devc->cancel_requested)
			submit_request(sdi, STATE_STOP_CAPTURE);
		else
			handle_status_response(sdi);
		break;
	case STATE_LENGTH_REQUEST:
		if (devc->cancel_requested)
			submit_request(sdi, STATE_READ_FINISH);
		else
			handle_length_response(sdi);
		break;
	case STATE_READ_REQUEST:
		handle_read_response(sdi);
		break;
	default:
		sr_err("Unexpected device state %d.", devc->state);
		devc->transfer_error = TRUE;
		break;
	}
}

/* Set up the acquisition state record.
 */
static int init_acquisition_state(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct sr_usb_dev_inst *usb;
	struct acquisition_state *acq;

	devc = sdi->priv;
	usb  = sdi->conn;

	if (devc->acquisition) {
		sr_err("Acquisition still in progress?");
		return SR_ERR;
	}
	if (devc->cfg_clock_source == CLOCK_INTERNAL && devc->samplerate == 0) {
		sr_err("Samplerate not set.");
		return SR_ERR;
	}

	acq = g_try_malloc0(sizeof(struct acquisition_state));
	if (!acq)
		return SR_ERR_MALLOC;

	acq->xfer_in = libusb_alloc_transfer(0);
	if (!acq->xfer_in) {
		g_free(acq);
		return SR_ERR_MALLOC;
	}
	acq->xfer_out = libusb_alloc_transfer(0);
	if (!acq->xfer_out) {
		libusb_free_transfer(acq->xfer_in);
		g_free(acq);
		return SR_ERR_MALLOC;
	}

	libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
				  (unsigned char *)acq->xfer_buf_out, 0,
				  &transfer_out_completed,
				  (struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);

	libusb_fill_bulk_transfer(acq->xfer_in, usb->devhdl, EP_REPLY,
				  (unsigned char *)acq->xfer_buf_in,
				  sizeof(acq->xfer_buf_in),
				  &transfer_in_completed,
				  (struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);

	if (devc->limit_msec > 0) {
		acq->duration_max = devc->limit_msec;
		sr_info("Acquisition time limit %" PRIu64 " ms.",
			devc->limit_msec);
	} else
		acq->duration_max = MAX_LIMIT_MSEC;

	if (devc->limit_samples > 0) {
		acq->samples_max = devc->limit_samples;
		sr_info("Acquisition sample count limit %" PRIu64 ".",
			devc->limit_samples);
	} else
		acq->samples_max = MAX_LIMIT_SAMPLES;

	if (devc->cfg_clock_source == CLOCK_INTERNAL) {
		sr_info("Internal clock, samplerate %" PRIu64 ".",
			devc->samplerate);
		/* Ramp up clock speed to enable samplerates above 100 MS/s. */
		acq->clock_boost = (devc->samplerate > SR_MHZ(100));

		/* If only one of the limits is set, derive the other one. */
		if (devc->limit_msec == 0 && devc->limit_samples > 0)
			acq->duration_max = devc->limit_samples
					* 1000 / devc->samplerate + 1;
		else if (devc->limit_samples == 0 && devc->limit_msec > 0)
			acq->samples_max = devc->limit_msec
					* devc->samplerate / 1000;
	} else {
		acq->clock_boost = TRUE;

		if (devc->cfg_clock_edge == EDGE_POSITIVE)
			sr_info("External clock, rising edge.");
		else
			sr_info("External clock, falling edge.");
	}

	acq->rle_enabled = devc->cfg_rle;
	devc->acquisition = acq;

	return SR_OK;
}

SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
{
	struct drv_context *drvc;
	struct dev_context *devc;
	int ret;
	const int poll_interval_ms = 100;

	drvc = sdi->driver->context;
	devc = sdi->priv;

	if (devc->state != STATE_IDLE) {
		sr_err("Not in idle state, cannot start acquisition.");
		return SR_ERR;
	}
	devc->cancel_requested = FALSE;
	devc->transfer_error = FALSE;

	ret = init_acquisition_state(sdi);
	if (ret != SR_OK)
		return ret;

	ret = (*devc->model->setup_acquisition)(sdi);
	if (ret != SR_OK) {
		sr_err("Failed to set up device for acquisition.");
		clear_acquisition_state(sdi);
		return ret;
	}
	/* Register event source for asynchronous USB I/O. */
	ret = usb_source_add(sdi->session, drvc->sr_ctx, poll_interval_ms,
			     &transfer_event, (struct sr_dev_inst *)sdi);
	if (ret != SR_OK) {
		clear_acquisition_state(sdi);
		return ret;
	}
	ret = submit_request(sdi, STATE_START_CAPTURE);

	if (ret == SR_OK)
		ret = std_session_send_df_header(sdi, LOG_PREFIX);

	if (ret != SR_OK) {
		usb_source_remove(sdi->session, drvc->sr_ctx);
		clear_acquisition_state(sdi);
	}

	return ret;
}
Commit	Line	Data
aeaad0b0 DE	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
6ec6c43b	20	#include <config.h>
5874e88d	21	#include <string.h>
515ab088	22	#include "protocol.h"
407b6e2c	23	#include "lwla.h"
5874e88d DE	24
	25	/* Submit an already filled-in USB transfer.
	26	*/
	27	static int submit_transfer(struct dev_context *devc,
	28	struct libusb_transfer *xfer)
	29	{
	30	int ret;
	31
	32	ret = libusb_submit_transfer(xfer);
	33
	34	if (ret != 0) {
	35	sr_err("Submit transfer failed: %s.", libusb_error_name(ret));
	36	devc->transfer_error = TRUE;
	37	return SR_ERR;
	38	}
	39
	40	return SR_OK;
	41	}
	42
be64f90b	43	/* Set up transfer for the next register in a write sequence.
5874e88d	44	*/
be64f90b	45	static void next_reg_write(struct acquisition_state *acq)
aeaad0b0	46	{
be64f90b	47	struct regval *regval;
5874e88d	48
be64f90b	49	regval = &acq->reg_sequence[acq->reg_seq_pos];
5874e88d	50
be64f90b DE	51	acq->xfer_buf_out[0] = LWLA_WORD(CMD_WRITE_REG);
	52	acq->xfer_buf_out[1] = LWLA_WORD(regval->reg);
	53	acq->xfer_buf_out[2] = LWLA_WORD_0(regval->val);
	54	acq->xfer_buf_out[3] = LWLA_WORD_1(regval->val);
5874e88d	55
be64f90b	56	acq->xfer_out->length = 4 * sizeof(acq->xfer_buf_out[0]);
5874e88d DE	57	}
5874e88d DE	58
be64f90b	59	/* Set up transfer for the next register in a read sequence.
5874e88d	60	*/
be64f90b	61	static void next_reg_read(struct acquisition_state *acq)
5874e88d	62	{
be64f90b	63	unsigned int addr;
5874e88d	64
be64f90b	65	addr = acq->reg_sequence[acq->reg_seq_pos].reg;
5874e88d	66
be64f90b DE	67	acq->xfer_buf_out[0] = LWLA_WORD(CMD_READ_REG);
be64f90b DE	68	acq->xfer_buf_out[1] = LWLA_WORD(addr);
5874e88d	69
be64f90b	70	acq->xfer_out->length = 2 * sizeof(acq->xfer_buf_out[0]);
5874e88d DE	71	}
5874e88d DE	72
be64f90b	73	/* Decode the response to a register read request.
5874e88d	74	*/
be64f90b	75	static int read_reg_response(struct acquisition_state *acq)
5874e88d	76	{
be64f90b	77	uint32_t value;
5874e88d	78
be64f90b DE	79	if (acq->xfer_in->actual_length != 4) {
	80	sr_err("Received size %d doesn't match expected size 4.",
	81	acq->xfer_in->actual_length);
	82	return SR_ERR;
5874e88d	83	}
be64f90b DE	84	value = LWLA_TO_UINT32(acq->xfer_buf_in[0]);
be64f90b DE	85	acq->reg_sequence[acq->reg_seq_pos].val = value;
5874e88d	86
5874e88d DE	87	return SR_OK;
	88	}
	89
be64f90b	90	/* Enter a new state and submit the corresponding request to the device.
5874e88d	91	*/
be64f90b DE	92	static int submit_request(const struct sr_dev_inst *sdi,
be64f90b DE	93	enum protocol_state state)
5874e88d DE	94	{
	95	struct dev_context *devc;
	96	struct acquisition_state *acq;
be64f90b	97	int ret;
5874e88d DE	98
	99	devc = sdi->priv;
	100	acq = devc->acquisition;
	101
be64f90b	102	devc->state = state;
5874e88d	103
be64f90b DE	104	acq->xfer_out->length = 0;
	105	acq->reg_seq_pos = 0;
	106	acq->reg_seq_len = 0;
5874e88d	107
be64f90b DE	108	/* Perform the model-specific action for the new state. */
be64f90b DE	109	ret = (*devc->model->prepare_request)(sdi);
5874e88d	110
be64f90b DE	111	if (ret != SR_OK) {
	112	devc->transfer_error = TRUE;
	113	return ret;
	114	}
5874e88d	115
be64f90b DE	116	if (acq->reg_seq_pos < acq->reg_seq_len) {
	117	if ((state & STATE_EXPECT_RESPONSE) != 0)
	118	next_reg_read(acq);
	119	else
	120	next_reg_write(acq);
	121	}
5874e88d	122
be64f90b	123	return submit_transfer(devc, acq->xfer_out);
5874e88d DE	124	}
5874e88d DE	125
be64f90b	126	/* Evaluate and act on the response to a capture status request.
5874e88d	127	*/
be64f90b	128	static void handle_status_response(const struct sr_dev_inst *sdi)
5874e88d DE	129	{
	130	struct dev_context *devc;
	131	struct acquisition_state *acq;
be64f90b	132	unsigned int old_status;
5874e88d DE	133
	134	devc = sdi->priv;
	135	acq = devc->acquisition;
be64f90b	136	old_status = acq->status;
5874e88d	137
be64f90b DE	138	if ((*devc->model->handle_response)(sdi) != SR_OK) {
	139	devc->transfer_error = TRUE;
	140	return;
	141	}
	142	devc->state = STATE_STATUS_WAIT;
5874e88d	143
7ed80817	144	sr_spew("Captured %u words, %" PRIu64 " ms, status 0x%02X.",
be64f90b	145	acq->mem_addr_fill, acq->duration_now, acq->status);
5874e88d	146
be64f90b DE	147	if ((~old_status & acq->status & STATUS_TRIGGERED) != 0)
be64f90b DE	148	sr_info("Capture triggered.");
5874e88d	149
be64f90b DE	150	if (acq->duration_now >= acq->duration_max) {
	151	sr_dbg("Time limit reached, stopping capture.");
	152	submit_request(sdi, STATE_STOP_CAPTURE);
	153	} else if ((acq->status & STATUS_TRIGGERED) == 0) {
	154	sr_spew("Waiting for trigger.");
	155	} else if ((acq->status & STATUS_MEM_AVAIL) == 0) {
	156	sr_dbg("Capture memory filled.");
	157	submit_request(sdi, STATE_LENGTH_REQUEST);
	158	} else if ((acq->status & STATUS_CAPTURING) != 0) {
	159	sr_spew("Sampling in progress.");
	160	}
5874e88d DE	161	}
5874e88d DE	162
be64f90b	163	/* Evaluate and act on the response to a capture length request.
5874e88d	164	*/
be64f90b	165	static void handle_length_response(const struct sr_dev_inst *sdi)
5874e88d DE	166	{
	167	struct dev_context *devc;
	168	struct acquisition_state *acq;
	169
	170	devc = sdi->priv;
	171	acq = devc->acquisition;
	172
be64f90b	173	if ((*devc->model->handle_response)(sdi) != SR_OK) {
5874e88d DE	174	devc->transfer_error = TRUE;
	175	return;
	176	}
be64f90b DE	177	acq->rle = RLE_STATE_DATA;
	178	acq->sample = 0;
	179	acq->run_len = 0;
	180	acq->samples_done = 0;
	181	acq->mem_addr_done = acq->mem_addr_next;
	182	acq->out_index = 0;
5874e88d	183
be64f90b DE	184	if (acq->mem_addr_next >= acq->mem_addr_stop) {
be64f90b DE	185	submit_request(sdi, STATE_READ_FINISH);
5874e88d	186	return;
5874e88d	187	}
7ed80817	188	sr_dbg("%u words in capture buffer.",
be64f90b DE	189	acq->mem_addr_stop - acq->mem_addr_next);
	190
	191	submit_request(sdi, STATE_READ_PREPARE);
5874e88d DE	192	}
5874e88d DE	193
43af7604	194	/* Evaluate and act on the response to a capture memory read request.
5874e88d	195	*/
be64f90b	196	static void handle_read_response(const struct sr_dev_inst *sdi)
5874e88d DE	197	{
	198	struct dev_context *devc;
	199	struct acquisition_state *acq;
be64f90b DE	200	struct sr_datafeed_packet packet;
be64f90b DE	201	struct sr_datafeed_logic logic;
7ed80817	202	unsigned int end_addr;
5874e88d DE	203
	204	devc = sdi->priv;
	205	acq = devc->acquisition;
	206
be64f90b DE	207	/* Prepare session packet. */
	208	packet.type = SR_DF_LOGIC;
	209	packet.payload = &logic;
	210	logic.unitsize = (devc->model->num_channels + 7) / 8;
	211	logic.data = acq->out_packet;
5874e88d	212
be64f90b DE	213	end_addr = MIN(acq->mem_addr_next, acq->mem_addr_stop);
be64f90b DE	214	acq->in_index = 0;
d64b5f43	215
be64f90b DE	216	/*
	217	* Repeatedly call the model-specific read response handler until
	218	* all data received in the transfer has been accounted for.
8a3ddd88	219	*/
be64f90b DE	220	while (!devc->cancel_requested
	221	&& (acq->run_len > 0 \|\| acq->mem_addr_done < end_addr)
	222	&& acq->samples_done < acq->samples_max) {
9497f49e	223
be64f90b DE	224	if ((*devc->model->handle_response)(sdi) != SR_OK) {
	225	devc->transfer_error = TRUE;
	226	return;
	227	}
	228	if (acq->out_index * logic.unitsize >= PACKET_SIZE) {
	229	/* Send off full logic packet. */
	230	logic.length = acq->out_index * logic.unitsize;
	231	sr_session_send(sdi, &packet);
	232	acq->out_index = 0;
	233	}
	234	}
5874e88d	235
be64f90b DE	236	if (!devc->cancel_requested
	237	&& acq->samples_done < acq->samples_max
	238	&& acq->mem_addr_next < acq->mem_addr_stop) {
	239	/* Request the next block. */
	240	submit_request(sdi, STATE_READ_REQUEST);
5874e88d DE	241	return;
5874e88d DE	242	}
5874e88d	243
be64f90b DE	244	/* Send partially filled packet as it is the last one. */
	245	if (!devc->cancel_requested && acq->out_index > 0) {
	246	logic.length = acq->out_index * logic.unitsize;
	247	sr_session_send(sdi, &packet);
	248	acq->out_index = 0;
5874e88d	249	}
be64f90b	250	submit_request(sdi, STATE_READ_FINISH);
5874e88d DE	251	}
5874e88d DE	252
be64f90b	253	/* Destroy and unset the acquisition state record.
5874e88d	254	*/
be64f90b	255	static void clear_acquisition_state(const struct sr_dev_inst *sdi)
5874e88d DE	256	{
	257	struct dev_context *devc;
	258	struct acquisition_state *acq;
5874e88d DE	259
	260	devc = sdi->priv;
	261	acq = devc->acquisition;
	262
be64f90b	263	devc->acquisition = NULL;
5874e88d	264
be64f90b DE	265	if (acq) {
	266	libusb_free_transfer(acq->xfer_out);
	267	libusb_free_transfer(acq->xfer_in);
	268	g_free(acq);
5874e88d DE	269	}
	270	}
	271
be64f90b	272	/* USB I/O source callback.
5874e88d	273	*/
be64f90b	274	static int transfer_event(int fd, int revents, void *cb_data)
5874e88d	275	{
be64f90b	276	const struct sr_dev_inst *sdi;
5874e88d	277	struct dev_context *devc;
be64f90b DE	278	struct drv_context *drvc;
be64f90b DE	279	struct timeval tv;
be64f90b	280	int ret;
5874e88d	281
be64f90b	282	(void)fd;
5874e88d	283
be64f90b DE	284	sdi = cb_data;
	285	devc = sdi->priv;
	286	drvc = sdi->driver->context;
5874e88d	287
be64f90b DE	288	if (!devc \|\| !drvc)
be64f90b DE	289	return G_SOURCE_REMOVE;
5874e88d	290
be64f90b DE	291	/* Handle pending USB events without blocking. */
	292	tv.tv_sec = 0;
	293	tv.tv_usec = 0;
	294	ret = libusb_handle_events_timeout_completed(drvc->sr_ctx->libusb_ctx,
	295	&tv, NULL);
	296	if (ret != 0) {
	297	sr_err("Event handling failed: %s.", libusb_error_name(ret));
5874e88d	298	devc->transfer_error = TRUE;
5874e88d	299	}
2cfd16a3	300
be64f90b DE	301	if (!devc->transfer_error && devc->state == STATE_STATUS_WAIT) {
	302	if (devc->cancel_requested)
	303	submit_request(sdi, STATE_STOP_CAPTURE);
	304	else if (revents == 0) /* status poll timeout */
	305	submit_request(sdi, STATE_STATUS_REQUEST);
2cfd16a3	306	}
5874e88d	307
be64f90b DE	308	/* Stop processing events if an error occurred on a transfer. */
	309	if (devc->transfer_error)
	310	devc->state = STATE_IDLE;
5874e88d	311
be64f90b DE	312	if (devc->state != STATE_IDLE)
be64f90b DE	313	return G_SOURCE_CONTINUE;
5874e88d	314
be64f90b	315	sr_info("Acquisition stopped.");
5874e88d	316
be64f90b DE	317	/* We are done, clean up and send end packet to session bus. */
be64f90b DE	318	clear_acquisition_state(sdi);
3be42bc2	319	std_session_send_df_end(sdi, LOG_PREFIX);
5874e88d	320
be64f90b	321	return G_SOURCE_REMOVE;
5874e88d DE	322	}
	323
	324	/* USB output transfer completion callback.
	325	*/
be64f90b	326	static void LIBUSB_CALL transfer_out_completed(struct libusb_transfer *transfer)
5874e88d	327	{
be64f90b	328	const struct sr_dev_inst *sdi;
5874e88d	329	struct dev_context *devc;
be64f90b	330	struct acquisition_state *acq;
5874e88d DE	331
	332	sdi = transfer->user_data;
	333	devc = sdi->priv;
be64f90b	334	acq = devc->acquisition;
5874e88d DE	335
5874e88d DE	336	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
407b6e2c DE	337	sr_err("Transfer to device failed (state %d): %s.",
407b6e2c DE	338	devc->state, libusb_error_name(transfer->status));
5874e88d DE	339	devc->transfer_error = TRUE;
	340	return;
	341	}
	342
be64f90b DE	343	/* If this was a read request, wait for the response. */
	344	if ((devc->state & STATE_EXPECT_RESPONSE) != 0) {
	345	submit_transfer(devc, acq->xfer_in);
	346	return;
	347	}
	348	if (acq->reg_seq_pos < acq->reg_seq_len)
	349	acq->reg_seq_pos++; /* register write completed */
	350
	351	/* Repeat until all queued registers have been written. */
	352	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
	353	next_reg_write(acq);
	354	submit_transfer(devc, acq->xfer_out);
	355	return;
	356	}
	357
	358	switch (devc->state) {
	359	case STATE_START_CAPTURE:
	360	sr_info("Acquisition started.");
	361
	362	if (!devc->cancel_requested)
5874e88d	363	devc->state = STATE_STATUS_WAIT;
be64f90b DE	364	else
	365	submit_request(sdi, STATE_STOP_CAPTURE);
	366	break;
	367	case STATE_STOP_CAPTURE:
	368	if (!devc->cancel_requested)
	369	submit_request(sdi, STATE_LENGTH_REQUEST);
	370	else
	371	devc->state = STATE_IDLE;
	372	break;
	373	case STATE_READ_PREPARE:
	374	if (acq->mem_addr_next < acq->mem_addr_stop && !devc->cancel_requested)
	375	submit_request(sdi, STATE_READ_REQUEST);
	376	else
	377	submit_request(sdi, STATE_READ_FINISH);
	378	break;
	379	case STATE_READ_FINISH:
	380	devc->state = STATE_IDLE;
	381	break;
	382	default:
	383	sr_err("Unexpected device state %d.", devc->state);
	384	devc->transfer_error = TRUE;
	385	break;
5874e88d DE	386	}
	387	}
	388
	389	/* USB input transfer completion callback.
	390	*/
be64f90b	391	static void LIBUSB_CALL transfer_in_completed(struct libusb_transfer *transfer)
5874e88d	392	{
be64f90b	393	const struct sr_dev_inst *sdi;
5874e88d DE	394	struct dev_context *devc;
	395	struct acquisition_state *acq;
	396
	397	sdi = transfer->user_data;
	398	devc = sdi->priv;
	399	acq = devc->acquisition;
	400
	401	if (transfer->status != LIBUSB_TRANSFER_COMPLETED) {
be64f90b DE	402	sr_err("Transfer from device failed (state %d): %s.",
	403	devc->state, libusb_error_name(transfer->status));
	404	devc->transfer_error = TRUE;
	405	return;
	406	}
	407	if ((devc->state & STATE_EXPECT_RESPONSE) == 0) {
	408	sr_err("Unexpected completion of input transfer (state %d).",
	409	devc->state);
5874e88d DE	410	devc->transfer_error = TRUE;
	411	return;
	412	}
	413
be64f90b DE	414	if (acq->reg_seq_pos < acq->reg_seq_len && !devc->cancel_requested) {
	415	/* Complete register read sequence. */
	416	if (read_reg_response(acq) != SR_OK) {
	417	devc->transfer_error = TRUE;
	418	return;
	419	}
	420	/* Repeat until all queued registers have been read. */
	421	if (++acq->reg_seq_pos < acq->reg_seq_len) {
	422	next_reg_read(acq);
	423	submit_transfer(devc, acq->xfer_out);
	424	return;
	425	}
	426	}
	427
5874e88d	428	switch (devc->state) {
be64f90b DE	429	case STATE_STATUS_REQUEST:
	430	if (devc->cancel_requested)
	431	submit_request(sdi, STATE_STOP_CAPTURE);
	432	else
	433	handle_status_response(sdi);
5874e88d	434	break;
be64f90b DE	435	case STATE_LENGTH_REQUEST:
	436	if (devc->cancel_requested)
	437	submit_request(sdi, STATE_READ_FINISH);
5874e88d	438	else
be64f90b DE	439	handle_length_response(sdi);
	440	break;
	441	case STATE_READ_REQUEST:
	442	handle_read_response(sdi);
5874e88d DE	443	break;
	444	default:
	445	sr_err("Unexpected device state %d.", devc->state);
be64f90b	446	devc->transfer_error = TRUE;
5874e88d DE	447	break;
	448	}
	449	}
	450
be64f90b	451	/* Set up the acquisition state record.
5874e88d	452	*/
be64f90b	453	static int init_acquisition_state(const struct sr_dev_inst *sdi)
5874e88d DE	454	{
5874e88d DE	455	struct dev_context *devc;
be64f90b DE	456	struct sr_usb_dev_inst *usb;
be64f90b DE	457	struct acquisition_state *acq;
5874e88d DE	458
5874e88d DE	459	devc = sdi->priv;
be64f90b	460	usb = sdi->conn;
5874e88d	461
be64f90b DE	462	if (devc->acquisition) {
	463	sr_err("Acquisition still in progress?");
	464	return SR_ERR;
	465	}
	466	if (devc->cfg_clock_source == CLOCK_INTERNAL && devc->samplerate == 0) {
	467	sr_err("Samplerate not set.");
5874e88d	468	return SR_ERR;
e1172cf8	469	}
5874e88d	470
be64f90b DE	471	acq = g_try_malloc0(sizeof(struct acquisition_state));
	472	if (!acq)
	473	return SR_ERR_MALLOC;
5874e88d	474
be64f90b DE	475	acq->xfer_in = libusb_alloc_transfer(0);
	476	if (!acq->xfer_in) {
	477	g_free(acq);
	478	return SR_ERR_MALLOC;
	479	}
	480	acq->xfer_out = libusb_alloc_transfer(0);
	481	if (!acq->xfer_out) {
	482	libusb_free_transfer(acq->xfer_in);
	483	g_free(acq);
	484	return SR_ERR_MALLOC;
aeaad0b0	485	}
5874e88d	486
be64f90b DE	487	libusb_fill_bulk_transfer(acq->xfer_out, usb->devhdl, EP_COMMAND,
	488	(unsigned char *)acq->xfer_buf_out, 0,
	489	&transfer_out_completed,
	490	(struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);
5874e88d	491
be64f90b DE	492	libusb_fill_bulk_transfer(acq->xfer_in, usb->devhdl, EP_REPLY,
	493	(unsigned char *)acq->xfer_buf_in,
	494	sizeof(acq->xfer_buf_in),
	495	&transfer_in_completed,
	496	(struct sr_dev_inst *)sdi, USB_TIMEOUT_MS);
29d58767	497
9497f49e DE	498	if (devc->limit_msec > 0) {
	499	acq->duration_max = devc->limit_msec;
	500	sr_info("Acquisition time limit %" PRIu64 " ms.",
	501	devc->limit_msec);
	502	} else
	503	acq->duration_max = MAX_LIMIT_MSEC;
	504
	505	if (devc->limit_samples > 0) {
	506	acq->samples_max = devc->limit_samples;
	507	sr_info("Acquisition sample count limit %" PRIu64 ".",
	508	devc->limit_samples);
	509	} else
	510	acq->samples_max = MAX_LIMIT_SAMPLES;
29d58767	511
6358f0a9	512	if (devc->cfg_clock_source == CLOCK_INTERNAL) {
9497f49e DE	513	sr_info("Internal clock, samplerate %" PRIu64 ".",
9497f49e DE	514	devc->samplerate);
be64f90b DE	515	/* Ramp up clock speed to enable samplerates above 100 MS/s. */
be64f90b DE	516	acq->clock_boost = (devc->samplerate > SR_MHZ(100));
29d58767 DE	517
	518	/* If only one of the limits is set, derive the other one. */
	519	if (devc->limit_msec == 0 && devc->limit_samples > 0)
	520	acq->duration_max = devc->limit_samples
	521	* 1000 / devc->samplerate + 1;
	522	else if (devc->limit_samples == 0 && devc->limit_msec > 0)
	523	acq->samples_max = devc->limit_msec
	524	* devc->samplerate / 1000;
6358f0a9	525	} else {
be64f90b	526	acq->clock_boost = TRUE;
6358f0a9	527
be64f90b	528	if (devc->cfg_clock_edge == EDGE_POSITIVE)
6358f0a9	529	sr_info("External clock, rising edge.");
be64f90b DE	530	else
be64f90b DE	531	sr_info("External clock, falling edge.");
29d58767	532	}
5874e88d	533
be64f90b DE	534	acq->rle_enabled = devc->cfg_rle;
be64f90b DE	535	devc->acquisition = acq;
5874e88d	536
be64f90b	537	return SR_OK;
5874e88d DE	538	}
5874e88d DE	539
5874e88d DE	540	SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi)
5874e88d DE	541	{
be64f90b	542	struct drv_context *drvc;
5874e88d	543	struct dev_context *devc;
be64f90b	544	int ret;
407b6e2c DE	545	const int poll_interval_ms = 100;
407b6e2c DE	546
be64f90b	547	drvc = sdi->driver->context;
5874e88d	548	devc = sdi->priv;
29d58767	549
be64f90b DE	550	if (devc->state != STATE_IDLE) {
	551	sr_err("Not in idle state, cannot start acquisition.");
	552	return SR_ERR;
	553	}
	554	devc->cancel_requested = FALSE;
	555	devc->transfer_error = FALSE;
5874e88d	556
be64f90b DE	557	ret = init_acquisition_state(sdi);
	558	if (ret != SR_OK)
	559	return ret;
5874e88d	560
be64f90b DE	561	ret = (*devc->model->setup_acquisition)(sdi);
	562	if (ret != SR_OK) {
	563	sr_err("Failed to set up device for acquisition.");
	564	clear_acquisition_state(sdi);
	565	return ret;
5874e88d	566	}
be64f90b	567	/* Register event source for asynchronous USB I/O. */
407b6e2c	568	ret = usb_source_add(sdi->session, drvc->sr_ctx, poll_interval_ms,
be64f90b DE	569	&transfer_event, (struct sr_dev_inst *)sdi);
	570	if (ret != SR_OK) {
	571	clear_acquisition_state(sdi);
	572	return ret;
5874e88d	573	}
be64f90b	574	ret = submit_request(sdi, STATE_START_CAPTURE);
5874e88d	575
1c47e0da	576	if (ret == SR_OK)
be64f90b	577	ret = std_session_send_df_header(sdi, LOG_PREFIX);
1c47e0da	578
be64f90b DE	579	if (ret != SR_OK) {
	580	usb_source_remove(sdi->session, drvc->sr_ctx);
	581	clear_acquisition_state(sdi);
5874e88d	582	}
d64b5f43	583
be64f90b	584	return ret;
aeaad0b0	585	}