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scpi-pps: Add HP 6631B, HP 66332A, HP 6633B and HP 6634B power supplies
[libsigrok.git] / src / hardware / scpi-pps / profiles.c
CommitLineData
d4eabea8
BV		 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
AG		 5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
7e381bfc 7 * Copyright (C) 2017 Frank Stettner <frank-stettner@gmx.net>
d4eabea8
BV		 8 *
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 3 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
6ec6c43b 23#include <config.h>
22c18b03 24#include <string.h>
ba464a12 25#include <strings.h>
d4eabea8
BV		 26#include "protocol.h"
27
28#define CH_IDX(x) (1 << x)
6ed709fe 29#define FREQ_DC_ONLY {0, 0, 0, 0, 0}
d4eabea8 30
5c9e56c9
AG		 31/* Agilent/Keysight N5700A series */
32static const uint32_t agilent_n5700a_devopts[] = {
e91bb0a6 33 SR_CONF_CONTINUOUS,
5c9e56c9
AG		 34};
35
36static const uint32_t agilent_n5700a_devopts_cg[] = {
37 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
38 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH		 40 SR_CONF_VOLTAGE | SR_CONF_GET,
41 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
42 SR_CONF_CURRENT | SR_CONF_GET,
43 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG		 44};
45
6cc93128
AG		 46static const struct channel_group_spec agilent_n5700a_cg[] = {
47 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
48};
49
8cb5affe 50static const struct channel_spec agilent_n5767a_ch[] = {
6ed709fe 51 { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG		 52};
53
6cc93128 54static const struct channel_spec agilent_n5763a_ch[] = {
6ed709fe 55 { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG		 56};
57
58/*
59 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 60 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 61 */
8cb5affe 62static const struct scpi_command agilent_n5700a_cmd[] = {
5c9e56c9
AG		 63 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
64 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
65 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
66 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
67 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
68 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
69 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
70 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
71 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
72 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
73 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
74 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
75 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
76 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
77 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
78 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 79 /* Current limit (CC mode) and OCP are set using the same command. */
5c9e56c9
AG		 80 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
81 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 82 ALL_ZERO
5c9e56c9
AG		 83};
84
4ee1e2f3
AG		 85/* Chroma 61600 series AC source */
86static const uint32_t chroma_61604_devopts[] = {
e91bb0a6 87 SR_CONF_CONTINUOUS,
4ee1e2f3
AG		 88};
89
90static const uint32_t chroma_61604_devopts_cg[] = {
91 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
92 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH		 93 SR_CONF_VOLTAGE | SR_CONF_GET,
94 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
AG		 95 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
96 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH		 97 SR_CONF_CURRENT | SR_CONF_GET,
98 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
4ee1e2f3
AG		 99};
100
8cb5affe 101static const struct channel_spec chroma_61604_ch[] = {
6ed709fe 102 { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 } },
4ee1e2f3
AG		 103};
104
8cb5affe 105static const struct channel_group_spec chroma_61604_cg[] = {
4ee1e2f3
AG		 106 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
107};
108
8cb5affe 109static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
AG		 110 { SCPI_CMD_REMOTE, "SYST:REM" },
111 { SCPI_CMD_LOCAL, "SYST:LOC" },
112 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 113 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
AG		 114 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
115 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
116 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
117 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
AG		 118 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
119 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
AG		 120 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
121 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
122 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
123 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
124 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 125 /* This is not a current limit mode. It is overcurrent protection. */
4ee1e2f3
AG		 126 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
127 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 128 ALL_ZERO
4ee1e2f3
AG		 129};
130
5281993e 131/* Chroma 62000 series DC source */
5281993e 132static const uint32_t chroma_62000_devopts[] = {
e91bb0a6 133 SR_CONF_CONTINUOUS,
5281993e
AG		 134};
135
136static const uint32_t chroma_62000_devopts_cg[] = {
137 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
138 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
139 SR_CONF_VOLTAGE | SR_CONF_GET,
140 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
141 SR_CONF_CURRENT | SR_CONF_GET,
142 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
144};
145
5281993e
AG		 146static const struct channel_group_spec chroma_62000_cg[] = {
147 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
148};
149
150static const struct scpi_command chroma_62000_cmd[] = {
151 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
152 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
153 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
154 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
155 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
156 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
157 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
158 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
159 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
160 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
161 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
162 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
163 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
164 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
165 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
166 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
167 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
168 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
169 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 170 ALL_ZERO
5281993e
AG		 171};
172
9a5185c7
AG		 173static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
174 struct sr_scpi_hw_info *hw_info,
175 struct channel_spec **channels, unsigned int *num_channels,
176 struct channel_group_spec **channel_groups,
177 unsigned int *num_channel_groups)
178{
6ed709fe 179 unsigned int volts, amps, watts;
9a5185c7
AG		 180 struct channel_spec *channel;
181
182 (void)sdi;
183
6ed709fe
AJ		 184 sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
185 watts *= 100;
186 sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
9a5185c7
AG		 187
188 if (volts > 600) {
189 sr_err("Probed max voltage of %u V is out of spec.", volts);
190 return SR_ERR_BUG;
191 }
192
6ed709fe 193 if (amps > 120) {
9a5185c7
AG		 194 sr_err("Probed max current of %u A is out of spec.", amps);
195 return SR_ERR_BUG;
196 }
197
6ed709fe
AJ		 198 if (watts > 5000) {
199 sr_err("Probed max power of %u W is out of spec.", watts);
200 return SR_ERR_BUG;
201 }
202
9a5185c7
AG		 203 channel = g_malloc0(sizeof(struct channel_spec));
204 channel->name = "1";
6ed709fe 205 channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
bcee1299
UH		 206 channel->voltage[1] = volts;
207 channel->current[1] = amps;
208 channel->power[1] = watts;
9a5185c7 209 channel->voltage[2] = channel->current[2] = 0.01;
6ed709fe
AJ		 210 channel->voltage[3] = channel->voltage[4] = 3;
211 channel->current[3] = channel->current[4] = 4;
9a5185c7
AG		 212 *channels = channel;
213 *num_channels = 1;
214
215 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
216 **channel_groups = chroma_62000_cg[0];
217 *num_channel_groups = 1;
218
219 return SR_OK;
220}
221
319fe9ce
UH		 222/* Rigol DP700 series */
223static const uint32_t rigol_dp700_devopts[] = {
224 SR_CONF_CONTINUOUS,
225};
226
227static const uint32_t rigol_dp700_devopts_cg[] = {
228 SR_CONF_REGULATION | SR_CONF_GET,
229 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
230 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
231 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
232 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
233 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
234 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
235 SR_CONF_VOLTAGE | SR_CONF_GET,
236 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
237 SR_CONF_CURRENT | SR_CONF_GET,
238 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
239 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
240};
241
242static const struct channel_spec rigol_dp711_ch[] = {
243 { "1", { 0, 30, 0.01, 3, 3 }, { 0, 5, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY },
244};
245
246static const struct channel_spec rigol_dp712_ch[] = {
247 { "1", { 0, 50, 0.01, 3, 3 }, { 0, 3, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY },
248};
249
250static const struct channel_group_spec rigol_dp700_cg[] = {
251 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
252};
253
254/* Same as the DP800 series, except for the missing :SYST:OTP* commands. */
255static const struct scpi_command rigol_dp700_cmd[] = {
256 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
257 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
258 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
259 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
260 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
261 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
262 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
263 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
264 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
265 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
266 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
267 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
268 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
269 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
270 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
271 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
272 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
273 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
274 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
275 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
276 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
277 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
278 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
279 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
280 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
281 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
282 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
283 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
284 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
285 ALL_ZERO
286};
287
d4eabea8 288/* Rigol DP800 series */
584560f1 289static const uint32_t rigol_dp800_devopts[] = {
e91bb0a6 290 SR_CONF_CONTINUOUS,
5827f61b 291 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV		 292};
293
584560f1 294static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 295 SR_CONF_REGULATION | SR_CONF_GET,
5827f61b
BV		 296 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
297 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
298 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
299 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
300 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
301 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
AJ		 302 SR_CONF_VOLTAGE | SR_CONF_GET,
303 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
304 SR_CONF_CURRENT | SR_CONF_GET,
305 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
306 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV		 307};
308
8cb5affe 309static const struct channel_spec rigol_dp821a_ch[] = {
6ed709fe
AJ		 310 { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
311 { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY },
cfcdf576
ML		 312};
313
8cb5affe 314static const struct channel_spec rigol_dp831_ch[] = {
6ed709fe
AJ		 315 { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY },
316 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
317 { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
d4eabea8
BV		 318};
319
8cb5affe 320static const struct channel_spec rigol_dp832_ch[] = {
6ed709fe
AJ		 321 { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
322 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
323 { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
3222ee10
BV		 324};
325
8cb5affe 326static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML		 327 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
328 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
329};
330
8cb5affe 331static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
BV		 332 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
333 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
334 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
335};
336
8cb5affe 337static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
BV		 338 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
339 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV		 340 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
341 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
342 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV		 343 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
344 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
345 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
346 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
347 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
348 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
349 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
350 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
351 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
352 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
353 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
354 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 355 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV		 356 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
357 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV		 358 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
359 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
360 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
361 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
362 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
363 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
364 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
365 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
366 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
367 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
368 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
369 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 370 ALL_ZERO
d4eabea8
BV		 371};
372
bfc86799 373/* HP 663xx series */
e76a3575
AG		 374static const uint32_t hp_6630a_devopts[] = {
375 SR_CONF_CONTINUOUS,
7c517d02
FS		 376};
377
378static const uint32_t hp_6630a_devopts_cg[] = {
e76a3575
AG		 379 SR_CONF_ENABLED | SR_CONF_SET,
380 SR_CONF_VOLTAGE | SR_CONF_GET,
381 SR_CONF_CURRENT | SR_CONF_GET,
382 SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
383 SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
384 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
385 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
386};
387
a61c8cce 388static const uint32_t hp_6630b_devopts[] = {
e91bb0a6 389 SR_CONF_CONTINUOUS,
7c517d02
FS		 390};
391
a61c8cce 392static const uint32_t hp_6630b_devopts_cg[] = {
7a0b98b5
AJ		 393 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
394 SR_CONF_VOLTAGE | SR_CONF_GET,
395 SR_CONF_CURRENT | SR_CONF_GET,
396 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
397 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
7e381bfc
FS		 398 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
399 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
bc4a2a46
BV		 400};
401
e76a3575 402static const struct channel_spec hp_6633a_ch[] = {
6ed709fe 403 { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
e76a3575
AG		 404};
405
a61c8cce
FS		 406static const struct channel_spec hp_6631b_ch[] = {
407 { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY },
408};
409
8cb5affe 410static const struct channel_spec hp_6632b_ch[] = {
6ed709fe 411 { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
bc4a2a46
BV		 412};
413
a61c8cce
FS		 414static const struct channel_spec hp_66332a_ch[] = {
415 { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
416};
417
418static const struct channel_spec hp_6633b_ch[] = {
419 { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.000526, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
420};
421
422static const struct channel_spec hp_6634b_ch[] = {
423 { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.000263, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY },
424};
425
e76a3575 426static const struct channel_group_spec hp_663xx_cg[] = {
bc4a2a46
BV		 427 { "1", CH_IDX(0), 0 },
428};
429
e76a3575
AG		 430static const struct scpi_command hp_6630a_cmd[] = {
431 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
432 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
433 { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
434 { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
435 { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
436 { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
437 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
438 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
439 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
440 ALL_ZERO
441};
442
a61c8cce 443static const struct scpi_command hp_6630b_cmd[] = {
7e381bfc
FS		 444 { SCPI_CMD_REMOTE, "SYST:REM" },
445 { SCPI_CMD_LOCAL, "SYST:LOC" },
bc4a2a46 446 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV		 447 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
448 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV		 449 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
450 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV		 451 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
452 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
453 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
454 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
7e381bfc
FS		 455 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
456 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT 1" },
457 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT 0" },
458 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
459 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
91ef511d 460 ALL_ZERO
bc4a2a46
BV		 461};
462
c3eadb07 463/* Philips/Fluke PM2800 series */
9d9cf1c4 464static const uint32_t philips_pm2800_devopts[] = {
e91bb0a6 465 SR_CONF_CONTINUOUS,
9d9cf1c4
BV		 466};
467
c3eadb07 468static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ		 469 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
470 SR_CONF_VOLTAGE | SR_CONF_GET,
471 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
472 SR_CONF_CURRENT | SR_CONF_GET,
473 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV		 474 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
475 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
476 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
477 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 478 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV		 479};
480
481enum philips_pm2800_modules {
482 PM2800_MOD_30V_10A = 1,
483 PM2800_MOD_60V_5A,
484 PM2800_MOD_60V_10A,
485 PM2800_MOD_8V_15A,
486 PM2800_MOD_60V_2A,
487 PM2800_MOD_120V_1A,
488};
489
329733d9 490static const struct philips_pm2800_module_spec {
c3eadb07 491 /* Min, max, programming resolution. */
bcee1299
UH		 492 double voltage[5];
493 double current[5];
494 double power[5];
c3eadb07
BV		 495} philips_pm2800_module_specs[] = {
496 /* Autoranging modules. */
6ed709fe
AJ		 497 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
498 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
499 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
c3eadb07 500 /* Linear modules. */
6ed709fe
AJ		 501 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
502 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
503 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
c3eadb07
BV		 504};
505
329733d9 506static const struct philips_pm2800_model {
c3eadb07
BV		 507 unsigned int chassis;
508 unsigned int num_modules;
509 unsigned int set;
510 unsigned int modules[3];
511} philips_pm2800_matrix[] = {
512 /* Autoranging chassis. */
513 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
514 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
515 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
516 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
517 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
518 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
519 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
520 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
521 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
522 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
523 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
524 /* Linear chassis. */
525 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
526 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
527 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
528 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
529 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
530 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
531 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
532};
533
329733d9 534static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV		 535
536static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
537 struct sr_scpi_hw_info *hw_info,
538 struct channel_spec **channels, unsigned int *num_channels,
539 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
540{
329733d9
UH		 541 const struct philips_pm2800_model *model;
542 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV		 543 unsigned int chassis, num_modules, set, module, m, i;
544
545 (void)sdi;
546
547 /*
548 * The model number as reported by *IDN? looks like e.g. PM2813/11,
549 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
550 * 3 = linear series) and the number of modules: 1-3 for autoranging,
551 * 1-2 for linear.
552 * After the slash, the first digit denotes the module set. The
553 * digit after that denotes front (5) or rear (1) binding posts.
554 */
555 chassis = hw_info->model[4] - 0x30;
556 num_modules = hw_info->model[5] - 0x30;
557 set = hw_info->model[7] - 0x30;
558 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
559 model = &philips_pm2800_matrix[m];
560 if (model->chassis == chassis && model->num_modules == num_modules
561 && model->set == set)
562 break;
563 }
564 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
565 sr_dbg("Model %s not found in matrix.", hw_info->model);
566 return SR_ERR;
567 }
568
569 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
570 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
571 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
572 for (i = 0; i < num_modules; i++) {
573 module = model->modules[i];
574 spec = &philips_pm2800_module_specs[module];
6ed709fe 575 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
c3eadb07 576 spec->voltage[0], spec->voltage[1],
6ed709fe 577 spec->current[0], spec->current[1],
d9251a2c 578 spec->power[0], spec->power[1]);
329733d9 579 (*channels)[i].name = (char *)philips_pm2800_names[i];
bcee1299 580 memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15);
329733d9 581 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV		 582 (*channel_groups)[i].channel_index_mask = 1 << i;
583 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
584 }
585 *num_channels = *num_channel_groups = num_modules;
586
587 return SR_OK;
588}
589
8cb5affe 590static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV		 591 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
592 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
593 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
594 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
595 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
596 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
597 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
598 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
599 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
600 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
601 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
602 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
603 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
604 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
605 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
606 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
607 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
608 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 609 ALL_ZERO
c3eadb07
BV		 610};
611
81eb36d6
MS		 612static const uint32_t rs_hmc8043_devopts[] = {
613 SR_CONF_CONTINUOUS,
614};
615
616static const uint32_t rs_hmc8043_devopts_cg[] = {
617 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
618 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
619 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
620 SR_CONF_VOLTAGE | SR_CONF_GET,
621 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
622 SR_CONF_CURRENT | SR_CONF_GET,
623 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
624 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
625};
626
627static const struct channel_spec rs_hmc8043_ch[] = {
628 { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
629 { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
630 { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
631};
632
633static const struct channel_group_spec rs_hmc8043_cg[] = {
634 { "1", CH_IDX(0), PPS_OVP },
635 { "2", CH_IDX(1), PPS_OVP },
636 { "3", CH_IDX(2), PPS_OVP },
637};
638
639static const struct scpi_command rs_hmc8043_cmd[] = {
640 { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
641 { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
642 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
643 { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
644 { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
645 { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
646 { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
647 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
648 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
649 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
650 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
651 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
652 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
653 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" },
654 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" },
655 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" },
656 ALL_ZERO
657};
658
d4eabea8 659SR_PRIV const struct scpi_pps pps_profiles[] = {
6cc93128
AG		 660 /* Agilent N5763A */
661 { "Agilent", "N5763A", 0,
662 ARRAY_AND_SIZE(agilent_n5700a_devopts),
663 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
664 ARRAY_AND_SIZE(agilent_n5763a_ch),
665 ARRAY_AND_SIZE(agilent_n5700a_cg),
666 agilent_n5700a_cmd,
667 .probe_channels = NULL,
668 },
ca314e06 669
5c9e56c9
AG		 670 /* Agilent N5767A */
671 { "Agilent", "N5767A", 0,
672 ARRAY_AND_SIZE(agilent_n5700a_devopts),
673 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
674 ARRAY_AND_SIZE(agilent_n5767a_ch),
6cc93128 675 ARRAY_AND_SIZE(agilent_n5700a_cg),
91ef511d 676 agilent_n5700a_cmd,
5c9e56c9
AG		 677 .probe_channels = NULL,
678 },
ca314e06 679
4ee1e2f3
AG		 680 /* Chroma 61604 */
681 { "Chroma", "61604", 0,
682 ARRAY_AND_SIZE(chroma_61604_devopts),
683 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
684 ARRAY_AND_SIZE(chroma_61604_ch),
685 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 686 chroma_61604_cmd,
4ee1e2f3
AG		 687 .probe_channels = NULL,
688 },
ca314e06 689
5281993e 690 /* Chroma 62000 series */
9a5185c7 691 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG		 692 ARRAY_AND_SIZE(chroma_62000_devopts),
693 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG		 694 NULL, 0,
695 NULL, 0,
91ef511d 696 chroma_62000_cmd,
9a5185c7 697 .probe_channels = chroma_62000p_probe_channels,
5281993e 698 },
ca314e06 699
e76a3575
AG		 700 /* HP 6633A */
701 { "HP", "6633A", 0,
702 ARRAY_AND_SIZE(hp_6630a_devopts),
7c517d02 703 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
e76a3575
AG		 704 ARRAY_AND_SIZE(hp_6633a_ch),
705 ARRAY_AND_SIZE(hp_663xx_cg),
706 hp_6630a_cmd,
707 .probe_channels = NULL,
708 },
709
a61c8cce
FS		 710 /* HP 6631B */
711 { "HP", "6631B", PPS_OVP | PPS_OCP | PPS_OTP,
712 ARRAY_AND_SIZE(hp_6630b_devopts),
713 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
714 ARRAY_AND_SIZE(hp_6631b_ch),
715 ARRAY_AND_SIZE(hp_663xx_cg),
716 hp_6630b_cmd,
717 .probe_channels = NULL,
718 },
719
bc4a2a46 720 /* HP 6632B */
7e381bfc 721 { "HP", "6632B", PPS_OVP | PPS_OCP | PPS_OTP,
a61c8cce
FS		 722 ARRAY_AND_SIZE(hp_6630b_devopts),
723 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
bc4a2a46 724 ARRAY_AND_SIZE(hp_6632b_ch),
e76a3575 725 ARRAY_AND_SIZE(hp_663xx_cg),
a61c8cce
FS		 726 hp_6630b_cmd,
727 .probe_channels = NULL,
728 },
729
730 /* HP 66332A */
731 { "HP", "66332A", PPS_OVP | PPS_OCP | PPS_OTP,
732 ARRAY_AND_SIZE(hp_6630b_devopts),
733 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
734 ARRAY_AND_SIZE(hp_66332a_ch),
735 ARRAY_AND_SIZE(hp_663xx_cg),
736 hp_6630b_cmd,
737 .probe_channels = NULL,
738 },
739
740 /* HP 6633B */
741 { "HP", "6633B", PPS_OVP | PPS_OCP | PPS_OTP,
742 ARRAY_AND_SIZE(hp_6630b_devopts),
743 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
744 ARRAY_AND_SIZE(hp_6633b_ch),
745 ARRAY_AND_SIZE(hp_663xx_cg),
746 hp_6630b_cmd,
747 .probe_channels = NULL,
748 },
749
750 /* HP 6634B */
751 { "HP", "6634B", PPS_OVP | PPS_OCP | PPS_OTP,
752 ARRAY_AND_SIZE(hp_6630b_devopts),
753 ARRAY_AND_SIZE(hp_6630b_devopts_cg),
754 ARRAY_AND_SIZE(hp_6634b_ch),
755 ARRAY_AND_SIZE(hp_663xx_cg),
756 hp_6630b_cmd,
c3eadb07 757 .probe_channels = NULL,
bc4a2a46
BV		 758 },
759
319fe9ce
UH		 760 /* Rigol DP700 series */
761 { "Rigol", "^DP711$", 0,
762 ARRAY_AND_SIZE(rigol_dp700_devopts),
763 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
764 ARRAY_AND_SIZE(rigol_dp711_ch),
765 ARRAY_AND_SIZE(rigol_dp700_cg),
766 rigol_dp700_cmd,
767 .probe_channels = NULL,
768 },
769 { "Rigol", "^DP712$", 0,
770 ARRAY_AND_SIZE(rigol_dp700_devopts),
771 ARRAY_AND_SIZE(rigol_dp700_devopts_cg),
772 ARRAY_AND_SIZE(rigol_dp712_ch),
773 ARRAY_AND_SIZE(rigol_dp700_cg),
774 rigol_dp700_cmd,
775 .probe_channels = NULL,
776 },
777
d4eabea8 778 /* Rigol DP800 series */
cfcdf576
ML		 779 { "Rigol", "^DP821A$", PPS_OTP,
780 ARRAY_AND_SIZE(rigol_dp800_devopts),
781 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
782 ARRAY_AND_SIZE(rigol_dp821a_ch),
783 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 784 rigol_dp800_cmd,
cfcdf576
ML		 785 .probe_channels = NULL,
786 },
3222ee10
BV		 787 { "Rigol", "^DP831A$", PPS_OTP,
788 ARRAY_AND_SIZE(rigol_dp800_devopts),
789 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
790 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 791 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 792 rigol_dp800_cmd,
c3eadb07 793 .probe_channels = NULL,
3222ee10
BV		 794 },
795 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
796 ARRAY_AND_SIZE(rigol_dp800_devopts),
797 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
798 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 799 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 800 rigol_dp800_cmd,
c3eadb07
BV		 801 .probe_channels = NULL,
802 },
803
804 /* Philips/Fluke PM2800 series */
805 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 806 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV		 807 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
808 NULL, 0,
809 NULL, 0,
91ef511d 810 philips_pm2800_cmd,
c3eadb07 811 philips_pm2800_probe_channels,
d4eabea8 812 },
81eb36d6
MS		 813
814 /* Rohde & Schwarz HMC8043 */
815 { "Rohde&Schwarz", "HMC8043", 0,
816 ARRAY_AND_SIZE(rs_hmc8043_devopts),
817 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
818 ARRAY_AND_SIZE(rs_hmc8043_ch),
819 ARRAY_AND_SIZE(rs_hmc8043_cg),
820 rs_hmc8043_cmd,
821 .probe_channels = NULL,
822 },
d4eabea8 823};
d4eabea8 824
1beccaed 825SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);
Hardware access and backend lib