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CommitLineData
d4eabea8
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
4ee1e2f3
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5 * Copyright (C) 2015 Google, Inc.
6 * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.)
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
6ec6c43b 22#include <config.h>
22c18b03 23#include <string.h>
ba464a12 24#include <strings.h>
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25#include "protocol.h"
26
27#define CH_IDX(x) (1 << x)
6ed709fe 28#define FREQ_DC_ONLY {0, 0, 0, 0, 0}
d4eabea8 29
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30/* Agilent/Keysight N5700A series */
31static const uint32_t agilent_n5700a_devopts[] = {
e91bb0a6 32 SR_CONF_CONTINUOUS,
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33};
34
35static const uint32_t agilent_n5700a_devopts_cg[] = {
36 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
37 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
38 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
UH
39 SR_CONF_VOLTAGE | SR_CONF_GET,
40 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_CURRENT | SR_CONF_GET,
42 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
5c9e56c9
AG
43};
44
6cc93128
AG
45static const struct channel_group_spec agilent_n5700a_cg[] = {
46 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
47};
48
8cb5affe 49static const struct channel_spec agilent_n5767a_ch[] = {
6ed709fe 50 { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG
51};
52
6cc93128 53static const struct channel_spec agilent_n5763a_ch[] = {
6ed709fe 54 { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY },
5c9e56c9
AG
55};
56
57/*
58 * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit
562a3490 59 * in STAT:QUES:EVEN?, but this is not implemented.
5c9e56c9 60 */
8cb5affe 61static const struct scpi_command agilent_n5700a_cmd[] = {
5c9e56c9
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62 { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" },
63 { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" },
64 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
65 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
66 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
67 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
68 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
69 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
70 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" },
71 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
72 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
73 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" },
74 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" },
75 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" },
76 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"},
77 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"},
562a3490 78 /* Current limit (CC mode) and OCP are set using the same command. */
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AG
79 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" },
80 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" },
91ef511d 81 ALL_ZERO
5c9e56c9
AG
82};
83
4ee1e2f3
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84/* Chroma 61600 series AC source */
85static const uint32_t chroma_61604_devopts[] = {
e91bb0a6 86 SR_CONF_CONTINUOUS,
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87};
88
89static const uint32_t chroma_61604_devopts_cg[] = {
90 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
91 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
da005885
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92 SR_CONF_VOLTAGE | SR_CONF_GET,
93 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
6c0c9dd2
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94 SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET,
95 SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
da005885
UH
96 SR_CONF_CURRENT | SR_CONF_GET,
97 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
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98};
99
8cb5affe 100static const struct channel_spec chroma_61604_ch[] = {
6ed709fe 101 { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 } },
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102};
103
8cb5affe 104static const struct channel_group_spec chroma_61604_cg[] = {
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105 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
106};
107
8cb5affe 108static const struct scpi_command chroma_61604_cmd[] = {
4ee1e2f3
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109 { SCPI_CMD_REMOTE, "SYST:REM" },
110 { SCPI_CMD_LOCAL, "SYST:LOC" },
111 { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" },
6c0c9dd2 112 { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" },
4ee1e2f3
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113 { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" },
114 { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" },
115 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" },
116 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" },
6c0c9dd2
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117 { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" },
118 { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" },
4ee1e2f3
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119 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
120 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
121 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
122 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" },
123 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" },
562a3490 124 /* This is not a current limit mode. It is overcurrent protection. */
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125 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" },
126 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" },
91ef511d 127 ALL_ZERO
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128};
129
5281993e 130/* Chroma 62000 series DC source */
5281993e 131static const uint32_t chroma_62000_devopts[] = {
e91bb0a6 132 SR_CONF_CONTINUOUS,
5281993e
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133};
134
135static const uint32_t chroma_62000_devopts_cg[] = {
136 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
137 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
138 SR_CONF_VOLTAGE | SR_CONF_GET,
139 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
140 SR_CONF_CURRENT | SR_CONF_GET,
141 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
142 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
143};
144
5281993e
AG
145static const struct channel_group_spec chroma_62000_cg[] = {
146 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
147};
148
149static const struct scpi_command chroma_62000_cmd[] = {
150 { SCPI_CMD_REMOTE, ":CONF:REM ON" },
151 { SCPI_CMD_LOCAL, ":CONF:REM OFF" },
152 { SCPI_CMD_BEEPER, ":CONF:BEEP?" },
153 { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" },
154 { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" },
155 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
156 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
157 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" },
158 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
159 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" },
160 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
161 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
162 { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" },
163 { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" },
164 { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" },
165 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" },
166 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" },
167 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" },
168 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" },
91ef511d 169 ALL_ZERO
5281993e
AG
170};
171
9a5185c7
AG
172static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi,
173 struct sr_scpi_hw_info *hw_info,
174 struct channel_spec **channels, unsigned int *num_channels,
175 struct channel_group_spec **channel_groups,
176 unsigned int *num_channel_groups)
177{
6ed709fe 178 unsigned int volts, amps, watts;
9a5185c7
AG
179 struct channel_spec *channel;
180
181 (void)sdi;
182
6ed709fe
AJ
183 sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &amps);
184 watts *= 100;
185 sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts);
9a5185c7
AG
186
187 if (volts > 600) {
188 sr_err("Probed max voltage of %u V is out of spec.", volts);
189 return SR_ERR_BUG;
190 }
191
6ed709fe 192 if (amps > 120) {
9a5185c7
AG
193 sr_err("Probed max current of %u A is out of spec.", amps);
194 return SR_ERR_BUG;
195 }
196
6ed709fe
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197 if (watts > 5000) {
198 sr_err("Probed max power of %u W is out of spec.", watts);
199 return SR_ERR_BUG;
200 }
201
9a5185c7
AG
202 channel = g_malloc0(sizeof(struct channel_spec));
203 channel->name = "1";
6ed709fe 204 channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0;
bcee1299
UH
205 channel->voltage[1] = volts;
206 channel->current[1] = amps;
207 channel->power[1] = watts;
9a5185c7 208 channel->voltage[2] = channel->current[2] = 0.01;
6ed709fe
AJ
209 channel->voltage[3] = channel->voltage[4] = 3;
210 channel->current[3] = channel->current[4] = 4;
9a5185c7
AG
211 *channels = channel;
212 *num_channels = 1;
213
214 *channel_groups = g_malloc(sizeof(struct channel_group_spec));
215 **channel_groups = chroma_62000_cg[0];
216 *num_channel_groups = 1;
217
218 return SR_OK;
219}
220
d4eabea8 221/* Rigol DP800 series */
584560f1 222static const uint32_t rigol_dp800_devopts[] = {
e91bb0a6 223 SR_CONF_CONTINUOUS,
5827f61b 224 SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET,
d4eabea8
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225};
226
584560f1 227static const uint32_t rigol_dp800_devopts_cg[] = {
7a0b98b5 228 SR_CONF_REGULATION | SR_CONF_GET,
5827f61b
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229 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
230 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
231 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
232 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
233 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
234 SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
7a0b98b5
AJ
235 SR_CONF_VOLTAGE | SR_CONF_GET,
236 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
237 SR_CONF_CURRENT | SR_CONF_GET,
238 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
239 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
d4eabea8
BV
240};
241
8cb5affe 242static const struct channel_spec rigol_dp821a_ch[] = {
6ed709fe
AJ
243 { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
244 { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY },
cfcdf576
ML
245};
246
8cb5affe 247static const struct channel_spec rigol_dp831_ch[] = {
6ed709fe
AJ
248 { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY },
249 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
250 { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY },
d4eabea8
BV
251};
252
8cb5affe 253static const struct channel_spec rigol_dp832_ch[] = {
6ed709fe
AJ
254 { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
255 { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
256 { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY },
3222ee10
BV
257};
258
8cb5affe 259static const struct channel_group_spec rigol_dp820_cg[] = {
cfcdf576
ML
260 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
261 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
262};
263
8cb5affe 264static const struct channel_group_spec rigol_dp830_cg[] = {
d4eabea8
BV
265 { "1", CH_IDX(0), PPS_OVP | PPS_OCP },
266 { "2", CH_IDX(1), PPS_OVP | PPS_OCP },
267 { "3", CH_IDX(2), PPS_OVP | PPS_OCP },
268};
269
8cb5affe 270static const struct scpi_command rigol_dp800_cmd[] = {
60475cd7
BV
271 { SCPI_CMD_REMOTE, "SYST:REMOTE" },
272 { SCPI_CMD_LOCAL, "SYST:LOCAL" },
ee2860ee
BV
273 { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" },
274 { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" },
275 { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" },
60475cd7
BV
276 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
277 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
278 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
279 { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" },
280 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
281 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
282 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
283 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
284 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
285 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
286 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
287 { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" },
d4eabea8 288 { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" },
53a81803
BV
289 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" },
290 { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" },
60475cd7
BV
291 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" },
292 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" },
293 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" },
294 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" },
295 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" },
296 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" },
297 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" },
298 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" },
299 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" },
300 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" },
301 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" },
302 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" },
91ef511d 303 ALL_ZERO
d4eabea8
BV
304};
305
bfc86799 306/* HP 663xx series */
e76a3575
AG
307static const uint32_t hp_6630a_devopts[] = {
308 SR_CONF_CONTINUOUS,
7c517d02
FS
309};
310
311static const uint32_t hp_6630a_devopts_cg[] = {
e76a3575
AG
312 SR_CONF_ENABLED | SR_CONF_SET,
313 SR_CONF_VOLTAGE | SR_CONF_GET,
314 SR_CONF_CURRENT | SR_CONF_GET,
315 SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST,
316 SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST,
317 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET,
318 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET,
319};
320
584560f1 321static const uint32_t hp_6632b_devopts[] = {
e91bb0a6 322 SR_CONF_CONTINUOUS,
7c517d02
FS
323};
324
325static const uint32_t hp_6632b_devopts_cg[] = {
7a0b98b5
AJ
326 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
327 SR_CONF_VOLTAGE | SR_CONF_GET,
328 SR_CONF_CURRENT | SR_CONF_GET,
329 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
330 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
bc4a2a46
BV
331};
332
e76a3575 333static const struct channel_spec hp_6633a_ch[] = {
6ed709fe 334 { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
e76a3575
AG
335};
336
8cb5affe 337static const struct channel_spec hp_6632b_ch[] = {
6ed709fe 338 { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY },
bc4a2a46
BV
339};
340
e76a3575 341static const struct channel_group_spec hp_663xx_cg[] = {
bc4a2a46
BV
342 { "1", CH_IDX(0), 0 },
343};
344
e76a3575
AG
345static const struct scpi_command hp_6630a_cmd[] = {
346 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" },
347 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" },
348 { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" },
349 { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" },
350 { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" },
351 { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" },
352 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" },
353 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" },
354 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" },
355 ALL_ZERO
356};
357
8cb5affe 358static const struct scpi_command hp_6632b_cmd[] = {
bc4a2a46 359 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" },
53a81803
BV
360 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" },
361 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" },
bc4a2a46
BV
362 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
363 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
ca95e90f
BV
364 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
365 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
366 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
367 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
91ef511d 368 ALL_ZERO
bc4a2a46
BV
369};
370
c3eadb07 371/* Philips/Fluke PM2800 series */
9d9cf1c4 372static const uint32_t philips_pm2800_devopts[] = {
e91bb0a6 373 SR_CONF_CONTINUOUS,
9d9cf1c4
BV
374};
375
c3eadb07 376static const uint32_t philips_pm2800_devopts_cg[] = {
7a0b98b5
AJ
377 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
378 SR_CONF_VOLTAGE | SR_CONF_GET,
379 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
380 SR_CONF_CURRENT | SR_CONF_GET,
381 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
c3eadb07
BV
382 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
383 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
384 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
385 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET,
7a0b98b5 386 SR_CONF_REGULATION | SR_CONF_GET,
c3eadb07
BV
387};
388
389enum philips_pm2800_modules {
390 PM2800_MOD_30V_10A = 1,
391 PM2800_MOD_60V_5A,
392 PM2800_MOD_60V_10A,
393 PM2800_MOD_8V_15A,
394 PM2800_MOD_60V_2A,
395 PM2800_MOD_120V_1A,
396};
397
329733d9 398static const struct philips_pm2800_module_spec {
c3eadb07 399 /* Min, max, programming resolution. */
bcee1299
UH
400 double voltage[5];
401 double current[5];
402 double power[5];
c3eadb07
BV
403} philips_pm2800_module_specs[] = {
404 /* Autoranging modules. */
6ed709fe
AJ
405 [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } },
406 [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } },
407 [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } },
c3eadb07 408 /* Linear modules. */
6ed709fe
AJ
409 [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } },
410 [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } },
411 [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } },
c3eadb07
BV
412};
413
329733d9 414static const struct philips_pm2800_model {
c3eadb07
BV
415 unsigned int chassis;
416 unsigned int num_modules;
417 unsigned int set;
418 unsigned int modules[3];
419} philips_pm2800_matrix[] = {
420 /* Autoranging chassis. */
421 { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } },
422 { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } },
423 { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } },
424 { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } },
425 { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } },
426 { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } },
427 { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } },
428 { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } },
429 { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
430 { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } },
431 { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } },
432 /* Linear chassis. */
433 { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } },
434 { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } },
435 { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } },
436 { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } },
437 { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } },
438 { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } },
439 { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } },
440};
441
329733d9 442static const char *philips_pm2800_names[] = { "1", "2", "3" };
c3eadb07
BV
443
444static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi,
445 struct sr_scpi_hw_info *hw_info,
446 struct channel_spec **channels, unsigned int *num_channels,
447 struct channel_group_spec **channel_groups, unsigned int *num_channel_groups)
448{
329733d9
UH
449 const struct philips_pm2800_model *model;
450 const struct philips_pm2800_module_spec *spec;
c3eadb07
BV
451 unsigned int chassis, num_modules, set, module, m, i;
452
453 (void)sdi;
454
455 /*
456 * The model number as reported by *IDN? looks like e.g. PM2813/11,
457 * Where "PM28" is fixed, followed by the chassis code (1 = autoranging,
458 * 3 = linear series) and the number of modules: 1-3 for autoranging,
459 * 1-2 for linear.
460 * After the slash, the first digit denotes the module set. The
461 * digit after that denotes front (5) or rear (1) binding posts.
462 */
463 chassis = hw_info->model[4] - 0x30;
464 num_modules = hw_info->model[5] - 0x30;
465 set = hw_info->model[7] - 0x30;
466 for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) {
467 model = &philips_pm2800_matrix[m];
468 if (model->chassis == chassis && model->num_modules == num_modules
469 && model->set == set)
470 break;
471 }
472 if (m == ARRAY_SIZE(philips_pm2800_matrix)) {
473 sr_dbg("Model %s not found in matrix.", hw_info->model);
474 return SR_ERR;
475 }
476
477 sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : "");
478 *channels = g_malloc0(sizeof(struct channel_spec) * num_modules);
479 *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules);
480 for (i = 0; i < num_modules; i++) {
481 module = model->modules[i];
482 spec = &philips_pm2800_module_specs[module];
6ed709fe 483 sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1,
c3eadb07 484 spec->voltage[0], spec->voltage[1],
6ed709fe 485 spec->current[0], spec->current[1],
d9251a2c 486 spec->power[0], spec->power[1]);
329733d9 487 (*channels)[i].name = (char *)philips_pm2800_names[i];
bcee1299 488 memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15);
329733d9 489 (*channel_groups)[i].name = (char *)philips_pm2800_names[i];
c3eadb07
BV
490 (*channel_groups)[i].channel_index_mask = 1 << i;
491 (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP;
492 }
493 *num_channels = *num_channel_groups = num_modules;
494
495 return SR_OK;
496}
497
8cb5affe 498static const struct scpi_command philips_pm2800_cmd[] = {
c3eadb07
BV
499 { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" },
500 { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" },
501 { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" },
502 { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" },
503 { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" },
504 { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" },
505 { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" },
506 { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" },
507 { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" },
508 { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" },
509 { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" },
510 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" },
511 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" },
512 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" },
513 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" },
514 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" },
515 { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" },
516 { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" },
91ef511d 517 ALL_ZERO
c3eadb07
BV
518};
519
81eb36d6
MS
520static const uint32_t rs_hmc8043_devopts[] = {
521 SR_CONF_CONTINUOUS,
522};
523
524static const uint32_t rs_hmc8043_devopts_cg[] = {
525 SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
526 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET,
527 SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET,
528 SR_CONF_VOLTAGE | SR_CONF_GET,
529 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
530 SR_CONF_CURRENT | SR_CONF_GET,
531 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
532 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
533};
534
535static const struct channel_spec rs_hmc8043_ch[] = {
536 { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
537 { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
538 { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY },
539};
540
541static const struct channel_group_spec rs_hmc8043_cg[] = {
542 { "1", CH_IDX(0), PPS_OVP },
543 { "2", CH_IDX(1), PPS_OVP },
544 { "3", CH_IDX(2), PPS_OVP },
545};
546
547static const struct scpi_command rs_hmc8043_cmd[] = {
548 { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" },
549 { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" },
550 { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" },
551 { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" },
552 { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" },
553 { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" },
554 { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" },
555 { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" },
556 { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" },
557 { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" },
558 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" },
559 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" },
560 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" },
561 { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" },
562 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" },
563 { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" },
564 ALL_ZERO
565};
566
d4eabea8 567SR_PRIV const struct scpi_pps pps_profiles[] = {
6cc93128
AG
568 /* Agilent N5763A */
569 { "Agilent", "N5763A", 0,
570 ARRAY_AND_SIZE(agilent_n5700a_devopts),
571 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
572 ARRAY_AND_SIZE(agilent_n5763a_ch),
573 ARRAY_AND_SIZE(agilent_n5700a_cg),
574 agilent_n5700a_cmd,
575 .probe_channels = NULL,
576 },
ca314e06 577
5c9e56c9
AG
578 /* Agilent N5767A */
579 { "Agilent", "N5767A", 0,
580 ARRAY_AND_SIZE(agilent_n5700a_devopts),
581 ARRAY_AND_SIZE(agilent_n5700a_devopts_cg),
582 ARRAY_AND_SIZE(agilent_n5767a_ch),
6cc93128 583 ARRAY_AND_SIZE(agilent_n5700a_cg),
91ef511d 584 agilent_n5700a_cmd,
5c9e56c9
AG
585 .probe_channels = NULL,
586 },
ca314e06 587
4ee1e2f3
AG
588 /* Chroma 61604 */
589 { "Chroma", "61604", 0,
590 ARRAY_AND_SIZE(chroma_61604_devopts),
591 ARRAY_AND_SIZE(chroma_61604_devopts_cg),
592 ARRAY_AND_SIZE(chroma_61604_ch),
593 ARRAY_AND_SIZE(chroma_61604_cg),
91ef511d 594 chroma_61604_cmd,
4ee1e2f3
AG
595 .probe_channels = NULL,
596 },
ca314e06 597
5281993e 598 /* Chroma 62000 series */
9a5185c7 599 { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0,
5281993e
AG
600 ARRAY_AND_SIZE(chroma_62000_devopts),
601 ARRAY_AND_SIZE(chroma_62000_devopts_cg),
9a5185c7
AG
602 NULL, 0,
603 NULL, 0,
91ef511d 604 chroma_62000_cmd,
9a5185c7 605 .probe_channels = chroma_62000p_probe_channels,
5281993e 606 },
ca314e06 607
e76a3575
AG
608 /* HP 6633A */
609 { "HP", "6633A", 0,
610 ARRAY_AND_SIZE(hp_6630a_devopts),
7c517d02 611 ARRAY_AND_SIZE(hp_6630a_devopts_cg),
e76a3575
AG
612 ARRAY_AND_SIZE(hp_6633a_ch),
613 ARRAY_AND_SIZE(hp_663xx_cg),
614 hp_6630a_cmd,
615 .probe_channels = NULL,
616 },
617
bc4a2a46
BV
618 /* HP 6632B */
619 { "HP", "6632B", 0,
620 ARRAY_AND_SIZE(hp_6632b_devopts),
7c517d02 621 ARRAY_AND_SIZE(hp_6632b_devopts_cg),
bc4a2a46 622 ARRAY_AND_SIZE(hp_6632b_ch),
e76a3575 623 ARRAY_AND_SIZE(hp_663xx_cg),
91ef511d 624 hp_6632b_cmd,
c3eadb07 625 .probe_channels = NULL,
bc4a2a46
BV
626 },
627
d4eabea8 628 /* Rigol DP800 series */
cfcdf576
ML
629 { "Rigol", "^DP821A$", PPS_OTP,
630 ARRAY_AND_SIZE(rigol_dp800_devopts),
631 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
632 ARRAY_AND_SIZE(rigol_dp821a_ch),
633 ARRAY_AND_SIZE(rigol_dp820_cg),
91ef511d 634 rigol_dp800_cmd,
cfcdf576
ML
635 .probe_channels = NULL,
636 },
3222ee10
BV
637 { "Rigol", "^DP831A$", PPS_OTP,
638 ARRAY_AND_SIZE(rigol_dp800_devopts),
639 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
640 ARRAY_AND_SIZE(rigol_dp831_ch),
cfcdf576 641 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 642 rigol_dp800_cmd,
c3eadb07 643 .probe_channels = NULL,
3222ee10
BV
644 },
645 { "Rigol", "^(DP832|DP832A)$", PPS_OTP,
646 ARRAY_AND_SIZE(rigol_dp800_devopts),
647 ARRAY_AND_SIZE(rigol_dp800_devopts_cg),
648 ARRAY_AND_SIZE(rigol_dp832_ch),
cfcdf576 649 ARRAY_AND_SIZE(rigol_dp830_cg),
91ef511d 650 rigol_dp800_cmd,
c3eadb07
BV
651 .probe_channels = NULL,
652 },
653
654 /* Philips/Fluke PM2800 series */
655 { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0,
9d9cf1c4 656 ARRAY_AND_SIZE(philips_pm2800_devopts),
c3eadb07
BV
657 ARRAY_AND_SIZE(philips_pm2800_devopts_cg),
658 NULL, 0,
659 NULL, 0,
91ef511d 660 philips_pm2800_cmd,
c3eadb07 661 philips_pm2800_probe_channels,
d4eabea8 662 },
81eb36d6
MS
663
664 /* Rohde & Schwarz HMC8043 */
665 { "Rohde&Schwarz", "HMC8043", 0,
666 ARRAY_AND_SIZE(rs_hmc8043_devopts),
667 ARRAY_AND_SIZE(rs_hmc8043_devopts_cg),
668 ARRAY_AND_SIZE(rs_hmc8043_ch),
669 ARRAY_AND_SIZE(rs_hmc8043_cg),
670 rs_hmc8043_cmd,
671 .probe_channels = NULL,
672 },
d4eabea8 673};
d4eabea8 674
1beccaed 675SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles);