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d4eabea8 BV |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> | |
4ee1e2f3 AG |
5 | * Copyright (C) 2015 Google, Inc. |
6 | * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.) | |
7e381bfc | 7 | * Copyright (C) 2017 Frank Stettner <frank-stettner@gmx.net> |
d4eabea8 BV |
8 | * |
9 | * This program is free software: you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation, either version 3 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
21 | */ | |
22 | ||
6ec6c43b | 23 | #include <config.h> |
22c18b03 | 24 | #include <string.h> |
ba464a12 | 25 | #include <strings.h> |
d4eabea8 BV |
26 | #include "protocol.h" |
27 | ||
28 | #define CH_IDX(x) (1 << x) | |
6ed709fe | 29 | #define FREQ_DC_ONLY {0, 0, 0, 0, 0} |
49a468ed FS |
30 | #define NO_OVP_LIMITS {0, 0, 0, 0, 0} |
31 | #define NO_OCP_LIMITS {0, 0, 0, 0, 0} | |
d4eabea8 | 32 | |
5c9e56c9 AG |
33 | /* Agilent/Keysight N5700A series */ |
34 | static const uint32_t agilent_n5700a_devopts[] = { | |
e91bb0a6 | 35 | SR_CONF_CONTINUOUS, |
88e4daa9 ML |
36 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
37 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
5c9e56c9 AG |
38 | }; |
39 | ||
40 | static const uint32_t agilent_n5700a_devopts_cg[] = { | |
41 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
42 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
43 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
da005885 UH |
44 | SR_CONF_VOLTAGE | SR_CONF_GET, |
45 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
46 | SR_CONF_CURRENT | SR_CONF_GET, | |
47 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
5c9e56c9 AG |
48 | }; |
49 | ||
6cc93128 AG |
50 | static const struct channel_group_spec agilent_n5700a_cg[] = { |
51 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, | |
52 | }; | |
53 | ||
8cb5affe | 54 | static const struct channel_spec agilent_n5767a_ch[] = { |
49a468ed | 55 | { "1", { 0, 60, 0.0072, 3, 4 }, { 0, 25, 0.003, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
5c9e56c9 AG |
56 | }; |
57 | ||
6cc93128 | 58 | static const struct channel_spec agilent_n5763a_ch[] = { |
49a468ed | 59 | { "1", { 0, 12.5, 0.0015, 3, 4 }, { 0, 120, 0.0144, 3, 4 }, { 0, 1500 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
5c9e56c9 AG |
60 | }; |
61 | ||
62 | /* | |
63 | * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit | |
562a3490 | 64 | * in STAT:QUES:EVEN?, but this is not implemented. |
5c9e56c9 | 65 | */ |
8cb5affe | 66 | static const struct scpi_command agilent_n5700a_cmd[] = { |
5c9e56c9 AG |
67 | { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" }, |
68 | { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" }, | |
69 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
70 | { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, | |
71 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
72 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
73 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
74 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
75 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" }, | |
76 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
77 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
78 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" }, | |
79 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" }, | |
80 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" }, | |
81 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"}, | |
82 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"}, | |
562a3490 | 83 | /* Current limit (CC mode) and OCP are set using the same command. */ |
5c9e56c9 AG |
84 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" }, |
85 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" }, | |
91ef511d | 86 | ALL_ZERO |
5c9e56c9 AG |
87 | }; |
88 | ||
4ee1e2f3 AG |
89 | /* Chroma 61600 series AC source */ |
90 | static const uint32_t chroma_61604_devopts[] = { | |
e91bb0a6 | 91 | SR_CONF_CONTINUOUS, |
88e4daa9 ML |
92 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
93 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
4ee1e2f3 AG |
94 | }; |
95 | ||
96 | static const uint32_t chroma_61604_devopts_cg[] = { | |
97 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
98 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
da005885 UH |
99 | SR_CONF_VOLTAGE | SR_CONF_GET, |
100 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
6c0c9dd2 AG |
101 | SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET, |
102 | SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
da005885 UH |
103 | SR_CONF_CURRENT | SR_CONF_GET, |
104 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
4ee1e2f3 AG |
105 | }; |
106 | ||
8cb5affe | 107 | static const struct channel_spec chroma_61604_ch[] = { |
49a468ed | 108 | { "1", { 0, 300, 0.1, 1, 1 }, { 0, 16, 0.1, 2, 2 }, { 0, 2000, 0, 1, 1 }, { 1.0, 1000.0, 0.01 }, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
4ee1e2f3 AG |
109 | }; |
110 | ||
8cb5affe | 111 | static const struct channel_group_spec chroma_61604_cg[] = { |
4ee1e2f3 AG |
112 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
113 | }; | |
114 | ||
8cb5affe | 115 | static const struct scpi_command chroma_61604_cmd[] = { |
4ee1e2f3 AG |
116 | { SCPI_CMD_REMOTE, "SYST:REM" }, |
117 | { SCPI_CMD_LOCAL, "SYST:LOC" }, | |
118 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" }, | |
6c0c9dd2 | 119 | { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" }, |
4ee1e2f3 AG |
120 | { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" }, |
121 | { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" }, | |
122 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" }, | |
123 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" }, | |
6c0c9dd2 AG |
124 | { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" }, |
125 | { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" }, | |
4ee1e2f3 AG |
126 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, |
127 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
128 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
129 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" }, | |
130 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" }, | |
562a3490 | 131 | /* This is not a current limit mode. It is overcurrent protection. */ |
4ee1e2f3 AG |
132 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" }, |
133 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" }, | |
91ef511d | 134 | ALL_ZERO |
4ee1e2f3 AG |
135 | }; |
136 | ||
5281993e | 137 | /* Chroma 62000 series DC source */ |
5281993e | 138 | static const uint32_t chroma_62000_devopts[] = { |
e91bb0a6 | 139 | SR_CONF_CONTINUOUS, |
88e4daa9 ML |
140 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
141 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
5281993e AG |
142 | }; |
143 | ||
144 | static const uint32_t chroma_62000_devopts_cg[] = { | |
145 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
146 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
147 | SR_CONF_VOLTAGE | SR_CONF_GET, | |
148 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
149 | SR_CONF_CURRENT | SR_CONF_GET, | |
150 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
151 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
152 | }; | |
153 | ||
5281993e AG |
154 | static const struct channel_group_spec chroma_62000_cg[] = { |
155 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, | |
156 | }; | |
157 | ||
158 | static const struct scpi_command chroma_62000_cmd[] = { | |
159 | { SCPI_CMD_REMOTE, ":CONF:REM ON" }, | |
160 | { SCPI_CMD_LOCAL, ":CONF:REM OFF" }, | |
161 | { SCPI_CMD_BEEPER, ":CONF:BEEP?" }, | |
162 | { SCPI_CMD_BEEPER_ENABLE, ":CONF:BEEP ON" }, | |
163 | { SCPI_CMD_BEEPER_DISABLE, ":CONF:BEEP OFF" }, | |
164 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
165 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
166 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POW?" }, | |
167 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
168 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.2f" }, | |
169 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
170 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
171 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":CONF:OUTP?" }, | |
172 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":CONF:OUTP ON" }, | |
173 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":CONF:OUTP OFF" }, | |
174 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH?" }, | |
175 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:HIGH %.6f" }, | |
176 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH?" }, | |
177 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:PROT:HIGH %.6f" }, | |
91ef511d | 178 | ALL_ZERO |
5281993e AG |
179 | }; |
180 | ||
9a5185c7 AG |
181 | static int chroma_62000p_probe_channels(struct sr_dev_inst *sdi, |
182 | struct sr_scpi_hw_info *hw_info, | |
183 | struct channel_spec **channels, unsigned int *num_channels, | |
184 | struct channel_group_spec **channel_groups, | |
185 | unsigned int *num_channel_groups) | |
186 | { | |
6ed709fe | 187 | unsigned int volts, amps, watts; |
9a5185c7 AG |
188 | struct channel_spec *channel; |
189 | ||
190 | (void)sdi; | |
191 | ||
6ed709fe AJ |
192 | sscanf(hw_info->model, "620%uP-%u-%u", &watts, &volts, &s); |
193 | watts *= 100; | |
194 | sr_dbg("Found device rated for %d V, %d A and %d W", volts, amps, watts); | |
9a5185c7 AG |
195 | |
196 | if (volts > 600) { | |
197 | sr_err("Probed max voltage of %u V is out of spec.", volts); | |
198 | return SR_ERR_BUG; | |
199 | } | |
200 | ||
6ed709fe | 201 | if (amps > 120) { |
9a5185c7 AG |
202 | sr_err("Probed max current of %u A is out of spec.", amps); |
203 | return SR_ERR_BUG; | |
204 | } | |
205 | ||
6ed709fe AJ |
206 | if (watts > 5000) { |
207 | sr_err("Probed max power of %u W is out of spec.", watts); | |
208 | return SR_ERR_BUG; | |
209 | } | |
210 | ||
9a5185c7 AG |
211 | channel = g_malloc0(sizeof(struct channel_spec)); |
212 | channel->name = "1"; | |
6ed709fe | 213 | channel->voltage[0] = channel->current[0] = channel->power[0] = 0.0; |
bcee1299 UH |
214 | channel->voltage[1] = volts; |
215 | channel->current[1] = amps; | |
216 | channel->power[1] = watts; | |
9a5185c7 | 217 | channel->voltage[2] = channel->current[2] = 0.01; |
6ed709fe AJ |
218 | channel->voltage[3] = channel->voltage[4] = 3; |
219 | channel->current[3] = channel->current[4] = 4; | |
9a5185c7 AG |
220 | *channels = channel; |
221 | *num_channels = 1; | |
222 | ||
223 | *channel_groups = g_malloc(sizeof(struct channel_group_spec)); | |
224 | **channel_groups = chroma_62000_cg[0]; | |
225 | *num_channel_groups = 1; | |
226 | ||
227 | return SR_OK; | |
228 | } | |
229 | ||
319fe9ce UH |
230 | /* Rigol DP700 series */ |
231 | static const uint32_t rigol_dp700_devopts[] = { | |
232 | SR_CONF_CONTINUOUS, | |
88e4daa9 ML |
233 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
234 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
319fe9ce UH |
235 | }; |
236 | ||
237 | static const uint32_t rigol_dp700_devopts_cg[] = { | |
238 | SR_CONF_REGULATION | SR_CONF_GET, | |
239 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
240 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, | |
d828b05e | 241 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
319fe9ce UH |
242 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, |
243 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, | |
d828b05e | 244 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
319fe9ce UH |
245 | SR_CONF_VOLTAGE | SR_CONF_GET, |
246 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
247 | SR_CONF_CURRENT | SR_CONF_GET, | |
248 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
249 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
250 | }; | |
251 | ||
252 | static const struct channel_spec rigol_dp711_ch[] = { | |
d828b05e | 253 | { "1", { 0, 30, 0.01, 3, 3 }, { 0, 5, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 33, 0.01}, { 0.01, 5.5, 0.01 } }, |
319fe9ce UH |
254 | }; |
255 | ||
256 | static const struct channel_spec rigol_dp712_ch[] = { | |
d828b05e | 257 | { "1", { 0, 50, 0.01, 3, 3 }, { 0, 3, 0.01, 3, 3 }, { 0, 150, 0, 3, 3 }, FREQ_DC_ONLY, { 0.01, 55, 0.01}, { 0.01, 3.3, 0.01 } }, |
319fe9ce UH |
258 | }; |
259 | ||
260 | static const struct channel_group_spec rigol_dp700_cg[] = { | |
261 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, | |
262 | }; | |
263 | ||
264 | /* Same as the DP800 series, except for the missing :SYST:OTP* commands. */ | |
265 | static const struct scpi_command rigol_dp700_cmd[] = { | |
266 | { SCPI_CMD_REMOTE, "SYST:REMOTE" }, | |
267 | { SCPI_CMD_LOCAL, "SYST:LOCAL" }, | |
268 | { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" }, | |
269 | { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" }, | |
270 | { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" }, | |
271 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, | |
272 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
273 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
274 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" }, | |
275 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
276 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
277 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
278 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
279 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, | |
280 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
281 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
282 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" }, | |
283 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" }, | |
284 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" }, | |
285 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" }, | |
286 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" }, | |
287 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" }, | |
288 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" }, | |
289 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" }, | |
290 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" }, | |
291 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" }, | |
292 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" }, | |
293 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" }, | |
294 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" }, | |
295 | ALL_ZERO | |
296 | }; | |
297 | ||
d4eabea8 | 298 | /* Rigol DP800 series */ |
584560f1 | 299 | static const uint32_t rigol_dp800_devopts[] = { |
e91bb0a6 | 300 | SR_CONF_CONTINUOUS, |
5827f61b | 301 | SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET, |
88e4daa9 ML |
302 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
303 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
d4eabea8 BV |
304 | }; |
305 | ||
584560f1 | 306 | static const uint32_t rigol_dp800_devopts_cg[] = { |
7a0b98b5 | 307 | SR_CONF_REGULATION | SR_CONF_GET, |
5827f61b BV |
308 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, |
309 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, | |
310 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
311 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
312 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, | |
313 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
7a0b98b5 AJ |
314 | SR_CONF_VOLTAGE | SR_CONF_GET, |
315 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
316 | SR_CONF_CURRENT | SR_CONF_GET, | |
317 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
318 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
d4eabea8 BV |
319 | }; |
320 | ||
8cb5affe | 321 | static const struct channel_spec rigol_dp821a_ch[] = { |
49a468ed FS |
322 | { "1", { 0, 60, 0.001, 3, 3 }, { 0, 1, 0.0001, 4, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
323 | { "2", { 0, 8, 0.001, 3, 3 }, { 0, 10, 0.001, 3, 3 }, { 0, 80, 0, 3, 3 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
cfcdf576 ML |
324 | }; |
325 | ||
8cb5affe | 326 | static const struct channel_spec rigol_dp831_ch[] = { |
49a468ed FS |
327 | { "1", { 0, 8, 0.001, 3, 4 }, { 0, 5, 0.0003, 3, 4 }, { 0, 40, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
328 | { "2", { 0, 30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
329 | { "3", { 0, -30, 0.001, 3, 4 }, { 0, 2, 0.0001, 3, 4 }, { 0, 60, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
d4eabea8 BV |
330 | }; |
331 | ||
8cb5affe | 332 | static const struct channel_spec rigol_dp832_ch[] = { |
49a468ed FS |
333 | { "1", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
334 | { "2", { 0, 30, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
335 | { "3", { 0, 5, 0.001, 3, 4 }, { 0, 3, 0.001, 3, 4 }, { 0, 90, 0, 3, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
3222ee10 BV |
336 | }; |
337 | ||
8cb5affe | 338 | static const struct channel_group_spec rigol_dp820_cg[] = { |
cfcdf576 ML |
339 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
340 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
341 | }; | |
342 | ||
8cb5affe | 343 | static const struct channel_group_spec rigol_dp830_cg[] = { |
d4eabea8 BV |
344 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
345 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
346 | { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, | |
347 | }; | |
348 | ||
8cb5affe | 349 | static const struct scpi_command rigol_dp800_cmd[] = { |
60475cd7 BV |
350 | { SCPI_CMD_REMOTE, "SYST:REMOTE" }, |
351 | { SCPI_CMD_LOCAL, "SYST:LOCAL" }, | |
ee2860ee BV |
352 | { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" }, |
353 | { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" }, | |
354 | { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" }, | |
60475cd7 BV |
355 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, |
356 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
357 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
358 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" }, | |
359 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
360 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
361 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
362 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
363 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, | |
364 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
365 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
366 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" }, | |
d4eabea8 | 367 | { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, |
53a81803 BV |
368 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" }, |
369 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" }, | |
60475cd7 BV |
370 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" }, |
371 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" }, | |
372 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" }, | |
373 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" }, | |
374 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" }, | |
375 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" }, | |
376 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" }, | |
377 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" }, | |
378 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" }, | |
379 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" }, | |
380 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" }, | |
381 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" }, | |
91ef511d | 382 | ALL_ZERO |
d4eabea8 BV |
383 | }; |
384 | ||
bfc86799 | 385 | /* HP 663xx series */ |
e76a3575 AG |
386 | static const uint32_t hp_6630a_devopts[] = { |
387 | SR_CONF_CONTINUOUS, | |
88e4daa9 ML |
388 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
389 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
7c517d02 FS |
390 | }; |
391 | ||
392 | static const uint32_t hp_6630a_devopts_cg[] = { | |
e76a3575 AG |
393 | SR_CONF_ENABLED | SR_CONF_SET, |
394 | SR_CONF_VOLTAGE | SR_CONF_GET, | |
395 | SR_CONF_CURRENT | SR_CONF_GET, | |
396 | SR_CONF_VOLTAGE_TARGET | SR_CONF_SET | SR_CONF_LIST, | |
397 | SR_CONF_CURRENT_LIMIT | SR_CONF_SET | SR_CONF_LIST, | |
49a468ed | 398 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_SET | SR_CONF_LIST, |
e76a3575 AG |
399 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_SET, |
400 | }; | |
401 | ||
a61c8cce | 402 | static const uint32_t hp_6630b_devopts[] = { |
e91bb0a6 | 403 | SR_CONF_CONTINUOUS, |
88e4daa9 ML |
404 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
405 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
7c517d02 FS |
406 | }; |
407 | ||
a61c8cce | 408 | static const uint32_t hp_6630b_devopts_cg[] = { |
7a0b98b5 AJ |
409 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, |
410 | SR_CONF_VOLTAGE | SR_CONF_GET, | |
411 | SR_CONF_CURRENT | SR_CONF_GET, | |
412 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
413 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
49a468ed | 414 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
7e381bfc | 415 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, |
bc4a2a46 BV |
416 | }; |
417 | ||
e76a3575 | 418 | static const struct channel_spec hp_6633a_ch[] = { |
49a468ed | 419 | { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.0005, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS }, |
e76a3575 AG |
420 | }; |
421 | ||
a61c8cce | 422 | static const struct channel_spec hp_6631b_ch[] = { |
49a468ed | 423 | { "1", { 0, 8.19, 0.002, 3, 4 }, { 0, 10.237, 0.00263, 4, 5 }, { 0, 83.84103 }, FREQ_DC_ONLY, { 0, 12, 0.06 }, NO_OCP_LIMITS }, |
a61c8cce FS |
424 | }; |
425 | ||
8cb5affe | 426 | static const struct channel_spec hp_6632b_ch[] = { |
49a468ed | 427 | { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, |
bc4a2a46 BV |
428 | }; |
429 | ||
a61c8cce | 430 | static const struct channel_spec hp_66332a_ch[] = { |
49a468ed | 431 | { "1", { 0, 20.475, 0.005, 3, 4 }, { 0, 5.1188, 0.00132, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 22, 0.1 }, NO_OCP_LIMITS }, |
a61c8cce FS |
432 | }; |
433 | ||
434 | static const struct channel_spec hp_6633b_ch[] = { | |
49a468ed | 435 | { "1", { 0, 51.188, 0.0125, 3, 4 }, { 0, 2.0475, 0.000526, 4, 5 }, { 0, 104.80743 }, FREQ_DC_ONLY, { 0, 55, 0.25 }, NO_OCP_LIMITS }, |
a61c8cce FS |
436 | }; |
437 | ||
438 | static const struct channel_spec hp_6634b_ch[] = { | |
49a468ed | 439 | { "1", { 0, 102.38, 0.025, 3, 4 }, { 0, 1.0238, 0.000263, 4, 5 }, { 0, 104.81664 }, FREQ_DC_ONLY, { 0, 110, 0.5 }, NO_OCP_LIMITS }, |
a61c8cce FS |
440 | }; |
441 | ||
e76a3575 | 442 | static const struct channel_group_spec hp_663xx_cg[] = { |
bc4a2a46 BV |
443 | { "1", CH_IDX(0), 0 }, |
444 | }; | |
445 | ||
e76a3575 AG |
446 | static const struct scpi_command hp_6630a_cmd[] = { |
447 | { SCPI_CMD_SET_OUTPUT_ENABLE, "OUT 1" }, | |
448 | { SCPI_CMD_SET_OUTPUT_DISABLE, "OUT 0" }, | |
449 | { SCPI_CMD_GET_MEAS_VOLTAGE, "VOUT?" }, | |
450 | { SCPI_CMD_GET_MEAS_CURRENT, "IOUT?" }, | |
451 | { SCPI_CMD_SET_VOLTAGE_TARGET, "VSET %.4f" }, | |
452 | { SCPI_CMD_SET_CURRENT_LIMIT, "ISET %.4f" }, | |
453 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, "OCP 1" }, | |
454 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, "OCP 0" }, | |
455 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "OVSET %.4f" }, | |
456 | ALL_ZERO | |
457 | }; | |
458 | ||
a61c8cce | 459 | static const struct scpi_command hp_6630b_cmd[] = { |
7e381bfc FS |
460 | { SCPI_CMD_REMOTE, "SYST:REM" }, |
461 | { SCPI_CMD_LOCAL, "SYST:LOC" }, | |
bc4a2a46 | 462 | { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" }, |
53a81803 BV |
463 | { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" }, |
464 | { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" }, | |
bc4a2a46 BV |
465 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, |
466 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
ca95e90f BV |
467 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, |
468 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
469 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
470 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
7e381bfc FS |
471 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" }, |
472 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT 1" }, | |
473 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT 0" }, | |
474 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" }, | |
475 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" }, | |
91ef511d | 476 | ALL_ZERO |
bc4a2a46 BV |
477 | }; |
478 | ||
c3eadb07 | 479 | /* Philips/Fluke PM2800 series */ |
9d9cf1c4 | 480 | static const uint32_t philips_pm2800_devopts[] = { |
e91bb0a6 | 481 | SR_CONF_CONTINUOUS, |
88e4daa9 ML |
482 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
483 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
9d9cf1c4 BV |
484 | }; |
485 | ||
c3eadb07 | 486 | static const uint32_t philips_pm2800_devopts_cg[] = { |
7a0b98b5 AJ |
487 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, |
488 | SR_CONF_VOLTAGE | SR_CONF_GET, | |
489 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
490 | SR_CONF_CURRENT | SR_CONF_GET, | |
491 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
c3eadb07 BV |
492 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, |
493 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
494 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
495 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, | |
7a0b98b5 | 496 | SR_CONF_REGULATION | SR_CONF_GET, |
c3eadb07 BV |
497 | }; |
498 | ||
499 | enum philips_pm2800_modules { | |
500 | PM2800_MOD_30V_10A = 1, | |
501 | PM2800_MOD_60V_5A, | |
502 | PM2800_MOD_60V_10A, | |
503 | PM2800_MOD_8V_15A, | |
504 | PM2800_MOD_60V_2A, | |
505 | PM2800_MOD_120V_1A, | |
506 | }; | |
507 | ||
329733d9 | 508 | static const struct philips_pm2800_module_spec { |
c3eadb07 | 509 | /* Min, max, programming resolution. */ |
bcee1299 UH |
510 | double voltage[5]; |
511 | double current[5]; | |
512 | double power[5]; | |
c3eadb07 BV |
513 | } philips_pm2800_module_specs[] = { |
514 | /* Autoranging modules. */ | |
6ed709fe AJ |
515 | [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075, 2, 4 }, { 0, 10, 0.0025, 2, 4 }, { 0, 60 } }, |
516 | [PM2800_MOD_60V_5A] = { { 0, 60, 0.015, 2, 3 }, { 0, 5, 0.00125, 2, 5 }, { 0, 60 } }, | |
517 | [PM2800_MOD_60V_10A] = { { 0, 60, 0.015, 2, 3 }, { 0, 10, 0.0025, 2, 5 }, { 0, 120 } }, | |
c3eadb07 | 518 | /* Linear modules. */ |
6ed709fe AJ |
519 | [PM2800_MOD_8V_15A] = { { 0, 8, 0.002, 3, 3 }, { -15, 15, 0.00375, 3, 5 }, { 0, 120 } }, |
520 | [PM2800_MOD_60V_2A] = { { 0, 60, 0.015, 2, 3 }, { -2, 2, 0.0005, 3, 4 }, { 0, 120 } }, | |
521 | [PM2800_MOD_120V_1A] = { { 0, 120, 0.030, 2, 2 }, { -1, 1, 0.00025, 3, 5 }, { 0, 120 } }, | |
c3eadb07 BV |
522 | }; |
523 | ||
329733d9 | 524 | static const struct philips_pm2800_model { |
c3eadb07 BV |
525 | unsigned int chassis; |
526 | unsigned int num_modules; | |
527 | unsigned int set; | |
528 | unsigned int modules[3]; | |
529 | } philips_pm2800_matrix[] = { | |
530 | /* Autoranging chassis. */ | |
531 | { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } }, | |
532 | { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } }, | |
533 | { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } }, | |
534 | { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } }, | |
535 | { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } }, | |
536 | { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } }, | |
537 | { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } }, | |
538 | { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } }, | |
539 | { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } }, | |
540 | { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } }, | |
541 | { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } }, | |
542 | /* Linear chassis. */ | |
543 | { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } }, | |
544 | { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } }, | |
545 | { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } }, | |
546 | { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } }, | |
547 | { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } }, | |
548 | { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } }, | |
549 | { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } }, | |
550 | }; | |
551 | ||
329733d9 | 552 | static const char *philips_pm2800_names[] = { "1", "2", "3" }; |
c3eadb07 BV |
553 | |
554 | static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi, | |
555 | struct sr_scpi_hw_info *hw_info, | |
556 | struct channel_spec **channels, unsigned int *num_channels, | |
557 | struct channel_group_spec **channel_groups, unsigned int *num_channel_groups) | |
558 | { | |
329733d9 UH |
559 | const struct philips_pm2800_model *model; |
560 | const struct philips_pm2800_module_spec *spec; | |
c3eadb07 BV |
561 | unsigned int chassis, num_modules, set, module, m, i; |
562 | ||
563 | (void)sdi; | |
564 | ||
565 | /* | |
566 | * The model number as reported by *IDN? looks like e.g. PM2813/11, | |
567 | * Where "PM28" is fixed, followed by the chassis code (1 = autoranging, | |
568 | * 3 = linear series) and the number of modules: 1-3 for autoranging, | |
569 | * 1-2 for linear. | |
570 | * After the slash, the first digit denotes the module set. The | |
571 | * digit after that denotes front (5) or rear (1) binding posts. | |
572 | */ | |
573 | chassis = hw_info->model[4] - 0x30; | |
574 | num_modules = hw_info->model[5] - 0x30; | |
575 | set = hw_info->model[7] - 0x30; | |
576 | for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) { | |
577 | model = &philips_pm2800_matrix[m]; | |
578 | if (model->chassis == chassis && model->num_modules == num_modules | |
579 | && model->set == set) | |
580 | break; | |
581 | } | |
582 | if (m == ARRAY_SIZE(philips_pm2800_matrix)) { | |
583 | sr_dbg("Model %s not found in matrix.", hw_info->model); | |
584 | return SR_ERR; | |
585 | } | |
586 | ||
587 | sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : ""); | |
588 | *channels = g_malloc0(sizeof(struct channel_spec) * num_modules); | |
589 | *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules); | |
590 | for (i = 0; i < num_modules; i++) { | |
591 | module = model->modules[i]; | |
592 | spec = &philips_pm2800_module_specs[module]; | |
6ed709fe | 593 | sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA, %.0f - %.0fW", i + 1, |
c3eadb07 | 594 | spec->voltage[0], spec->voltage[1], |
6ed709fe | 595 | spec->current[0], spec->current[1], |
d9251a2c | 596 | spec->power[0], spec->power[1]); |
329733d9 | 597 | (*channels)[i].name = (char *)philips_pm2800_names[i]; |
bcee1299 | 598 | memcpy(&((*channels)[i].voltage), spec, sizeof(double) * 15); |
329733d9 | 599 | (*channel_groups)[i].name = (char *)philips_pm2800_names[i]; |
c3eadb07 BV |
600 | (*channel_groups)[i].channel_index_mask = 1 << i; |
601 | (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP; | |
602 | } | |
603 | *num_channels = *num_channel_groups = num_modules; | |
604 | ||
605 | return SR_OK; | |
606 | } | |
607 | ||
8cb5affe | 608 | static const struct scpi_command philips_pm2800_cmd[] = { |
c3eadb07 BV |
609 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, |
610 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
611 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
612 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
613 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
614 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
615 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
616 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, | |
617 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
618 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
619 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" }, | |
620 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" }, | |
621 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" }, | |
622 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" }, | |
623 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" }, | |
624 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" }, | |
625 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" }, | |
626 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" }, | |
91ef511d | 627 | ALL_ZERO |
c3eadb07 BV |
628 | }; |
629 | ||
81eb36d6 MS |
630 | static const uint32_t rs_hmc8043_devopts[] = { |
631 | SR_CONF_CONTINUOUS, | |
88e4daa9 ML |
632 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
633 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
81eb36d6 MS |
634 | }; |
635 | ||
636 | static const uint32_t rs_hmc8043_devopts_cg[] = { | |
637 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
638 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, | |
639 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
640 | SR_CONF_VOLTAGE | SR_CONF_GET, | |
641 | SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
642 | SR_CONF_CURRENT | SR_CONF_GET, | |
643 | SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
644 | SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
645 | }; | |
646 | ||
647 | static const struct channel_spec rs_hmc8043_ch[] = { | |
49a468ed FS |
648 | { "1", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, |
649 | { "2", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
650 | { "3", { 0, 32.050, 0.001, 3, 4 }, { 0.001, 3, 0.001, 3, 4 }, { 0, 0, 0, 0, 4 }, FREQ_DC_ONLY, NO_OVP_LIMITS, NO_OCP_LIMITS }, | |
81eb36d6 MS |
651 | }; |
652 | ||
653 | static const struct channel_group_spec rs_hmc8043_cg[] = { | |
654 | { "1", CH_IDX(0), PPS_OVP }, | |
655 | { "2", CH_IDX(1), PPS_OVP }, | |
656 | { "3", CH_IDX(2), PPS_OVP }, | |
657 | }; | |
658 | ||
659 | static const struct scpi_command rs_hmc8043_cmd[] = { | |
660 | { SCPI_CMD_SELECT_CHANNEL, "INST:NSEL %s" }, | |
661 | { SCPI_CMD_GET_MEAS_VOLTAGE, "MEAS:VOLT?" }, | |
662 | { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, | |
663 | { SCPI_CMD_GET_VOLTAGE_TARGET, "VOLT?" }, | |
664 | { SCPI_CMD_SET_VOLTAGE_TARGET, "VOLT %.6f" }, | |
665 | { SCPI_CMD_GET_CURRENT_LIMIT, "CURR?" }, | |
666 | { SCPI_CMD_SET_CURRENT_LIMIT, "CURR %.6f" }, | |
667 | { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP?" }, | |
668 | { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP ON" }, | |
669 | { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP OFF" }, | |
670 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, "VOLT:PROT:TRIP?" }, | |
671 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV?" }, | |
672 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, "VOLT:PROT:LEV %.6f" }, | |
673 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, "VOLT:PROT:STAT?" }, | |
674 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, "VOLT:PROT:STAT ON" }, | |
675 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, "VOLT:PROT:STAT OFF" }, | |
676 | ALL_ZERO | |
677 | }; | |
678 | ||
d4eabea8 | 679 | SR_PRIV const struct scpi_pps pps_profiles[] = { |
6cc93128 AG |
680 | /* Agilent N5763A */ |
681 | { "Agilent", "N5763A", 0, | |
682 | ARRAY_AND_SIZE(agilent_n5700a_devopts), | |
683 | ARRAY_AND_SIZE(agilent_n5700a_devopts_cg), | |
684 | ARRAY_AND_SIZE(agilent_n5763a_ch), | |
685 | ARRAY_AND_SIZE(agilent_n5700a_cg), | |
686 | agilent_n5700a_cmd, | |
687 | .probe_channels = NULL, | |
688 | }, | |
ca314e06 | 689 | |
5c9e56c9 AG |
690 | /* Agilent N5767A */ |
691 | { "Agilent", "N5767A", 0, | |
692 | ARRAY_AND_SIZE(agilent_n5700a_devopts), | |
693 | ARRAY_AND_SIZE(agilent_n5700a_devopts_cg), | |
694 | ARRAY_AND_SIZE(agilent_n5767a_ch), | |
6cc93128 | 695 | ARRAY_AND_SIZE(agilent_n5700a_cg), |
91ef511d | 696 | agilent_n5700a_cmd, |
5c9e56c9 AG |
697 | .probe_channels = NULL, |
698 | }, | |
ca314e06 | 699 | |
4ee1e2f3 AG |
700 | /* Chroma 61604 */ |
701 | { "Chroma", "61604", 0, | |
702 | ARRAY_AND_SIZE(chroma_61604_devopts), | |
703 | ARRAY_AND_SIZE(chroma_61604_devopts_cg), | |
704 | ARRAY_AND_SIZE(chroma_61604_ch), | |
705 | ARRAY_AND_SIZE(chroma_61604_cg), | |
91ef511d | 706 | chroma_61604_cmd, |
4ee1e2f3 AG |
707 | .probe_channels = NULL, |
708 | }, | |
ca314e06 | 709 | |
5281993e | 710 | /* Chroma 62000 series */ |
9a5185c7 | 711 | { "Chroma", "620[0-9]{2}P-[0-9]{2,3}-[0-9]{1,3}", 0, |
5281993e AG |
712 | ARRAY_AND_SIZE(chroma_62000_devopts), |
713 | ARRAY_AND_SIZE(chroma_62000_devopts_cg), | |
9a5185c7 AG |
714 | NULL, 0, |
715 | NULL, 0, | |
91ef511d | 716 | chroma_62000_cmd, |
9a5185c7 | 717 | .probe_channels = chroma_62000p_probe_channels, |
5281993e | 718 | }, |
ca314e06 | 719 | |
e76a3575 AG |
720 | /* HP 6633A */ |
721 | { "HP", "6633A", 0, | |
722 | ARRAY_AND_SIZE(hp_6630a_devopts), | |
7c517d02 | 723 | ARRAY_AND_SIZE(hp_6630a_devopts_cg), |
e76a3575 AG |
724 | ARRAY_AND_SIZE(hp_6633a_ch), |
725 | ARRAY_AND_SIZE(hp_663xx_cg), | |
726 | hp_6630a_cmd, | |
727 | .probe_channels = NULL, | |
728 | }, | |
729 | ||
a61c8cce FS |
730 | /* HP 6631B */ |
731 | { "HP", "6631B", PPS_OVP | PPS_OCP | PPS_OTP, | |
732 | ARRAY_AND_SIZE(hp_6630b_devopts), | |
733 | ARRAY_AND_SIZE(hp_6630b_devopts_cg), | |
734 | ARRAY_AND_SIZE(hp_6631b_ch), | |
735 | ARRAY_AND_SIZE(hp_663xx_cg), | |
736 | hp_6630b_cmd, | |
737 | .probe_channels = NULL, | |
738 | }, | |
739 | ||
bc4a2a46 | 740 | /* HP 6632B */ |
7e381bfc | 741 | { "HP", "6632B", PPS_OVP | PPS_OCP | PPS_OTP, |
a61c8cce FS |
742 | ARRAY_AND_SIZE(hp_6630b_devopts), |
743 | ARRAY_AND_SIZE(hp_6630b_devopts_cg), | |
bc4a2a46 | 744 | ARRAY_AND_SIZE(hp_6632b_ch), |
e76a3575 | 745 | ARRAY_AND_SIZE(hp_663xx_cg), |
a61c8cce FS |
746 | hp_6630b_cmd, |
747 | .probe_channels = NULL, | |
748 | }, | |
749 | ||
750 | /* HP 66332A */ | |
751 | { "HP", "66332A", PPS_OVP | PPS_OCP | PPS_OTP, | |
752 | ARRAY_AND_SIZE(hp_6630b_devopts), | |
753 | ARRAY_AND_SIZE(hp_6630b_devopts_cg), | |
754 | ARRAY_AND_SIZE(hp_66332a_ch), | |
755 | ARRAY_AND_SIZE(hp_663xx_cg), | |
756 | hp_6630b_cmd, | |
757 | .probe_channels = NULL, | |
758 | }, | |
759 | ||
760 | /* HP 6633B */ | |
761 | { "HP", "6633B", PPS_OVP | PPS_OCP | PPS_OTP, | |
762 | ARRAY_AND_SIZE(hp_6630b_devopts), | |
763 | ARRAY_AND_SIZE(hp_6630b_devopts_cg), | |
764 | ARRAY_AND_SIZE(hp_6633b_ch), | |
765 | ARRAY_AND_SIZE(hp_663xx_cg), | |
766 | hp_6630b_cmd, | |
767 | .probe_channels = NULL, | |
768 | }, | |
769 | ||
770 | /* HP 6634B */ | |
771 | { "HP", "6634B", PPS_OVP | PPS_OCP | PPS_OTP, | |
772 | ARRAY_AND_SIZE(hp_6630b_devopts), | |
773 | ARRAY_AND_SIZE(hp_6630b_devopts_cg), | |
774 | ARRAY_AND_SIZE(hp_6634b_ch), | |
775 | ARRAY_AND_SIZE(hp_663xx_cg), | |
776 | hp_6630b_cmd, | |
c3eadb07 | 777 | .probe_channels = NULL, |
bc4a2a46 BV |
778 | }, |
779 | ||
319fe9ce UH |
780 | /* Rigol DP700 series */ |
781 | { "Rigol", "^DP711$", 0, | |
782 | ARRAY_AND_SIZE(rigol_dp700_devopts), | |
783 | ARRAY_AND_SIZE(rigol_dp700_devopts_cg), | |
784 | ARRAY_AND_SIZE(rigol_dp711_ch), | |
785 | ARRAY_AND_SIZE(rigol_dp700_cg), | |
786 | rigol_dp700_cmd, | |
787 | .probe_channels = NULL, | |
788 | }, | |
789 | { "Rigol", "^DP712$", 0, | |
790 | ARRAY_AND_SIZE(rigol_dp700_devopts), | |
791 | ARRAY_AND_SIZE(rigol_dp700_devopts_cg), | |
792 | ARRAY_AND_SIZE(rigol_dp712_ch), | |
793 | ARRAY_AND_SIZE(rigol_dp700_cg), | |
794 | rigol_dp700_cmd, | |
795 | .probe_channels = NULL, | |
796 | }, | |
797 | ||
d4eabea8 | 798 | /* Rigol DP800 series */ |
cfcdf576 ML |
799 | { "Rigol", "^DP821A$", PPS_OTP, |
800 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
801 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
802 | ARRAY_AND_SIZE(rigol_dp821a_ch), | |
803 | ARRAY_AND_SIZE(rigol_dp820_cg), | |
91ef511d | 804 | rigol_dp800_cmd, |
cfcdf576 ML |
805 | .probe_channels = NULL, |
806 | }, | |
3222ee10 BV |
807 | { "Rigol", "^DP831A$", PPS_OTP, |
808 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
809 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
810 | ARRAY_AND_SIZE(rigol_dp831_ch), | |
cfcdf576 | 811 | ARRAY_AND_SIZE(rigol_dp830_cg), |
91ef511d | 812 | rigol_dp800_cmd, |
c3eadb07 | 813 | .probe_channels = NULL, |
3222ee10 BV |
814 | }, |
815 | { "Rigol", "^(DP832|DP832A)$", PPS_OTP, | |
816 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
817 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
818 | ARRAY_AND_SIZE(rigol_dp832_ch), | |
cfcdf576 | 819 | ARRAY_AND_SIZE(rigol_dp830_cg), |
91ef511d | 820 | rigol_dp800_cmd, |
c3eadb07 BV |
821 | .probe_channels = NULL, |
822 | }, | |
823 | ||
824 | /* Philips/Fluke PM2800 series */ | |
825 | { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0, | |
9d9cf1c4 | 826 | ARRAY_AND_SIZE(philips_pm2800_devopts), |
c3eadb07 BV |
827 | ARRAY_AND_SIZE(philips_pm2800_devopts_cg), |
828 | NULL, 0, | |
829 | NULL, 0, | |
91ef511d | 830 | philips_pm2800_cmd, |
c3eadb07 | 831 | philips_pm2800_probe_channels, |
d4eabea8 | 832 | }, |
81eb36d6 MS |
833 | |
834 | /* Rohde & Schwarz HMC8043 */ | |
835 | { "Rohde&Schwarz", "HMC8043", 0, | |
836 | ARRAY_AND_SIZE(rs_hmc8043_devopts), | |
837 | ARRAY_AND_SIZE(rs_hmc8043_devopts_cg), | |
838 | ARRAY_AND_SIZE(rs_hmc8043_ch), | |
839 | ARRAY_AND_SIZE(rs_hmc8043_cg), | |
840 | rs_hmc8043_cmd, | |
841 | .probe_channels = NULL, | |
842 | }, | |
d4eabea8 | 843 | }; |
d4eabea8 | 844 | |
1beccaed | 845 | SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); |