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kingst-la2016: add support for "probe names" scan option
[libsigrok.git] / src / hardware / kingst-la2016 / protocol.h
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1/*
2 * This file is part of the libsigrok project.
3 *
7047acc8 4 * Copyright (C) 2022 Gerhard Sittig <gerhard.sittig@gmx.net>
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5 * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
6 * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
7 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
8 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
9 *
10 * This program is free software: you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation, either version 3 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 */
23
24#ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
25#define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
26
f2cd2deb 27#include <libsigrok/libsigrok.h>
a7740b06 28#include <stdint.h>
f2cd2deb 29
e9430410 30#define LOG_PREFIX "kingst-la2016"
f2cd2deb 31
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32#define LA2016_VID 0x77a1
33#define LA2016_PID 0x01a2
852c7d14 34#define LA2016_IPRODUCT_INDEX 2
f2cd2deb 35#define USB_INTERFACE 0
40a0b2f4 36#define USB_CONFIGURATION 1
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37#define USB_EP_FPGA_BITSTREAM 2
38#define USB_EP_CAPTURE_DATA 6
f2cd2deb 39
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40/*
41 * On Windows sigrok uses WinUSB RAW_IO policy which requires the
42 * USB transfer buffer size to be a multiple of the endpoint max packet
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43 * size, which is 512 bytes in this case. Also, the maximum allowed size
44 * of the transfer buffer is normally read from WinUSB_GetPipePolicy API
45 * but libusb does not expose this function. Typically, max size is 2MB.
e847645b 46 */
96dc954e 47#define LA2016_EP6_PKTSZ 512 /* Max packet size of USB endpoint 6. */
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48#define LA2016_USB_BUFSZ (512 * 1024) /* 512KiB buffer. */
49#define LA2016_USB_XFER_COUNT 8 /* Size of USB bulk transfers pool. */
e847645b 50
22cb067a 51/* USB communication timeout during regular operation. */
e9430410 52#define DEFAULT_TIMEOUT_MS 200
1291ea43 53#define CAPTURE_TIMEOUT_MS 500
f2cd2deb 54
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55/*
56 * Check for MCU firmware to take effect after upload. Check the device
57 * presence for a maximum period of time, delay between checks in that
58 * phase. Allow for the device to vanish after upload and before checks,
59 * to not mistake its earlier incarnation for the successful operation
60 * of the most recently loaded firmware.
61 */
62#define RENUM_CHECK_PERIOD_MS 3000
63#define RENUM_GONE_DELAY_MS 1800
64#define RENUM_POLL_INTERVAL_MS 200
65
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66/*
67 * The device expects some zero padding to follow the content of the
68 * file which contains the FPGA bitstream. Specify the chunk size here.
69 */
1c445e08 70#define LA2016_EP2_PADDING 4096
b0d0131e 71
9270f8f4 72/*
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73 * Whether the logic input threshold voltage is a config item of the
74 * "Logic" channel group or a global config item of the device. Ideally
75 * it would be the former (being strictly related to the Logic channels)
76 * but mainline applications work better with the latter, and many other
77 * device drivers implement it that way, too.
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78 */
79#define WITH_THRESHOLD_DEVCFG 1
9270f8f4 80
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81#define LA2016_THR_VOLTAGE_MIN 0.40
82#define LA2016_THR_VOLTAGE_MAX 4.00
f2cd2deb 83
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84/* Properties related to the layout of capture data downloads. */
85#define TRANSFER_PACKET_LENGTH 16
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86#define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
87
88/* Maximum device capabilities. May differ between models. */
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89#define MAX_PWM_FREQ SR_MHZ(20)
90#define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
91
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92#define LA2016_NUM_PWMCH_MAX 2
93
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94/* Streaming mode related thresholds. Not enforced, used for warnings. */
95#define LA2016_STREAM_MBPS_MAX 200 /* In units of Mbps. */
96#define LA2016_STREAM_PUSH_THR 16 /* In units of Mbps. */
97#define LA2016_STREAM_PUSH_IVAL 250 /* In units of ms. */
98
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99/*
100 * Whether to de-initialize the device hardware in the driver's close
101 * callback. It is desirable to e.g. configure PWM channels and leave
102 * the generator running after the application shuts down. Users can
103 * always disable channels on their way out if they want to.
104 */
105#define WITH_DEINIT_IN_CLOSE 0
106
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107#define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
108
d466f61c 109struct kingst_model {
69320ad3 110 uint8_t magic, magic2; /* EEPROM magic byte values. */
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111 const char *name; /* User perceived model name. */
112 const char *fpga_stem; /* Bitstream filename stem. */
113 uint64_t samplerate; /* Max samplerate in Hz. */
114 size_t channel_count; /* Max channel count (16, 32). */
115 uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */
40a0db1e 116 uint64_t baseclock; /* Base clock to derive samplerate from. */
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117};
118
f2cd2deb 119struct dev_context {
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120 uint16_t usb_pid;
121 char *mcu_firmware;
122 char *fpga_bitstream;
520a20e9 123 uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */
69320ad3 124 uint8_t identify_magic, identify_magic2;
d466f61c 125 const struct kingst_model *model;
90ed86aa 126 char **channel_names_logic;
331277e0 127 struct sr_channel_group *cg_logic, *cg_pwm;
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128
129 /* User specified parameters. */
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130 struct pwm_setting {
131 gboolean enabled;
132 float freq;
133 float duty;
134 } pwm_setting[LA2016_NUM_PWMCH_MAX];
5eb1b63d 135 size_t threshold_voltage_idx;
edc0b015 136 uint64_t samplerate;
a38f0f5e 137 struct sr_sw_limits sw_limits;
f2cd2deb 138 uint64_t capture_ratio;
0fbb464b 139 gboolean continuous;
f2cd2deb 140
96dc954e 141 /* Internal acquisition and download state. */
cf057ac4 142 gboolean trigger_involved;
96a405ab 143 gboolean frame_begin_sent;
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144 gboolean completion_seen;
145 gboolean download_finished;
038e65c1 146 uint32_t packets_per_chunk;
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147 struct capture_info {
148 uint32_t n_rep_packets;
149 uint32_t n_rep_packets_before_trigger;
150 uint32_t write_pos;
151 } info;
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152 uint32_t n_transfer_packets_to_read; /* each with 5 acq packets */
153 uint32_t n_bytes_to_read;
154 uint32_t n_reps_until_trigger;
cf057ac4 155 gboolean trigger_marked;
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156 uint64_t total_samples;
157 uint32_t read_pos;
158
a38f0f5e 159 struct feed_queue_logic *feed_queue;
796ce0bf 160 GSList *transfers;
1291ea43 161 size_t transfer_bufsize;
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162 struct stream_state_t {
163 size_t enabled_count;
164 uint32_t enabled_mask;
165 uint32_t channel_masks[32];
166 size_t channel_index;
167 uint32_t sample_data[32];
168 uint64_t flush_period_ms;
169 uint64_t last_flushed;
170 } stream;
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171};
172
d466f61c 173SR_PRIV int la2016_upload_firmware(const struct sr_dev_inst *sdi,
91aa0f04 174 struct sr_context *sr_ctx, libusb_device *dev, gboolean skip_upload);
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175SR_PRIV int la2016_identify_device(const struct sr_dev_inst *sdi,
176 gboolean show_message);
6d53e949 177SR_PRIV int la2016_init_hardware(const struct sr_dev_inst *sdi);
6d53e949 178SR_PRIV int la2016_deinit_hardware(const struct sr_dev_inst *sdi);
08a49848 179SR_PRIV int la2016_write_pwm_config(const struct sr_dev_inst *sdi, size_t idx);
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180SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi,
181 double voltage);
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182SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
183SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
184SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data);
1291ea43 185SR_PRIV void la2016_release_resources(const struct sr_dev_inst *sdi);
f2cd2deb 186
f2cd2deb 187#endif