]> sigrok.org Git - libsigrok.git/blame - src/hardware/kingst-la2016/protocol.h
kingst-la2016: rephrase FPGA bitstream content zero padding
[libsigrok.git] / src / hardware / kingst-la2016 / protocol.h
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
5 * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
6 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
7 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
8 *
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 3 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
24#define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
25
f2cd2deb 26#include <libsigrok/libsigrok.h>
a7740b06 27#include <stdint.h>
f2cd2deb 28
e9430410 29#define LOG_PREFIX "kingst-la2016"
f2cd2deb 30
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31#define LA2016_VID 0x77a1
32#define LA2016_PID 0x01a2
33#define USB_INTERFACE 0
40a0b2f4 34#define USB_CONFIGURATION 1
f2cd2deb 35
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36/*
37 * On Windows sigrok uses WinUSB RAW_IO policy which requires the
38 * USB transfer buffer size to be a multiple of the endpoint max packet
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39 * size, which is 512 bytes in this case. Also, the maximum allowed size
40 * of the transfer buffer is normally read from WinUSB_GetPipePolicy API
41 * but libusb does not expose this function. Typically, max size is 2MB.
e847645b 42 */
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43#define LA2016_EP6_PKTSZ 512 /* Max packet size of USB endpoint 6. */
44#define LA2016_USB_BUFSZ (256 * 2 * LA2016_EP6_PKTSZ) /* 256KiB buffer. */
e847645b 45
22cb067a 46/* USB communication timeout during regular operation. */
e9430410 47#define DEFAULT_TIMEOUT_MS 200
f2cd2deb 48
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49/*
50 * Check for MCU firmware to take effect after upload. Check the device
51 * presence for a maximum period of time, delay between checks in that
52 * phase. Allow for the device to vanish after upload and before checks,
53 * to not mistake its earlier incarnation for the successful operation
54 * of the most recently loaded firmware.
55 */
56#define RENUM_CHECK_PERIOD_MS 3000
57#define RENUM_GONE_DELAY_MS 1800
58#define RENUM_POLL_INTERVAL_MS 200
59
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60/*
61 * The device expects some zero padding to follow the content of the
62 * file which contains the FPGA bitstream. Specify the chunk size here.
63 */
64#define LA2016_EP2_PADDING 2048
65
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66#define LA2016_THR_VOLTAGE_MIN 0.40
67#define LA2016_THR_VOLTAGE_MAX 4.00
f2cd2deb 68
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69#define LA2016_NUM_SAMPLES_MIN 256
70#define LA2016_NUM_SAMPLES_MAX (10UL * 1000 * 1000 * 1000)
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71
72typedef struct pwm_setting_dev {
73 uint32_t period;
74 uint32_t duty;
c3d40037 75} pwm_setting_dev_t;
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76
77typedef struct trigger_cfg {
78 uint32_t channels;
79 uint32_t enabled;
80 uint32_t level;
81 uint32_t high_or_falling;
c3d40037 82} trigger_cfg_t;
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83
84typedef struct capture_info {
85 uint32_t n_rep_packets;
86 uint32_t n_rep_packets_before_trigger;
87 uint32_t write_pos;
c3d40037 88} capture_info_t;
f2cd2deb 89
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90#define NUM_PACKETS_IN_CHUNK 5
91#define TRANSFER_PACKET_LENGTH 16
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92
93typedef struct pwm_setting {
94 uint8_t enabled;
95 float freq;
96 float duty;
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97} pwm_setting_t;
98
99struct dev_context {
100 struct sr_context *ctx;
22cb067a 101 uint64_t fw_uploaded;
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102
103 /* User specified parameters. */
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104 pwm_setting_t pwm_setting[2];
105 unsigned int threshold_voltage_idx;
106 float threshold_voltage;
8b172e78 107 uint64_t max_samplerate;
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108 uint64_t cur_samplerate;
109 uint64_t limit_samples;
110 uint64_t capture_ratio;
111 uint16_t cur_channels;
112 int num_channels;
113
96dc954e 114 /* Values derived from user specs. */
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115 uint64_t pre_trigger_size;
116
96dc954e 117 /* Internal acquisition and download state. */
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118 int had_triggers_configured;
119 int have_trigger;
120 int transfer_finished;
121 capture_info_t info;
122 unsigned int n_transfer_packets_to_read; /* each with 5 acq packets */
123 unsigned int n_bytes_to_read;
124 unsigned int n_reps_until_trigger;
125 unsigned int reading_behind_trigger;
126 uint64_t total_samples;
127 uint32_t read_pos;
128
129 unsigned int convbuffer_size;
130 uint8_t *convbuffer;
131 struct libusb_transfer *transfer;
132};
133
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134SR_PRIV int la2016_upload_firmware(struct sr_context *sr_ctx,
135 libusb_device *dev, uint16_t product_id);
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136SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi);
137SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
f2cd2deb 138SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
388438e4 139SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data);
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140SR_PRIV int la2016_init_device(const struct sr_dev_inst *sdi);
141SR_PRIV int la2016_deinit_device(const struct sr_dev_inst *sdi);
142
f2cd2deb 143#endif