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1/*
2 * This file is part of the libsigrok project.
3 *
7047acc8 4 * Copyright (C) 2022 Gerhard Sittig <gerhard.sittig@gmx.net>
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5 * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
6 * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
7 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
8 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
9 *
10 * This program is free software: you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation, either version 3 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 */
23
24#ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
25#define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
26
f2cd2deb 27#include <libsigrok/libsigrok.h>
a7740b06 28#include <stdint.h>
f2cd2deb 29
e9430410 30#define LOG_PREFIX "kingst-la2016"
f2cd2deb 31
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32#define LA2016_VID 0x77a1
33#define LA2016_PID 0x01a2
852c7d14 34#define LA2016_IPRODUCT_INDEX 2
f2cd2deb 35#define USB_INTERFACE 0
40a0b2f4 36#define USB_CONFIGURATION 1
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37#define USB_EP_FPGA_BITSTREAM 2
38#define USB_EP_CAPTURE_DATA 6
f2cd2deb 39
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40/*
41 * On Windows sigrok uses WinUSB RAW_IO policy which requires the
42 * USB transfer buffer size to be a multiple of the endpoint max packet
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43 * size, which is 512 bytes in this case. Also, the maximum allowed size
44 * of the transfer buffer is normally read from WinUSB_GetPipePolicy API
45 * but libusb does not expose this function. Typically, max size is 2MB.
e847645b 46 */
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47#define LA2016_EP6_PKTSZ 512 /* Max packet size of USB endpoint 6. */
48#define LA2016_USB_BUFSZ (256 * 2 * LA2016_EP6_PKTSZ) /* 256KiB buffer. */
e847645b 49
22cb067a 50/* USB communication timeout during regular operation. */
e9430410 51#define DEFAULT_TIMEOUT_MS 200
f2cd2deb 52
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53/*
54 * Check for MCU firmware to take effect after upload. Check the device
55 * presence for a maximum period of time, delay between checks in that
56 * phase. Allow for the device to vanish after upload and before checks,
57 * to not mistake its earlier incarnation for the successful operation
58 * of the most recently loaded firmware.
59 */
60#define RENUM_CHECK_PERIOD_MS 3000
61#define RENUM_GONE_DELAY_MS 1800
62#define RENUM_POLL_INTERVAL_MS 200
63
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64/*
65 * The device expects some zero padding to follow the content of the
66 * file which contains the FPGA bitstream. Specify the chunk size here.
67 */
68#define LA2016_EP2_PADDING 2048
69
9270f8f4 70/*
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71 * Whether the logic input threshold voltage is a config item of the
72 * "Logic" channel group or a global config item of the device. Ideally
73 * it would be the former (being strictly related to the Logic channels)
74 * but mainline applications work better with the latter, and many other
75 * device drivers implement it that way, too.
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76 */
77#define WITH_THRESHOLD_DEVCFG 1
9270f8f4 78
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79#define LA2016_THR_VOLTAGE_MIN 0.40
80#define LA2016_THR_VOLTAGE_MAX 4.00
f2cd2deb 81
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82/* Properties related to the layout of capture data downloads. */
83#define TRANSFER_PACKET_LENGTH 16
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84#define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
85
86/* Maximum device capabilities. May differ between models. */
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87#define MAX_PWM_FREQ SR_MHZ(20)
88#define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
89
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90#define LA2016_NUM_PWMCH_MAX 2
91
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92/*
93 * Whether to de-initialize the device hardware in the driver's close
94 * callback. It is desirable to e.g. configure PWM channels and leave
95 * the generator running after the application shuts down. Users can
96 * always disable channels on their way out if they want to.
97 */
98#define WITH_DEINIT_IN_CLOSE 0
99
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100#define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
101
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102struct kingst_model {
103 uint8_t magic; /* EEPROM magic byte value. */
104 const char *name; /* User perceived model name. */
105 const char *fpga_stem; /* Bitstream filename stem. */
106 uint64_t samplerate; /* Max samplerate in Hz. */
107 size_t channel_count; /* Max channel count (16, 32). */
108 uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */
109};
110
f2cd2deb 111struct dev_context {
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112 uint16_t usb_pid;
113 char *mcu_firmware;
114 char *fpga_bitstream;
520a20e9 115 uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */
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116 uint8_t identify_magic;
117 const struct kingst_model *model;
331277e0 118 struct sr_channel_group *cg_logic, *cg_pwm;
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119
120 /* User specified parameters. */
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121 struct pwm_setting {
122 gboolean enabled;
123 float freq;
124 float duty;
125 } pwm_setting[LA2016_NUM_PWMCH_MAX];
5eb1b63d 126 size_t threshold_voltage_idx;
edc0b015 127 uint64_t samplerate;
a38f0f5e 128 struct sr_sw_limits sw_limits;
f2cd2deb 129 uint64_t capture_ratio;
f2cd2deb 130
96dc954e 131 /* Internal acquisition and download state. */
cf057ac4 132 gboolean trigger_involved;
96a405ab 133 gboolean frame_begin_sent;
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134 gboolean completion_seen;
135 gboolean download_finished;
038e65c1 136 uint32_t packets_per_chunk;
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137 struct capture_info {
138 uint32_t n_rep_packets;
139 uint32_t n_rep_packets_before_trigger;
140 uint32_t write_pos;
141 } info;
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142 uint32_t n_transfer_packets_to_read; /* each with 5 acq packets */
143 uint32_t n_bytes_to_read;
144 uint32_t n_reps_until_trigger;
cf057ac4 145 gboolean trigger_marked;
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146 uint64_t total_samples;
147 uint32_t read_pos;
148
a38f0f5e 149 struct feed_queue_logic *feed_queue;
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150 struct libusb_transfer *transfer;
151};
152
d466f61c 153SR_PRIV int la2016_upload_firmware(const struct sr_dev_inst *sdi,
91aa0f04 154 struct sr_context *sr_ctx, libusb_device *dev, gboolean skip_upload);
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155SR_PRIV int la2016_identify_device(const struct sr_dev_inst *sdi,
156 gboolean show_message);
6d53e949 157SR_PRIV int la2016_init_hardware(const struct sr_dev_inst *sdi);
6d53e949 158SR_PRIV int la2016_deinit_hardware(const struct sr_dev_inst *sdi);
08a49848 159SR_PRIV int la2016_write_pwm_config(const struct sr_dev_inst *sdi, size_t idx);
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160SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi,
161 double voltage);
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162SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
163SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
164SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data);
f2cd2deb 165
f2cd2deb 166#endif