[libsigrok.git] / src / hardware / hantek-4032l / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
 * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
 * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include "protocol.h"

#define USB_INTERFACE 0
#define NUM_CHANNELS 32

static const uint32_t scanopts[] = {
	SR_CONF_CONN,
};

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t devopts[] = {
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CONN | SR_CONF_GET,
	SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
};

static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
	SR_TRIGGER_RISING,
	SR_TRIGGER_FALLING,
	SR_TRIGGER_EDGE,
};

static const uint64_t samplerates[] = {
	SR_KHZ(1),
	SR_KHZ(2),
	SR_KHZ(4),
	SR_KHZ(8),
	SR_KHZ(16),
	SR_HZ(31250),
	SR_HZ(62500),
	SR_KHZ(125),
	SR_KHZ(250),
	SR_KHZ(500),
	SR_KHZ(625),
	SR_HZ(781250),
	SR_MHZ(1),
	SR_KHZ(1250),
	SR_HZ(1562500),
	SR_MHZ(2),
	SR_KHZ(2500),
	SR_KHZ(3125),
	SR_MHZ(4),
	SR_MHZ(5),
	SR_KHZ(6250),
	SR_MHZ(10),
	SR_KHZ(12500),
	SR_MHZ(20),
	SR_MHZ(25),
	SR_MHZ(40),
	SR_MHZ(50),
	SR_MHZ(80),
	SR_MHZ(100),
	SR_MHZ(160),
	SR_MHZ(200),
	SR_MHZ(320),
	SR_MHZ(400),
};

static const uint64_t samplerates_hw[] = {
	SR_MHZ(100),
	SR_MHZ(50),
	SR_MHZ(25),
	SR_KHZ(12500),
	SR_KHZ(6250),
	SR_KHZ(3125),
	SR_HZ(1562500),
	SR_HZ(781250),
	SR_MHZ(80),
	SR_MHZ(40),
	SR_MHZ(20),
	SR_MHZ(10),
	SR_MHZ(5),
	SR_KHZ(2500),
	SR_KHZ(1250),
	SR_KHZ(625),
	SR_MHZ(4),
	SR_MHZ(2),
	SR_MHZ(1),
	SR_KHZ(500),
	SR_KHZ(250),
	SR_KHZ(125),
	SR_HZ(62500),
	SR_HZ(31250),
	SR_KHZ(16),
	SR_KHZ(8),
	SR_KHZ(4),
	SR_KHZ(2),
	SR_KHZ(1),
	0,
	0,
	0,
	SR_MHZ(200),
	SR_MHZ(160),
	SR_MHZ(400),
	SR_MHZ(320),
};

SR_PRIV struct sr_dev_driver hantek_4032l_driver_info;

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct drv_context *drvc = di->context;
	GSList *l, *devices, *conn_devices;
	libusb_device **devlist;
	struct libusb_device_descriptor des;
	const char *conn;
	int i;
	char connection_id[64];
	struct sr_channel_group *cg;
	struct sr_dev_inst *sdi;
	struct sr_channel *ch;

	devices = NULL;
	conn_devices = NULL;
	drvc->instances = NULL;
	conn = NULL;

	for (l = options; l; l = l->next) {
		struct sr_config *src = l->data;
		if (src->key == SR_CONF_CONN) {
			conn = g_variant_get_string(src->data, NULL);
			break;
		}
	}

	if (conn)
		conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
	else
		conn_devices = NULL;

	libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
	for (i = 0; devlist[i]; i++) {
		if (conn) {
			struct sr_usb_dev_inst *usb = NULL;
			for (l = conn_devices; l; l = l->next) {
				usb = l->data;
				if (usb->bus == libusb_get_bus_number(devlist[i]) &&
				    usb->address == libusb_get_device_address(devlist[i]))
					break;
			}
			if (!l)
				/* This device matched none of the ones that
				 * matched the conn specification. */
				continue;
		}

		libusb_get_device_descriptor(devlist[i], &des);

		if (des.idVendor != H4032L_USB_VENDOR ||
		    des.idProduct != H4032L_USB_PRODUCT)
			continue;

		if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
			continue;

		sdi = g_malloc0(sizeof(struct sr_dev_inst));
		sdi->driver = &hantek_4032l_driver_info;
		sdi->vendor = g_strdup("Hantek");
		sdi->model = g_strdup("4032L");
		sdi->connection_id = g_strdup(connection_id);

		struct sr_channel_group *channel_groups[2];
		for (int j = 0; j < 2; j++) {
			cg = g_malloc0(sizeof(struct sr_channel_group));
			cg->name = g_strdup_printf("%c", 'A' + j);
			channel_groups[j] = cg;
			sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
		}

		/* Assemble channel list and add channel to channel groups. */
		for (int j = 0; j < NUM_CHANNELS; j++) {
			char channel_name[4];
			sprintf(channel_name, "%c%d", 'A' + (j & 1), j / 2);
			ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_name);
			cg = channel_groups[j & 1];
			cg->channels = g_slist_append(cg->channels, ch);
		}

		struct dev_context *devc = g_malloc0(sizeof(struct dev_context));

		/* Initialize command packet. */
		devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC;
		devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(2.5);
		devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(2.5);
		devc->cmd_pkt.sample_size = 16384;
		devc->cmd_pkt.pre_trigger_size = 1024;

		devc->status = H4032L_STATUS_IDLE;

		devc->capture_ratio = 5;

		sdi->priv = devc;
		devices = g_slist_append(devices, sdi);

		sdi->status = SR_ST_INACTIVE;
		sdi->inst_type = SR_INST_USB;
		sdi->conn = sr_usb_dev_inst_new(
			libusb_get_bus_number(devlist[i]),
			libusb_get_device_address(devlist[i]), NULL);
	}

	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
	libusb_free_device_list(devlist, 1);

	return std_scan_complete(di, devices);
}

static int dev_open(struct sr_dev_inst *sdi)
{
	struct sr_usb_dev_inst *usb = sdi->conn;
	int ret;

	ret = h4032l_dev_open(sdi);
	if (ret != SR_OK) {
		sr_err("Unable to open device.");
		return SR_ERR;
	}

	ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
	if (ret != 0) {
		switch (ret) {
		case LIBUSB_ERROR_BUSY:
			sr_err("Unable to claim USB interface. Another "
			       "program or driver has already claimed it.");
			break;
		case LIBUSB_ERROR_NO_DEVICE:
			sr_err("Device has been disconnected.");
			break;
		default:
			sr_err("Unable to claim interface: %s.",
			       libusb_error_name(ret));
			break;
		}

		return SR_ERR;
	}

	/* Get FPGA version. */
	if ((ret = h4032l_get_fpga_version(sdi)) != SR_OK)
		return ret;

	return SR_OK;
}

static int dev_close(struct sr_dev_inst *sdi)
{
	struct sr_usb_dev_inst *usb;

	usb = sdi->conn;

	if (!usb->devhdl)
		return SR_ERR_BUG;

	sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.",
		usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
	libusb_release_interface(usb->devhdl, USB_INTERFACE);
	libusb_close(usb->devhdl);
	usb->devhdl = NULL;

	return SR_OK;
}

static int config_get(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc = sdi->priv;
	struct sr_usb_dev_inst *usb;

	(void)cg;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(samplerates_hw[devc->cmd_pkt.sample_rate]);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->cmd_pkt.sample_size);
		break;
	case SR_CONF_CONN:
		if (!sdi || !(usb = sdi->conn))
			return SR_ERR_ARG;
		*data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc = sdi->priv;
	struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;

	(void)cg;

	switch (key) {
	case SR_CONF_SAMPLERATE: {
			uint64_t sample_rate = g_variant_get_uint64(data);
			uint8_t i = 0;
			while (i < ARRAY_SIZE(samplerates_hw) && samplerates_hw[i] != sample_rate)
				i++;

			if (i == ARRAY_SIZE(samplerates_hw) || sample_rate == 0) {
				sr_err("Invalid sample rate.");
				return SR_ERR_SAMPLERATE;
			}
			cmd_pkt->sample_rate = i;
			break;
		}
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		break;
	case SR_CONF_LIMIT_SAMPLES: {
			uint64_t number_samples = g_variant_get_uint64(data);
			number_samples += 511;
			number_samples &= 0xfffffe00;
			if (number_samples < H4043L_NUM_SAMPLES_MIN ||
			    number_samples > H4032L_NUM_SAMPLES_MAX) {
				sr_err("Invalid sample range 2k...64M: %"
				       PRIu64 ".", number_samples);
				return SR_ERR;
			}
			cmd_pkt->sample_size = number_samples;
			break;
		}
	case SR_CONF_VOLTAGE_THRESHOLD: {
			double d1, d2;
			g_variant_get(data, "(dd)", &d1, &d2);
			devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(d1);
			devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(d2);
			break;
		}
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_list(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
	case SR_CONF_DEVICE_OPTIONS:
		return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
	case SR_CONF_SAMPLERATE:
		*data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
		break;
	case SR_CONF_TRIGGER_MATCH:
		*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
		break;
	case SR_CONF_VOLTAGE_THRESHOLD:
		*data = std_gvar_tuple_double(2.5, 2.5);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = std_gvar_tuple_u64(H4043L_NUM_SAMPLES_MIN, H4032L_NUM_SAMPLES_MAX);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct sr_dev_driver *di = sdi->driver;
	struct drv_context *drvc = di->context;
	struct dev_context *devc = sdi->priv;
	struct sr_trigger *trigger = sr_session_trigger_get(sdi->session);
	struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;

	/* Initialize variables. */
	devc->acq_aborted = FALSE;
	devc->submitted_transfers = 0;

	/* Calculate packet ratio. */
	cmd_pkt->pre_trigger_size = (cmd_pkt->sample_size * devc->capture_ratio) / 100;

	cmd_pkt->trig_flags.enable_trigger1 = 0;
	cmd_pkt->trig_flags.enable_trigger2 = 0;
	cmd_pkt->trig_flags.trigger_and_logic = 0;

	if (trigger && trigger->stages) {
		GSList *stages = trigger->stages;
		struct sr_trigger_stage *stage1 = stages->data;
		if (stages->next) {
			sr_err("Only one trigger stage supported for now.");
			return SR_ERR;
		}
		cmd_pkt->trig_flags.enable_trigger1 = 1;
		cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_DISABLED;
		cmd_pkt->trigger[0].flags.data_range_enabled = 0;
		cmd_pkt->trigger[0].flags.time_range_enabled = 0;
		cmd_pkt->trigger[0].flags.combined_enabled = 0;
		cmd_pkt->trigger[0].flags.data_range_type = H4032L_TRIGGER_DATA_RANGE_TYPE_MAX;
		cmd_pkt->trigger[0].data_range_mask = 0;
		cmd_pkt->trigger[0].data_range_max = 0;

		/* Initialize range mask values. */
		uint32_t range_mask = 0;
		uint32_t range_value = 0;

		GSList *channel = stage1->matches;
		while (channel) {
			struct sr_trigger_match *match = channel->data;

			switch (match->match) {
			case SR_TRIGGER_ZERO:
				range_mask |= (1 << match->channel->index);
				break;
			case SR_TRIGGER_ONE:
				range_mask |= (1 << match->channel->index);
				range_value |= (1 << match->channel->index);
				break;
			case SR_TRIGGER_RISING:
				if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
					sr_err("Only one trigger signal with fall/rising/edge allowed.");
					return SR_ERR;
				}
				cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_RISE;
				cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
				break;
			case SR_TRIGGER_FALLING:
				if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
					sr_err("Only one trigger signal with fall/rising/edge allowed.");
					return SR_ERR;
				}
				cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_FALL;
				cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
				break;
			case SR_TRIGGER_EDGE:
				if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
					sr_err("Only one trigger signal with fall/rising/edge allowed.");
					return SR_ERR;
				}
				cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_TOGGLE;
				cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
				break;
			default:
				sr_err("Unknown trigger value.");
				return SR_ERR;
			}

			channel = channel->next;
		}

		/* Compress range mask value and apply range settings. */
		if (range_mask) {
			cmd_pkt->trigger[0].flags.data_range_enabled = 1;
			cmd_pkt->trigger[0].data_range_mask |= (range_mask);

			uint32_t new_range_value = 0;
			uint32_t bit_mask = 1;
			while (range_mask) {
				if ((range_mask & 1) != 0) {
					new_range_value <<= 1;
					if ((range_value & 1) != 0)
						new_range_value |= bit_mask;
					bit_mask <<= 1;
				}
				range_mask >>= 1;
				range_value >>= 1;
			}
			cmd_pkt->trigger[0].data_range_max |= range_value;
		}
	}

	usb_source_add(sdi->session, drvc->sr_ctx, 1000,
		h4032l_receive_data, sdi->driver->context);

	/* Start capturing. */
	return h4032l_start(sdi);
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	/* Stop capturing. */
	return h4032l_stop(sdi);
}

SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = {
	.name = "hantek-4032l",
	.longname = "Hantek 4032L",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = std_dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = dev_open,
	.dev_close = dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
SR_REGISTER_DEV_DRIVER(hantek_4032l_driver_info);
Commit	Line	Data
6a25fa42 AZ	1	/*
	2	* This file is part of the libsigrok project.
	3	*
5089a143 AZ	4	* Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
	5	* Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
	6	* Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
6a25fa42 AZ	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#include <config.h>
	23	#include "protocol.h"
	24
5089a143 AZ	25	#define USB_INTERFACE 0
5089a143 AZ	26	#define NUM_CHANNELS 32
6a25fa42	27
5089a143 AZ	28	static const uint32_t scanopts[] = {
	29	SR_CONF_CONN,
	30	};
	31
	32	static const uint32_t drvopts[] = {
	33	SR_CONF_LOGIC_ANALYZER,
	34	};
	35
	36	static const uint32_t devopts[] = {
	37	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	38	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
4b75f84c	39	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
5089a143 AZ	40	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
	41	SR_CONF_CONN \| SR_CONF_GET,
	42	SR_CONF_VOLTAGE_THRESHOLD \| SR_CONF_SET \| SR_CONF_LIST,
	43	};
	44
	45	static const int32_t trigger_matches[] = {
	46	SR_TRIGGER_ZERO,
	47	SR_TRIGGER_ONE,
	48	SR_TRIGGER_RISING,
	49	SR_TRIGGER_FALLING,
	50	SR_TRIGGER_EDGE,
	51	};
	52
	53	static const uint64_t samplerates[] = {
	54	SR_KHZ(1),
	55	SR_KHZ(2),
	56	SR_KHZ(4),
	57	SR_KHZ(8),
	58	SR_KHZ(16),
	59	SR_HZ(31250),
	60	SR_HZ(62500),
	61	SR_KHZ(125),
	62	SR_KHZ(250),
	63	SR_KHZ(500),
	64	SR_KHZ(625),
	65	SR_HZ(781250),
	66	SR_MHZ(1),
	67	SR_KHZ(1250),
	68	SR_HZ(1562500),
	69	SR_MHZ(2),
	70	SR_KHZ(2500),
	71	SR_KHZ(3125),
	72	SR_MHZ(4),
	73	SR_MHZ(5),
	74	SR_KHZ(6250),
	75	SR_MHZ(10),
	76	SR_KHZ(12500),
	77	SR_MHZ(20),
	78	SR_MHZ(25),
	79	SR_MHZ(40),
	80	SR_MHZ(50),
	81	SR_MHZ(80),
	82	SR_MHZ(100),
	83	SR_MHZ(160),
	84	SR_MHZ(200),
	85	SR_MHZ(320),
	86	SR_MHZ(400),
	87	};
	88
	89	static const uint64_t samplerates_hw[] = {
	90	SR_MHZ(100),
	91	SR_MHZ(50),
	92	SR_MHZ(25),
	93	SR_KHZ(12500),
	94	SR_KHZ(6250),
	95	SR_KHZ(3125),
	96	SR_HZ(1562500),
	97	SR_HZ(781250),
	98	SR_MHZ(80),
	99	SR_MHZ(40),
	100	SR_MHZ(20),
	101	SR_MHZ(10),
	102	SR_MHZ(5),
	103	SR_KHZ(2500),
104	SR_KHZ(1250),
105	SR_KHZ(625),
106	SR_MHZ(4),
107	SR_MHZ(2),
108	SR_MHZ(1),
109	SR_KHZ(500),
110	SR_KHZ(250),
111	SR_KHZ(125),
112	SR_HZ(62500),
113	SR_HZ(31250),
114	SR_KHZ(16),
115	SR_KHZ(8),
116	SR_KHZ(4),
117	SR_KHZ(2),
118	SR_KHZ(1),
119	0,
120	0,
121	0,
122	SR_MHZ(200),
123	SR_MHZ(160),
124	SR_MHZ(400),
125	SR_MHZ(320),
126	};
127
128	SR_PRIV struct sr_dev_driver hantek_4032l_driver_info;
6a25fa42 AZ	129
	130	static GSList scan(struct sr_dev_driver di, GSList *options)
	131	{
5089a143 AZ	132	struct drv_context *drvc = di->context;
	133	GSList l, devices, *conn_devices;
	134	libusb_device **devlist;
	135	struct libusb_device_descriptor des;
	136	const char *conn;
	137	int i;
	138	char connection_id[64];
	139	struct sr_channel_group *cg;
	140	struct sr_dev_inst *sdi;
	141	struct sr_channel *ch;
6a25fa42 AZ	142
6a25fa42 AZ	143	devices = NULL;
5089a143	144	conn_devices = NULL;
6a25fa42	145	drvc->instances = NULL;
5089a143 AZ	146	conn = NULL;
	147
	148	for (l = options; l; l = l->next) {
	149	struct sr_config *src = l->data;
	150	if (src->key == SR_CONF_CONN) {
	151	conn = g_variant_get_string(src->data, NULL);
	152	break;
	153	}
	154	}
6a25fa42	155
5089a143 AZ	156	if (conn)
	157	conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
	158	else
	159	conn_devices = NULL;
	160
	161	libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
	162	for (i = 0; devlist[i]; i++) {
	163	if (conn) {
	164	struct sr_usb_dev_inst *usb = NULL;
	165	for (l = conn_devices; l; l = l->next) {
	166	usb = l->data;
28f2d07f AV	167	if (usb->bus == libusb_get_bus_number(devlist[i]) &&
28f2d07f AV	168	usb->address == libusb_get_device_address(devlist[i]))
5089a143 AZ	169	break;
	170	}
	171	if (!l)
	172	/* This device matched none of the ones that
	173	* matched the conn specification. */
	174	continue;
	175	}
	176
	177	libusb_get_device_descriptor(devlist[i], &des);
	178
	179	if (des.idVendor != H4032L_USB_VENDOR \|\|
	180	des.idProduct != H4032L_USB_PRODUCT)
	181	continue;
	182
6c1a76d1 RT	183	if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
6c1a76d1 RT	184	continue;
5089a143 AZ	185
	186	sdi = g_malloc0(sizeof(struct sr_dev_inst));
	187	sdi->driver = &hantek_4032l_driver_info;
	188	sdi->vendor = g_strdup("Hantek");
	189	sdi->model = g_strdup("4032L");
	190	sdi->connection_id = g_strdup(connection_id);
	191
	192	struct sr_channel_group *channel_groups[2];
	193	for (int j = 0; j < 2; j++) {
	194	cg = g_malloc0(sizeof(struct sr_channel_group));
	195	cg->name = g_strdup_printf("%c", 'A' + j);
	196	channel_groups[j] = cg;
	197	sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
	198	}
	199
	200	/* Assemble channel list and add channel to channel groups. */
	201	for (int j = 0; j < NUM_CHANNELS; j++) {
	202	char channel_name[4];
	203	sprintf(channel_name, "%c%d", 'A' + (j & 1), j / 2);
	204	ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_name);
	205	cg = channel_groups[j & 1];
	206	cg->channels = g_slist_append(cg->channels, ch);
	207	}
	208
	209	struct dev_context *devc = g_malloc0(sizeof(struct dev_context));
	210
	211	/* Initialize command packet. */
	212	devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC;
	213	devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(2.5);
	214	devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(2.5);
	215	devc->cmd_pkt.sample_size = 16384;
	216	devc->cmd_pkt.pre_trigger_size = 1024;
	217
	218	devc->status = H4032L_STATUS_IDLE;
	219
	220	devc->capture_ratio = 5;
	221
5089a143 AZ	222	sdi->priv = devc;
	223	devices = g_slist_append(devices, sdi);
	224
	225	sdi->status = SR_ST_INACTIVE;
	226	sdi->inst_type = SR_INST_USB;
	227	sdi->conn = sr_usb_dev_inst_new(
	228	libusb_get_bus_number(devlist[i]),
	229	libusb_get_device_address(devlist[i]), NULL);
	230	}
6a25fa42	231
5089a143 AZ	232	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
5089a143 AZ	233	libusb_free_device_list(devlist, 1);
6a25fa42	234
5089a143	235	return std_scan_complete(di, devices);
6a25fa42 AZ	236	}
	237
	238	static int dev_open(struct sr_dev_inst *sdi)
	239	{
5089a143 AZ	240	struct sr_usb_dev_inst *usb = sdi->conn;
5089a143 AZ	241	int ret;
6a25fa42	242
5089a143 AZ	243	ret = h4032l_dev_open(sdi);
	244	if (ret != SR_OK) {
	245	sr_err("Unable to open device.");
	246	return SR_ERR;
	247	}
6a25fa42	248
5089a143 AZ	249	ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
	250	if (ret != 0) {
	251	switch (ret) {
	252	case LIBUSB_ERROR_BUSY:
	253	sr_err("Unable to claim USB interface. Another "
	254	"program or driver has already claimed it.");
	255	break;
	256	case LIBUSB_ERROR_NO_DEVICE:
	257	sr_err("Device has been disconnected.");
	258	break;
	259	default:
	260	sr_err("Unable to claim interface: %s.",
	261	libusb_error_name(ret));
	262	break;
	263	}
	264
	265	return SR_ERR;
	266	}
6a25fa42	267
7a7afc00 AV	268	/* Get FPGA version. */
	269	if ((ret = h4032l_get_fpga_version(sdi)) != SR_OK)
	270	return ret;
	271
6a25fa42 AZ	272	return SR_OK;
	273	}
	274
	275	static int dev_close(struct sr_dev_inst *sdi)
	276	{
5089a143	277	struct sr_usb_dev_inst *usb;
6a25fa42	278
5089a143	279	usb = sdi->conn;
6a25fa42	280
5089a143 AZ	281	if (!usb->devhdl)
5089a143 AZ	282	return SR_ERR_BUG;
6a25fa42	283
5089a143 AZ	284	sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.",
	285	usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
	286	libusb_release_interface(usb->devhdl, USB_INTERFACE);
	287	libusb_close(usb->devhdl);
	288	usb->devhdl = NULL;
6a25fa42 AZ	289
	290	return SR_OK;
	291	}
	292
	293	static int config_get(uint32_t key, GVariant **data,
	294	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
	295	{
5089a143 AZ	296	struct dev_context *devc = sdi->priv;
5089a143 AZ	297	struct sr_usb_dev_inst *usb;
6a25fa42	298
6a25fa42 AZ	299	(void)cg;
6a25fa42 AZ	300
6a25fa42	301	switch (key) {
5089a143 AZ	302	case SR_CONF_SAMPLERATE:
	303	*data = g_variant_new_uint64(samplerates_hw[devc->cmd_pkt.sample_rate]);
	304	break;
	305	case SR_CONF_CAPTURE_RATIO:
	306	*data = g_variant_new_uint64(devc->capture_ratio);
	307	break;
	308	case SR_CONF_LIMIT_SAMPLES:
	309	*data = g_variant_new_uint64(devc->cmd_pkt.sample_size);
	310	break;
	311	case SR_CONF_CONN:
	312	if (!sdi \|\| !(usb = sdi->conn))
	313	return SR_ERR_ARG;
	314	*data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
	315	break;
6a25fa42 AZ	316	default:
	317	return SR_ERR_NA;
	318	}
	319
5089a143	320	return SR_OK;
6a25fa42 AZ	321	}
	322
	323	static int config_set(uint32_t key, GVariant *data,
	324	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
	325	{
5089a143 AZ	326	struct dev_context *devc = sdi->priv;
5089a143 AZ	327	struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
6a25fa42	328
6a25fa42 AZ	329	(void)cg;
6a25fa42 AZ	330
6a25fa42	331	switch (key) {
5089a143 AZ	332	case SR_CONF_SAMPLERATE: {
	333	uint64_t sample_rate = g_variant_get_uint64(data);
	334	uint8_t i = 0;
	335	while (i < ARRAY_SIZE(samplerates_hw) && samplerates_hw[i] != sample_rate)
	336	i++;
	337
	338	if (i == ARRAY_SIZE(samplerates_hw) \|\| sample_rate == 0) {
4868f15a	339	sr_err("Invalid sample rate.");
5089a143 AZ	340	return SR_ERR_SAMPLERATE;
	341	}
	342	cmd_pkt->sample_rate = i;
28f2d07f	343	break;
5089a143 AZ	344	}
	345	case SR_CONF_CAPTURE_RATIO:
	346	devc->capture_ratio = g_variant_get_uint64(data);
28f2d07f	347	break;
5089a143 AZ	348	case SR_CONF_LIMIT_SAMPLES: {
	349	uint64_t number_samples = g_variant_get_uint64(data);
	350	number_samples += 511;
	351	number_samples &= 0xfffffe00;
4b75f84c AV	352	if (number_samples < H4043L_NUM_SAMPLES_MIN \|\|
4b75f84c AV	353	number_samples > H4032L_NUM_SAMPLES_MAX) {
4868f15a UH	354	sr_err("Invalid sample range 2k...64M: %"
4868f15a UH	355	PRIu64 ".", number_samples);
5089a143 AZ	356	return SR_ERR;
	357	}
	358	cmd_pkt->sample_size = number_samples;
28f2d07f	359	break;
5089a143 AZ	360	}
	361	case SR_CONF_VOLTAGE_THRESHOLD: {
	362	double d1, d2;
	363	g_variant_get(data, "(dd)", &d1, &d2);
	364	devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(d1);
	365	devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(d2);
28f2d07f	366	break;
5089a143	367	}
28f2d07f AV	368	default:
28f2d07f AV	369	return SR_ERR_NA;
6a25fa42 AZ	370	}
6a25fa42 AZ	371
28f2d07f	372	return SR_OK;
6a25fa42 AZ	373	}
	374
	375	static int config_list(uint32_t key, GVariant **data,
	376	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
	377	{
6a25fa42	378	switch (key) {
5089a143 AZ	379	case SR_CONF_SCAN_OPTIONS:
	380	case SR_CONF_DEVICE_OPTIONS:
	381	return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
	382	case SR_CONF_SAMPLERATE:
	383	*data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
	384	break;
	385	case SR_CONF_TRIGGER_MATCH:
	386	*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
	387	break;
	388	case SR_CONF_VOLTAGE_THRESHOLD:
	389	*data = std_gvar_tuple_double(2.5, 2.5);
	390	break;
4b75f84c AV	391	case SR_CONF_LIMIT_SAMPLES:
	392	*data = std_gvar_tuple_u64(H4043L_NUM_SAMPLES_MIN, H4032L_NUM_SAMPLES_MAX);
	393	break;
6a25fa42 AZ	394	default:
	395	return SR_ERR_NA;
	396	}
	397
5089a143	398	return SR_OK;
6a25fa42 AZ	399	}
6a25fa42 AZ	400
5089a143	401	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
6a25fa42	402	{
5089a143 AZ	403	struct sr_dev_driver *di = sdi->driver;
	404	struct drv_context *drvc = di->context;
	405	struct dev_context *devc = sdi->priv;
	406	struct sr_trigger *trigger = sr_session_trigger_get(sdi->session);
	407	struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
	408
28f2d07f	409	/* Initialize variables. */
a5b9880e	410	devc->acq_aborted = FALSE;
2958315d	411	devc->submitted_transfers = 0;
a5b9880e	412
5089a143 AZ	413	/* Calculate packet ratio. */
	414	cmd_pkt->pre_trigger_size = (cmd_pkt->sample_size * devc->capture_ratio) / 100;
	415
	416	cmd_pkt->trig_flags.enable_trigger1 = 0;
	417	cmd_pkt->trig_flags.enable_trigger2 = 0;
	418	cmd_pkt->trig_flags.trigger_and_logic = 0;
	419
	420	if (trigger && trigger->stages) {
	421	GSList *stages = trigger->stages;
	422	struct sr_trigger_stage *stage1 = stages->data;
	423	if (stages->next) {
4868f15a	424	sr_err("Only one trigger stage supported for now.");
5089a143 AZ	425	return SR_ERR;
	426	}
	427	cmd_pkt->trig_flags.enable_trigger1 = 1;
	428	cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_DISABLED;
	429	cmd_pkt->trigger[0].flags.data_range_enabled = 0;
	430	cmd_pkt->trigger[0].flags.time_range_enabled = 0;
	431	cmd_pkt->trigger[0].flags.combined_enabled = 0;
	432	cmd_pkt->trigger[0].flags.data_range_type = H4032L_TRIGGER_DATA_RANGE_TYPE_MAX;
	433	cmd_pkt->trigger[0].data_range_mask = 0;
	434	cmd_pkt->trigger[0].data_range_max = 0;
	435
	436	/* Initialize range mask values. */
	437	uint32_t range_mask = 0;
	438	uint32_t range_value = 0;
	439
	440	GSList *channel = stage1->matches;
	441	while (channel) {
	442	struct sr_trigger_match *match = channel->data;
	443
	444	switch (match->match) {
	445	case SR_TRIGGER_ZERO:
	446	range_mask \|= (1 << match->channel->index);
	447	break;
	448	case SR_TRIGGER_ONE:
	449	range_mask \|= (1 << match->channel->index);
	450	range_value \|= (1 << match->channel->index);
	451	break;
	452	case SR_TRIGGER_RISING:
	453	if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a	454	sr_err("Only one trigger signal with fall/rising/edge allowed.");
5089a143 AZ	455	return SR_ERR;
	456	}
	457	cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_RISE;
	458	cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
	459	break;
	460	case SR_TRIGGER_FALLING:
	461	if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a	462	sr_err("Only one trigger signal with fall/rising/edge allowed.");
5089a143 AZ	463	return SR_ERR;
	464	}
	465	cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_FALL;
	466	cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
	467	break;
	468	case SR_TRIGGER_EDGE:
	469	if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a	470	sr_err("Only one trigger signal with fall/rising/edge allowed.");
5089a143 AZ	471	return SR_ERR;
	472	}
	473	cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_TOGGLE;
	474	cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
	475	break;
	476	default:
4868f15a	477	sr_err("Unknown trigger value.");
5089a143 AZ	478	return SR_ERR;
	479	}
	480
	481	channel = channel->next;
	482	}
	483
	484	/* Compress range mask value and apply range settings. */
	485	if (range_mask) {
	486	cmd_pkt->trigger[0].flags.data_range_enabled = 1;
	487	cmd_pkt->trigger[0].data_range_mask \|= (range_mask);
	488
	489	uint32_t new_range_value = 0;
	490	uint32_t bit_mask = 1;
	491	while (range_mask) {
	492	if ((range_mask & 1) != 0) {
	493	new_range_value <<= 1;
	494	if ((range_value & 1) != 0)
	495	new_range_value \|= bit_mask;
	496	bit_mask <<= 1;
	497	}
	498	range_mask >>= 1;
	499	range_value >>= 1;
	500	}
	501	cmd_pkt->trigger[0].data_range_max \|= range_value;
	502	}
	503	}
6a25fa42	504
74c4c174	505	usb_source_add(sdi->session, drvc->sr_ctx, 1000,
5089a143	506	h4032l_receive_data, sdi->driver->context);
6a25fa42	507
5089a143 AZ	508	/* Start capturing. */
5089a143 AZ	509	return h4032l_start(sdi);
6a25fa42 AZ	510	}
6a25fa42 AZ	511
5089a143	512	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
6a25fa42	513	{
2958315d AV	514	/* Stop capturing. */
2958315d AV	515	return h4032l_stop(sdi);
6a25fa42 AZ	516	}
	517
	518	SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = {
	519	.name = "hantek-4032l",
5089a143	520	.longname = "Hantek 4032L",
6a25fa42	521	.api_version = 1,
5089a143 AZ	522	.init = std_init,
5089a143 AZ	523	.cleanup = std_cleanup,
6a25fa42	524	.scan = scan,
5089a143 AZ	525	.dev_list = std_dev_list,
5089a143 AZ	526	.dev_clear = std_dev_clear,
6a25fa42 AZ	527	.config_get = config_get,
	528	.config_set = config_set,
	529	.config_list = config_list,
	530	.dev_open = dev_open,
	531	.dev_close = dev_close,
	532	.dev_acquisition_start = dev_acquisition_start,
	533	.dev_acquisition_stop = dev_acquisition_stop,
	534	.context = NULL,
	535	};
5089a143	536	SR_REGISTER_DEV_DRIVER(hantek_4032l_driver_info);