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hantek-4032l: Increase speed of data getting.
[libsigrok.git] / src / hardware / hantek-4032l / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
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4 * Copyright (C) 2016 Andreas Zschunke <andreas.zschunke@gmx.net>
5 * Copyright (C) 2017 Andrej Valek <andy@skyrain.eu>
6 * Copyright (C) 2017 Uwe Hermann <uwe@hermann-uwe.de>
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7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include "protocol.h"
24
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25#define USB_INTERFACE 0
26#define NUM_CHANNELS 32
6a25fa42 27
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28static const uint32_t scanopts[] = {
29 SR_CONF_CONN,
30};
31
32static const uint32_t drvopts[] = {
33 SR_CONF_LOGIC_ANALYZER,
34};
35
36static const uint32_t devopts[] = {
37 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
38 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
39 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
40 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
41 SR_CONF_CONN | SR_CONF_GET,
42 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_SET | SR_CONF_LIST,
43};
44
45static const int32_t trigger_matches[] = {
46 SR_TRIGGER_ZERO,
47 SR_TRIGGER_ONE,
48 SR_TRIGGER_RISING,
49 SR_TRIGGER_FALLING,
50 SR_TRIGGER_EDGE,
51};
52
53static const uint64_t samplerates[] = {
54 SR_KHZ(1),
55 SR_KHZ(2),
56 SR_KHZ(4),
57 SR_KHZ(8),
58 SR_KHZ(16),
59 SR_HZ(31250),
60 SR_HZ(62500),
61 SR_KHZ(125),
62 SR_KHZ(250),
63 SR_KHZ(500),
64 SR_KHZ(625),
65 SR_HZ(781250),
66 SR_MHZ(1),
67 SR_KHZ(1250),
68 SR_HZ(1562500),
69 SR_MHZ(2),
70 SR_KHZ(2500),
71 SR_KHZ(3125),
72 SR_MHZ(4),
73 SR_MHZ(5),
74 SR_KHZ(6250),
75 SR_MHZ(10),
76 SR_KHZ(12500),
77 SR_MHZ(20),
78 SR_MHZ(25),
79 SR_MHZ(40),
80 SR_MHZ(50),
81 SR_MHZ(80),
82 SR_MHZ(100),
83 SR_MHZ(160),
84 SR_MHZ(200),
85 SR_MHZ(320),
86 SR_MHZ(400),
87};
88
89static const uint64_t samplerates_hw[] = {
90 SR_MHZ(100),
91 SR_MHZ(50),
92 SR_MHZ(25),
93 SR_KHZ(12500),
94 SR_KHZ(6250),
95 SR_KHZ(3125),
96 SR_HZ(1562500),
97 SR_HZ(781250),
98 SR_MHZ(80),
99 SR_MHZ(40),
100 SR_MHZ(20),
101 SR_MHZ(10),
102 SR_MHZ(5),
103 SR_KHZ(2500),
104 SR_KHZ(1250),
105 SR_KHZ(625),
106 SR_MHZ(4),
107 SR_MHZ(2),
108 SR_MHZ(1),
109 SR_KHZ(500),
110 SR_KHZ(250),
111 SR_KHZ(125),
112 SR_HZ(62500),
113 SR_HZ(31250),
114 SR_KHZ(16),
115 SR_KHZ(8),
116 SR_KHZ(4),
117 SR_KHZ(2),
118 SR_KHZ(1),
119 0,
120 0,
121 0,
122 SR_MHZ(200),
123 SR_MHZ(160),
124 SR_MHZ(400),
125 SR_MHZ(320),
126};
127
128SR_PRIV struct sr_dev_driver hantek_4032l_driver_info;
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129
130static GSList *scan(struct sr_dev_driver *di, GSList *options)
131{
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132 struct drv_context *drvc = di->context;
133 GSList *l, *devices, *conn_devices;
134 libusb_device **devlist;
135 struct libusb_device_descriptor des;
136 const char *conn;
137 int i;
138 char connection_id[64];
139 struct sr_channel_group *cg;
140 struct sr_dev_inst *sdi;
141 struct sr_channel *ch;
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142
143 devices = NULL;
5089a143 144 conn_devices = NULL;
6a25fa42 145 drvc->instances = NULL;
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146 conn = NULL;
147
148 for (l = options; l; l = l->next) {
149 struct sr_config *src = l->data;
150 if (src->key == SR_CONF_CONN) {
151 conn = g_variant_get_string(src->data, NULL);
152 break;
153 }
154 }
6a25fa42 155
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156 if (conn)
157 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
158 else
159 conn_devices = NULL;
160
161 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
162 for (i = 0; devlist[i]; i++) {
163 if (conn) {
164 struct sr_usb_dev_inst *usb = NULL;
165 for (l = conn_devices; l; l = l->next) {
166 usb = l->data;
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167 if (usb->bus == libusb_get_bus_number(devlist[i]) &&
168 usb->address == libusb_get_device_address(devlist[i]))
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169 break;
170 }
171 if (!l)
172 /* This device matched none of the ones that
173 * matched the conn specification. */
174 continue;
175 }
176
177 libusb_get_device_descriptor(devlist[i], &des);
178
179 if (des.idVendor != H4032L_USB_VENDOR ||
180 des.idProduct != H4032L_USB_PRODUCT)
181 continue;
182
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183 if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
184 continue;
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185
186 sdi = g_malloc0(sizeof(struct sr_dev_inst));
187 sdi->driver = &hantek_4032l_driver_info;
188 sdi->vendor = g_strdup("Hantek");
189 sdi->model = g_strdup("4032L");
190 sdi->connection_id = g_strdup(connection_id);
191
192 struct sr_channel_group *channel_groups[2];
193 for (int j = 0; j < 2; j++) {
194 cg = g_malloc0(sizeof(struct sr_channel_group));
195 cg->name = g_strdup_printf("%c", 'A' + j);
196 channel_groups[j] = cg;
197 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
198 }
199
200 /* Assemble channel list and add channel to channel groups. */
201 for (int j = 0; j < NUM_CHANNELS; j++) {
202 char channel_name[4];
203 sprintf(channel_name, "%c%d", 'A' + (j & 1), j / 2);
204 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_name);
205 cg = channel_groups[j & 1];
206 cg->channels = g_slist_append(cg->channels, ch);
207 }
208
209 struct dev_context *devc = g_malloc0(sizeof(struct dev_context));
210
211 /* Initialize command packet. */
212 devc->cmd_pkt.magic = H4032L_CMD_PKT_MAGIC;
213 devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(2.5);
214 devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(2.5);
215 devc->cmd_pkt.sample_size = 16384;
216 devc->cmd_pkt.pre_trigger_size = 1024;
217
218 devc->status = H4032L_STATUS_IDLE;
219
220 devc->capture_ratio = 5;
221
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222 sdi->priv = devc;
223 devices = g_slist_append(devices, sdi);
224
225 sdi->status = SR_ST_INACTIVE;
226 sdi->inst_type = SR_INST_USB;
227 sdi->conn = sr_usb_dev_inst_new(
228 libusb_get_bus_number(devlist[i]),
229 libusb_get_device_address(devlist[i]), NULL);
230 }
6a25fa42 231
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232 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
233 libusb_free_device_list(devlist, 1);
6a25fa42 234
5089a143 235 return std_scan_complete(di, devices);
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236}
237
238static int dev_open(struct sr_dev_inst *sdi)
239{
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240 struct sr_usb_dev_inst *usb = sdi->conn;
241 int ret;
6a25fa42 242
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243 ret = h4032l_dev_open(sdi);
244 if (ret != SR_OK) {
245 sr_err("Unable to open device.");
246 return SR_ERR;
247 }
6a25fa42 248
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249 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
250 if (ret != 0) {
251 switch (ret) {
252 case LIBUSB_ERROR_BUSY:
253 sr_err("Unable to claim USB interface. Another "
254 "program or driver has already claimed it.");
255 break;
256 case LIBUSB_ERROR_NO_DEVICE:
257 sr_err("Device has been disconnected.");
258 break;
259 default:
260 sr_err("Unable to claim interface: %s.",
261 libusb_error_name(ret));
262 break;
263 }
264
265 return SR_ERR;
266 }
6a25fa42 267
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268 /* Get FPGA version. */
269 if ((ret = h4032l_get_fpga_version(sdi)) != SR_OK)
270 return ret;
271
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272 return SR_OK;
273}
274
275static int dev_close(struct sr_dev_inst *sdi)
276{
5089a143 277 struct sr_usb_dev_inst *usb;
6a25fa42 278
5089a143 279 usb = sdi->conn;
6a25fa42 280
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281 if (!usb->devhdl)
282 return SR_ERR_BUG;
6a25fa42 283
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284 sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.",
285 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
286 libusb_release_interface(usb->devhdl, USB_INTERFACE);
287 libusb_close(usb->devhdl);
288 usb->devhdl = NULL;
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289
290 return SR_OK;
291}
292
293static int config_get(uint32_t key, GVariant **data,
294 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
295{
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296 struct dev_context *devc = sdi->priv;
297 struct sr_usb_dev_inst *usb;
6a25fa42 298
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299 (void)cg;
300
6a25fa42 301 switch (key) {
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302 case SR_CONF_SAMPLERATE:
303 *data = g_variant_new_uint64(samplerates_hw[devc->cmd_pkt.sample_rate]);
304 break;
305 case SR_CONF_CAPTURE_RATIO:
306 *data = g_variant_new_uint64(devc->capture_ratio);
307 break;
308 case SR_CONF_LIMIT_SAMPLES:
309 *data = g_variant_new_uint64(devc->cmd_pkt.sample_size);
310 break;
311 case SR_CONF_CONN:
312 if (!sdi || !(usb = sdi->conn))
313 return SR_ERR_ARG;
314 *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
315 break;
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316 default:
317 return SR_ERR_NA;
318 }
319
5089a143 320 return SR_OK;
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321}
322
323static int config_set(uint32_t key, GVariant *data,
324 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
325{
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326 struct dev_context *devc = sdi->priv;
327 struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
6a25fa42 328
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329 (void)cg;
330
6a25fa42 331 switch (key) {
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332 case SR_CONF_SAMPLERATE: {
333 uint64_t sample_rate = g_variant_get_uint64(data);
334 uint8_t i = 0;
335 while (i < ARRAY_SIZE(samplerates_hw) && samplerates_hw[i] != sample_rate)
336 i++;
337
338 if (i == ARRAY_SIZE(samplerates_hw) || sample_rate == 0) {
4868f15a 339 sr_err("Invalid sample rate.");
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340 return SR_ERR_SAMPLERATE;
341 }
342 cmd_pkt->sample_rate = i;
28f2d07f 343 break;
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344 }
345 case SR_CONF_CAPTURE_RATIO:
346 devc->capture_ratio = g_variant_get_uint64(data);
28f2d07f 347 break;
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348 case SR_CONF_LIMIT_SAMPLES: {
349 uint64_t number_samples = g_variant_get_uint64(data);
350 number_samples += 511;
351 number_samples &= 0xfffffe00;
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352 if (number_samples < 2048 ||
353 number_samples > 64 * 1024 * 1024) {
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354 sr_err("Invalid sample range 2k...64M: %"
355 PRIu64 ".", number_samples);
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356 return SR_ERR;
357 }
358 cmd_pkt->sample_size = number_samples;
28f2d07f 359 break;
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360 }
361 case SR_CONF_VOLTAGE_THRESHOLD: {
362 double d1, d2;
363 g_variant_get(data, "(dd)", &d1, &d2);
364 devc->cmd_pkt.pwm_a = h4032l_voltage2pwm(d1);
365 devc->cmd_pkt.pwm_b = h4032l_voltage2pwm(d2);
28f2d07f 366 break;
5089a143 367 }
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368 default:
369 return SR_ERR_NA;
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370 }
371
28f2d07f 372 return SR_OK;
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373}
374
375static int config_list(uint32_t key, GVariant **data,
376 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
377{
6a25fa42 378 switch (key) {
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379 case SR_CONF_SCAN_OPTIONS:
380 case SR_CONF_DEVICE_OPTIONS:
381 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
382 case SR_CONF_SAMPLERATE:
383 *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
384 break;
385 case SR_CONF_TRIGGER_MATCH:
386 *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
387 break;
388 case SR_CONF_VOLTAGE_THRESHOLD:
389 *data = std_gvar_tuple_double(2.5, 2.5);
390 break;
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391 default:
392 return SR_ERR_NA;
393 }
394
5089a143 395 return SR_OK;
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396}
397
5089a143 398static int dev_acquisition_start(const struct sr_dev_inst *sdi)
6a25fa42 399{
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400 struct sr_dev_driver *di = sdi->driver;
401 struct drv_context *drvc = di->context;
402 struct dev_context *devc = sdi->priv;
403 struct sr_trigger *trigger = sr_session_trigger_get(sdi->session);
404 struct h4032l_cmd_pkt *cmd_pkt = &devc->cmd_pkt;
405
28f2d07f 406 /* Initialize variables. */
a5b9880e 407 devc->acq_aborted = FALSE;
2958315d 408 devc->submitted_transfers = 0;
a5b9880e 409
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410 /* Calculate packet ratio. */
411 cmd_pkt->pre_trigger_size = (cmd_pkt->sample_size * devc->capture_ratio) / 100;
412
413 cmd_pkt->trig_flags.enable_trigger1 = 0;
414 cmd_pkt->trig_flags.enable_trigger2 = 0;
415 cmd_pkt->trig_flags.trigger_and_logic = 0;
416
417 if (trigger && trigger->stages) {
418 GSList *stages = trigger->stages;
419 struct sr_trigger_stage *stage1 = stages->data;
420 if (stages->next) {
4868f15a 421 sr_err("Only one trigger stage supported for now.");
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422 return SR_ERR;
423 }
424 cmd_pkt->trig_flags.enable_trigger1 = 1;
425 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_DISABLED;
426 cmd_pkt->trigger[0].flags.data_range_enabled = 0;
427 cmd_pkt->trigger[0].flags.time_range_enabled = 0;
428 cmd_pkt->trigger[0].flags.combined_enabled = 0;
429 cmd_pkt->trigger[0].flags.data_range_type = H4032L_TRIGGER_DATA_RANGE_TYPE_MAX;
430 cmd_pkt->trigger[0].data_range_mask = 0;
431 cmd_pkt->trigger[0].data_range_max = 0;
432
433 /* Initialize range mask values. */
434 uint32_t range_mask = 0;
435 uint32_t range_value = 0;
436
437 GSList *channel = stage1->matches;
438 while (channel) {
439 struct sr_trigger_match *match = channel->data;
440
441 switch (match->match) {
442 case SR_TRIGGER_ZERO:
443 range_mask |= (1 << match->channel->index);
444 break;
445 case SR_TRIGGER_ONE:
446 range_mask |= (1 << match->channel->index);
447 range_value |= (1 << match->channel->index);
448 break;
449 case SR_TRIGGER_RISING:
450 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a 451 sr_err("Only one trigger signal with fall/rising/edge allowed.");
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452 return SR_ERR;
453 }
454 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_RISE;
455 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
456 break;
457 case SR_TRIGGER_FALLING:
458 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a 459 sr_err("Only one trigger signal with fall/rising/edge allowed.");
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460 return SR_ERR;
461 }
462 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_FALL;
463 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
464 break;
465 case SR_TRIGGER_EDGE:
466 if (cmd_pkt->trigger[0].flags.edge_type != H4032L_TRIGGER_EDGE_TYPE_DISABLED) {
4868f15a 467 sr_err("Only one trigger signal with fall/rising/edge allowed.");
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468 return SR_ERR;
469 }
470 cmd_pkt->trigger[0].flags.edge_type = H4032L_TRIGGER_EDGE_TYPE_TOGGLE;
471 cmd_pkt->trigger[0].flags.edge_signal = match->channel->index;
472 break;
473 default:
4868f15a 474 sr_err("Unknown trigger value.");
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475 return SR_ERR;
476 }
477
478 channel = channel->next;
479 }
480
481 /* Compress range mask value and apply range settings. */
482 if (range_mask) {
483 cmd_pkt->trigger[0].flags.data_range_enabled = 1;
484 cmd_pkt->trigger[0].data_range_mask |= (range_mask);
485
486 uint32_t new_range_value = 0;
487 uint32_t bit_mask = 1;
488 while (range_mask) {
489 if ((range_mask & 1) != 0) {
490 new_range_value <<= 1;
491 if ((range_value & 1) != 0)
492 new_range_value |= bit_mask;
493 bit_mask <<= 1;
494 }
495 range_mask >>= 1;
496 range_value >>= 1;
497 }
498 cmd_pkt->trigger[0].data_range_max |= range_value;
499 }
500 }
6a25fa42 501
74c4c174 502 usb_source_add(sdi->session, drvc->sr_ctx, 1000,
5089a143 503 h4032l_receive_data, sdi->driver->context);
6a25fa42 504
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505 /* Start capturing. */
506 return h4032l_start(sdi);
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507}
508
5089a143 509static int dev_acquisition_stop(struct sr_dev_inst *sdi)
6a25fa42 510{
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511 /* Stop capturing. */
512 return h4032l_stop(sdi);
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513}
514
515SR_PRIV struct sr_dev_driver hantek_4032l_driver_info = {
516 .name = "hantek-4032l",
5089a143 517 .longname = "Hantek 4032L",
6a25fa42 518 .api_version = 1,
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519 .init = std_init,
520 .cleanup = std_cleanup,
6a25fa42 521 .scan = scan,
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522 .dev_list = std_dev_list,
523 .dev_clear = std_dev_clear,
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524 .config_get = config_get,
525 .config_set = config_set,
526 .config_list = config_list,
527 .dev_open = dev_open,
528 .dev_close = dev_close,
529 .dev_acquisition_start = dev_acquisition_start,
530 .dev_acquisition_stop = dev_acquisition_stop,
531 .context = NULL,
532};
5089a143 533SR_REGISTER_DEV_DRIVER(hantek_4032l_driver_info);