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f302a082 1/*
50985c20 2 * This file is part of the libsigrok project.
f302a082 3 *
13d8e03c 4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f302a082
JH
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
2f937611 22#include "protocol.h"
b9d53092 23#include "dslogic.h"
3fc3fbe4 24#include <math.h>
f302a082 25
4679d14d 26static const struct fx2lafw_profile supported_fx2[] = {
7ae2f9d5
UH
27 /*
28 * CWAV USBee AX
17b6c75a 29 * EE Electronics ESLA201A
9f05304e 30 * ARMFLY AX-Pro
17b6c75a 31 */
f8b07fc6 32 { 0x08a9, 0x0014, "CWAV", "USBee AX", NULL,
8e2d6c9d 33 "fx2lafw-cwav-usbeeax.fw",
232a975f 34 DEV_CAPS_AX_ANALOG, NULL, NULL},
0e8d0e24
IF
35 /*
36 * CWAV USBee DX
37 * XZL-Studio DX
38 */
39 { 0x08a9, 0x0015, "CWAV", "USBee DX", NULL,
8e2d6c9d 40 "fx2lafw-cwav-usbeedx.fw",
e826239c 41 DEV_CAPS_16BIT, NULL, NULL },
93a9f3da 42
7ae2f9d5
UH
43 /*
44 * CWAV USBee SX
4502e869
JH
45 */
46 { 0x08a9, 0x0009, "CWAV", "USBee SX", NULL,
8e2d6c9d 47 "fx2lafw-cwav-usbeesx.fw",
e826239c 48 0, NULL, NULL},
4502e869 49
2f4b0f6a
T
50 /*
51 * CWAV USBee ZX
52 */
53 { 0x08a9, 0x0005, "CWAV", "USBee ZX", NULL,
54 "fx2lafw-cwav-usbeezx.fw",
55 0, NULL, NULL},
56
b7c53d48 57 /* DreamSourceLab DSLogic (before FW upload) */
a7d7f93c 58 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 59 "dreamsourcelab-dslogic-fx2.fw",
8a68f96e 60 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
b7c53d48 61 /* DreamSourceLab DSLogic (after FW upload) */
a7d7f93c 62 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 63 "dreamsourcelab-dslogic-fx2.fw",
8a68f96e 64 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
a7d7f93c 65
b7c53d48
DG
66 /* DreamSourceLab DSCope (before FW upload) */
67 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 68 "dreamsourcelab-dscope-fx2.fw",
8a68f96e 69 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
b7c53d48
DG
70 /* DreamSourceLab DSCope (after FW upload) */
71 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 72 "dreamsourcelab-dscope-fx2.fw",
8a68f96e 73 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSCope"},
b7c53d48
DG
74
75 /* DreamSourceLab DSLogic Pro (before FW upload) */
76 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 77 "dreamsourcelab-dslogic-pro-fx2.fw",
8a68f96e 78 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
b7c53d48
DG
79 /* DreamSourceLab DSLogic Pro (after FW upload) */
80 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 81 "dreamsourcelab-dslogic-pro-fx2.fw",
8a68f96e 82 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
b7c53d48 83
c33f32a9
JH
84 /* DreamSourceLab DSLogic Plus (before FW upload) */
85 { 0x2a0e, 0x0020, "DreamSourceLab", "DSLogic Plus", NULL,
86 "dreamsourcelab-dslogic-plus-fx2.fw",
87 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
88 /* DreamSourceLab DSLogic Plus (after FW upload) */
89 { 0x2a0e, 0x0020, "DreamSourceLab", "DSLogic Plus", NULL,
90 "dreamsourcelab-dslogic-plus-fx2.fw",
91 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
92
93 /* DreamSourceLab DSLogic Basic (before FW upload) */
94 { 0x2a0e, 0x0021, "DreamSourceLab", "DSLogic Basic", NULL,
95 "dreamsourcelab-dslogic-basic-fx2.fw",
96 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, NULL, NULL},
97 /* DreamSourceLab DSLogic Basic (after FW upload) */
98 { 0x2a0e, 0x0021, "DreamSourceLab", "DSLogic Basic", NULL,
99 "dreamsourcelab-dslogic-basic-fx2.fw",
100 DEV_CAPS_16BIT | DEV_CAPS_DSLOGIC_FW, "DreamSourceLab", "DSLogic"},
101
7ae2f9d5
UH
102 /*
103 * Saleae Logic
93a9f3da
JH
104 * EE Electronics ESLA100
105 * Robomotic MiniLogic
1663e470 106 * Robomotic BugLogic 3
93a9f3da
JH
107 */
108 { 0x0925, 0x3881, "Saleae", "Logic", NULL,
8e2d6c9d 109 "fx2lafw-saleae-logic.fw",
e826239c 110 0, NULL, NULL},
93a9f3da 111
f488762a 112 /*
1663e470
UH
113 * Default Cypress FX2 without EEPROM, e.g.:
114 * Lcsoft Mini Board
115 * Braintechnology USB Interface V2.x
f488762a
JH
116 */
117 { 0x04B4, 0x8613, "Cypress", "FX2", NULL,
8e2d6c9d 118 "fx2lafw-cypress-fx2.fw",
e826239c 119 DEV_CAPS_16BIT, NULL, NULL },
f488762a 120
1663e470
UH
121 /*
122 * Braintechnology USB-LPS
123 */
124 { 0x16d0, 0x0498, "Braintechnology", "USB-LPS", NULL,
8e2d6c9d 125 "fx2lafw-braintechnology-usb-lps.fw",
e826239c 126 DEV_CAPS_16BIT, NULL, NULL },
1663e470 127
3e91de2b
UH
128 /*
129 * sigrok FX2 based 8-channel logic analyzer
130 */
131 { 0x1d50, 0x608c, "sigrok", "FX2 LA (8ch)", NULL,
087c4d59 132 "fx2lafw-sigrok-fx2-8ch.fw",
3e91de2b
UH
133 0, NULL, NULL},
134
135 /*
136 * sigrok FX2 based 16-channel logic analyzer
137 */
138 { 0x1d50, 0x608d, "sigrok", "FX2 LA (16ch)", NULL,
087c4d59 139 "fx2lafw-sigrok-fx2-16ch.fw",
3e91de2b
UH
140 DEV_CAPS_16BIT, NULL, NULL },
141
1b4aedc0 142 ALL_ZERO
187b3582
JH
143};
144
ff6b76a1
BV
145static const uint32_t drvopts[] = {
146 SR_CONF_LOGIC_ANALYZER,
147};
148
a0e0bb41 149static const uint32_t scanopts[] = {
89befd46
BV
150 SR_CONF_CONN,
151};
152
f254bc4b 153static const uint32_t devopts[] = {
e91bb0a6 154 SR_CONF_CONTINUOUS,
ff6b76a1 155 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
5827f61b
BV
156 SR_CONF_CONN | SR_CONF_GET,
157 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 158 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
7bfcb25c 159 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
8b35f474
JH
160};
161
3fc3fbe4 162static const uint32_t dslogic_devopts[] = {
41dc2547 163 SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET,
3fc3fbe4
DA
164 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
165 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
166 SR_CONF_CONN | SR_CONF_GET,
167 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
168 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
169 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
ea3a77c7 170 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
9803346f 171 SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3fc3fbe4
DA
172};
173
9615eeb5
BV
174static const int32_t soft_trigger_matches[] = {
175 SR_TRIGGER_ZERO,
176 SR_TRIGGER_ONE,
335122f0
BV
177 SR_TRIGGER_RISING,
178 SR_TRIGGER_FALLING,
179 SR_TRIGGER_EDGE,
9615eeb5
BV
180};
181
9803346f 182/* Names assigned to available edge slope choices. */
d9a58763
DA
183static const char *const signal_edge_names[] = {
184 [DS_EDGE_RISING] = "rising",
185 [DS_EDGE_FALLING] = "falling",
186};
187
3fc3fbe4
DA
188static const struct {
189 int range;
190 gdouble low;
191 gdouble high;
192} volt_thresholds[] = {
9803346f
UH
193 { DS_VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
194 { DS_VOLTAGE_RANGE_5_V, 1.4, 3.6 },
3fc3fbe4
DA
195};
196
d6836bf1 197static const uint64_t samplerates[] = {
79dc6498
JH
198 SR_KHZ(20),
199 SR_KHZ(25),
897c1a2e
JH
200 SR_KHZ(50),
201 SR_KHZ(100),
9304d576
JH
202 SR_KHZ(200),
203 SR_KHZ(250),
204 SR_KHZ(500),
8b35f474
JH
205 SR_MHZ(1),
206 SR_MHZ(2),
207 SR_MHZ(3),
208 SR_MHZ(4),
209 SR_MHZ(6),
210 SR_MHZ(8),
211 SR_MHZ(12),
212 SR_MHZ(16),
772a0e61 213 SR_MHZ(24),
8b35f474
JH
214};
215
a7d7f93c
BV
216static const uint64_t dslogic_samplerates[] = {
217 SR_KHZ(10),
218 SR_KHZ(20),
219 SR_KHZ(50),
220 SR_KHZ(100),
221 SR_KHZ(200),
222 SR_KHZ(500),
223 SR_MHZ(1),
224 SR_MHZ(2),
225 SR_MHZ(5),
226 SR_MHZ(10),
227 SR_MHZ(20),
228 SR_MHZ(25),
229 SR_MHZ(50),
230 SR_MHZ(100),
231 SR_MHZ(200),
232 SR_MHZ(400),
233};
234
7087a8b0
KP
235static gboolean is_plausible(const struct libusb_device_descriptor *des)
236{
237 int i;
238
239 for (i = 0; supported_fx2[i].vid; i++) {
240 if (des->idVendor != supported_fx2[i].vid)
241 continue;
242 if (des->idProduct == supported_fx2[i].pid)
243 return TRUE;
244 }
245
246 return FALSE;
247}
248
4f840ce9 249static GSList *scan(struct sr_dev_driver *di, GSList *options)
f302a082 250{
dc9dbe94
BV
251 struct drv_context *drvc;
252 struct dev_context *devc;
754b5ff2
BV
253 struct sr_dev_inst *sdi;
254 struct sr_usb_dev_inst *usb;
7fb90f94
BL
255 struct sr_channel *ch;
256 struct sr_channel_group *cg;
754b5ff2
BV
257 struct sr_config *src;
258 const struct fx2lafw_profile *prof;
259 GSList *l, *devices, *conn_devices;
a7d7f93c 260 gboolean has_firmware;
754b5ff2 261 struct libusb_device_descriptor des;
187b3582 262 libusb_device **devlist;
e826239c 263 struct libusb_device_handle *hdl;
232a975f
JH
264 int ret, i, j;
265 int num_logic_channels = 0, num_analog_channels = 0;
754b5ff2 266 const char *conn;
5e2c86eb 267 char manufacturer[64], product[64], serial_num[64], connection_id[64];
7fb90f94 268 char channel_name[16];
3a7a22cb 269
41812aca 270 drvc = di->context;
187b3582 271
754b5ff2
BV
272 conn = NULL;
273 for (l = options; l; l = l->next) {
274 src = l->data;
275 switch (src->key) {
276 case SR_CONF_CONN:
277 conn = g_variant_get_string(src->data, NULL);
278 break;
279 }
280 }
281 if (conn)
282 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
283 else
284 conn_devices = NULL;
285
921634ec 286 /* Find all fx2lafw compatible devices and upload firmware to them. */
3a7a22cb 287 devices = NULL;
d4abb463 288 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
187b3582 289 for (i = 0; devlist[i]; i++) {
754b5ff2
BV
290 if (conn) {
291 usb = NULL;
292 for (l = conn_devices; l; l = l->next) {
293 usb = l->data;
294 if (usb->bus == libusb_get_bus_number(devlist[i])
295 && usb->address == libusb_get_device_address(devlist[i]))
296 break;
297 }
298 if (!l)
299 /* This device matched none of the ones that
300 * matched the conn specification. */
301 continue;
302 }
187b3582 303
2a8f2d41 304 libusb_get_device_descriptor( devlist[i], &des);
187b3582 305
7087a8b0
KP
306 if (!is_plausible(&des))
307 continue;
308
309 if ((ret = libusb_open(devlist[i], &hdl)) < 0) {
310 sr_warn("Failed to open potential device with "
311 "VID:PID %04x:%04x: %s.", des.idVendor,
312 des.idProduct, libusb_error_name(ret));
e826239c 313 continue;
7087a8b0 314 }
e826239c
ML
315
316 if (des.iManufacturer == 0) {
317 manufacturer[0] = '\0';
318 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
319 des.iManufacturer, (unsigned char *) manufacturer,
320 sizeof(manufacturer))) < 0) {
321 sr_warn("Failed to get manufacturer string descriptor: %s.",
322 libusb_error_name(ret));
323 continue;
324 }
325
326 if (des.iProduct == 0) {
327 product[0] = '\0';
328 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
329 des.iProduct, (unsigned char *) product,
330 sizeof(product))) < 0) {
331 sr_warn("Failed to get product string descriptor: %s.",
332 libusb_error_name(ret));
333 continue;
334 }
335
5e2c86eb
SA
336 if (des.iSerialNumber == 0) {
337 serial_num[0] = '\0';
338 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
339 des.iSerialNumber, (unsigned char *) serial_num,
340 sizeof(serial_num))) < 0) {
341 sr_warn("Failed to get serial number string descriptor: %s.",
342 libusb_error_name(ret));
343 continue;
344 }
345
346 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
347
e826239c
ML
348 libusb_close(hdl);
349
da686568 350 prof = NULL;
187b3582
JH
351 for (j = 0; supported_fx2[j].vid; j++) {
352 if (des.idVendor == supported_fx2[j].vid &&
e826239c
ML
353 des.idProduct == supported_fx2[j].pid &&
354 (!supported_fx2[j].usb_manufacturer ||
355 !strcmp(manufacturer, supported_fx2[j].usb_manufacturer)) &&
fef90b41 356 (!supported_fx2[j].usb_product ||
e826239c 357 !strcmp(product, supported_fx2[j].usb_product))) {
da686568 358 prof = &supported_fx2[j];
e826239c 359 break;
187b3582
JH
360 }
361 }
362
b99457f0 363 /* Skip if the device was not found. */
da686568 364 if (!prof)
187b3582
JH
365 continue;
366
aac29cc1 367 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
368 sdi->status = SR_ST_INITIALIZING;
369 sdi->vendor = g_strdup(prof->vendor);
370 sdi->model = g_strdup(prof->model);
371 sdi->version = g_strdup(prof->model_version);
5e2c86eb
SA
372 sdi->serial_num = g_strdup(serial_num);
373 sdi->connection_id = g_strdup(connection_id);
187b3582 374
ba7dd8bb
UH
375 /* Fill in channellist according to this device's profile. */
376 num_logic_channels = prof->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
232a975f
JH
377 num_analog_channels = prof->dev_caps & DEV_CAPS_AX_ANALOG ? 1 : 0;
378
7fb90f94
BL
379 /* Logic channels, all in one channel group. */
380 cg = g_malloc0(sizeof(struct sr_channel_group));
381 cg->name = g_strdup("Logic");
382 for (j = 0; j < num_logic_channels; j++) {
383 sprintf(channel_name, "D%d", j);
384 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC,
385 TRUE, channel_name);
386 cg->channels = g_slist_append(cg->channels, ch);
387 }
388 sdi->channel_groups = g_slist_append(NULL, cg);
389
390 for (j = 0; j < num_analog_channels; j++) {
391 snprintf(channel_name, 16, "A%d", j);
392 ch = sr_channel_new(sdi, j + num_logic_channels,
393 SR_CHANNEL_ANALOG, TRUE, channel_name);
394
395 /* Every analog channel gets its own channel group. */
396 cg = g_malloc0(sizeof(struct sr_channel_group));
397 cg->name = g_strdup(channel_name);
398 cg->channels = g_slist_append(NULL, ch);
399 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
400 }
232a975f 401
dc9dbe94
BV
402 devc = fx2lafw_dev_new();
403 devc->profile = prof;
404 sdi->priv = devc;
a8cc8e44 405 devices = g_slist_append(devices, sdi);
187b3582 406
b7c53d48
DG
407 if (!strcmp(prof->model, "DSLogic")
408 || !strcmp(prof->model, "DSLogic Pro")
c33f32a9
JH
409 || !strcmp(prof->model, "DSLogic Plus")
410 || !strcmp(prof->model, "DSLogic Basic")
b7c53d48
DG
411 || !strcmp(prof->model, "DSCope")) {
412 devc->dslogic = TRUE;
413 devc->samplerates = dslogic_samplerates;
414 devc->num_samplerates = ARRAY_SIZE(dslogic_samplerates);
69f7d9b4
JH
415 has_firmware = usb_match_manuf_prod(devlist[i], "DreamSourceLab", "DSLogic")
416 || usb_match_manuf_prod(devlist[i], "DreamSourceLab", "DSCope");
b7c53d48 417 } else {
a7d7f93c
BV
418 devc->dslogic = FALSE;
419 devc->samplerates = samplerates;
420 devc->num_samplerates = ARRAY_SIZE(samplerates);
69f7d9b4 421 has_firmware = usb_match_manuf_prod(devlist[i],
a7d7f93c 422 "sigrok", "fx2lafw");
a7d7f93c
BV
423 }
424
425 if (has_firmware) {
b1eeb67e 426 /* Already has the firmware, so fix the new address. */
f427daef 427 sr_dbg("Found an fx2lafw device.");
b1eeb67e 428 sdi->status = SR_ST_INACTIVE;
250a78c7
BV
429 sdi->inst_type = SR_INST_USB;
430 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
431 libusb_get_device_address(devlist[i]), NULL);
b1eeb67e 432 } else {
8e2d6c9d
DE
433 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
434 USB_CONFIGURATION, prof->firmware) == SR_OK)
b99457f0 435 /* Store when this device's FW was updated. */
dc9dbe94 436 devc->fw_updated = g_get_monotonic_time();
b1eeb67e 437 else
f427daef 438 sr_err("Firmware upload failed for "
5e2c86eb
SA
439 "device %d.%d (logical).",
440 libusb_get_bus_number(devlist[i]),
441 libusb_get_device_address(devlist[i]));
250a78c7 442 sdi->inst_type = SR_INST_USB;
87b545fb 443 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
250a78c7 444 0xff, NULL);
b1eeb67e 445 }
187b3582
JH
446 }
447 libusb_free_device_list(devlist, 1);
9dc7a75e 448 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
187b3582 449
15a5bfe4 450 return std_scan_complete(di, devices);
f302a082
JH
451}
452
7fb90f94
BL
453static void clear_dev_context(void *priv)
454{
455 struct dev_context *devc;
456
457 devc = priv;
458 g_slist_free(devc->enabled_analog_channels);
459 g_free(devc);
460}
461
462static int dev_clear(const struct sr_dev_driver *di)
463{
464 return std_dev_clear(di, clear_dev_context);
465}
466
6078d2c9 467static int dev_open(struct sr_dev_inst *sdi)
f302a082 468{
4f840ce9 469 struct sr_dev_driver *di = sdi->driver;
250a78c7 470 struct sr_usb_dev_inst *usb;
dc9dbe94 471 struct dev_context *devc;
2c240774 472 const char *fpga_firmware = NULL;
e8bd58ff
UH
473 int ret;
474 int64_t timediff_us, timediff_ms;
43125c69 475
dc9dbe94 476 devc = sdi->priv;
250a78c7 477 usb = sdi->conn;
43125c69
JH
478
479 /*
f60fdf6e
UH
480 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
481 * milliseconds for the FX2 to renumerate.
43125c69 482 */
3b6c1930 483 ret = SR_ERR;
dc9dbe94 484 if (devc->fw_updated > 0) {
f427daef 485 sr_info("Waiting for device to reset.");
b99457f0 486 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
43125c69 487 g_usleep(300 * 1000);
e8bd58ff 488 timediff_ms = 0;
f60fdf6e 489 while (timediff_ms < MAX_RENUM_DELAY_MS) {
2f937611 490 if ((ret = fx2lafw_dev_open(sdi, di)) == SR_OK)
43125c69
JH
491 break;
492 g_usleep(100 * 1000);
e8bd58ff 493
dc9dbe94 494 timediff_us = g_get_monotonic_time() - devc->fw_updated;
3b6c1930 495 timediff_ms = timediff_us / 1000;
b99457f0 496 sr_spew("Waited %" PRIi64 "ms.", timediff_ms);
43125c69 497 }
443a14d8
AG
498 if (ret != SR_OK) {
499 sr_err("Device failed to renumerate.");
500 return SR_ERR;
501 }
c0bf69c2 502 sr_info("Device came back after %" PRIi64 "ms.", timediff_ms);
43125c69 503 } else {
443a14d8 504 sr_info("Firmware upload was not needed.");
2f937611 505 ret = fx2lafw_dev_open(sdi, di);
43125c69
JH
506 }
507
ebc34738 508 if (ret != SR_OK) {
f427daef 509 sr_err("Unable to open device.");
43125c69
JH
510 return SR_ERR;
511 }
378abfea 512
250a78c7 513 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
ebc34738 514 if (ret != 0) {
87b545fb 515 switch (ret) {
0c156e06 516 case LIBUSB_ERROR_BUSY:
f427daef 517 sr_err("Unable to claim USB interface. Another "
b99457f0 518 "program or driver has already claimed it.");
0c156e06 519 break;
0c156e06 520 case LIBUSB_ERROR_NO_DEVICE:
f427daef 521 sr_err("Device has been disconnected.");
0c156e06 522 break;
0c156e06 523 default:
f427daef 524 sr_err("Unable to claim interface: %s.",
d4928d71 525 libusb_error_name(ret));
0c156e06
JH
526 break;
527 }
528
43125c69
JH
529 return SR_ERR;
530 }
531
a7d7f93c 532 if (devc->dslogic) {
b7c53d48 533 if (!strcmp(devc->profile->model, "DSLogic")) {
3fc3fbe4
DA
534 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V)
535 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_3V3;
536 else
537 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
538 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
b7c53d48 539 fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
c33f32a9
JH
540 } else if (!strcmp(devc->profile->model, "DSLogic Plus")){
541 fpga_firmware = DSLOGIC_PLUS_FPGA_FIRMWARE;
542 } else if (!strcmp(devc->profile->model, "DSLogic Basic")){
543 fpga_firmware = DSLOGIC_BASIC_FPGA_FIRMWARE;
b7c53d48
DG
544 } else if (!strcmp(devc->profile->model, "DSCope")) {
545 fpga_firmware = DSCOPE_FPGA_FIRMWARE;
546 }
547
3fc3fbe4 548 if ((ret = dslogic_fpga_firmware_upload(sdi, fpga_firmware)) != SR_OK)
a7d7f93c
BV
549 return ret;
550 }
dc9dbe94 551 if (devc->cur_samplerate == 0) {
f92994fd 552 /* Samplerate hasn't been set; default to the slowest one. */
a7d7f93c 553 devc->cur_samplerate = devc->samplerates[0];
f92994fd
JH
554 }
555
f302a082
JH
556 return SR_OK;
557}
558
6078d2c9 559static int dev_close(struct sr_dev_inst *sdi)
f302a082 560{
250a78c7 561 struct sr_usb_dev_inst *usb;
961009b0 562
250a78c7 563 usb = sdi->conn;
9803346f 564
98fec29e 565 if (!usb->devhdl)
25a0f108 566 return SR_ERR;
f1898235 567
5e2c86eb
SA
568 sr_info("fx2lafw: Closing device on %d.%d (logical) / %s (physical) interface %d.",
569 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
250a78c7
BV
570 libusb_release_interface(usb->devhdl, USB_INTERFACE);
571 libusb_close(usb->devhdl);
572 usb->devhdl = NULL;
25a0f108 573 sdi->status = SR_ST_INACTIVE;
f1898235 574
f302a082
JH
575 return SR_OK;
576}
577
9803346f
UH
578static int config_get(uint32_t key, GVariant **data,
579 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 580{
dc9dbe94 581 struct dev_context *devc;
89befd46 582 struct sr_usb_dev_inst *usb;
3fc3fbe4
DA
583 GVariant *range[2];
584 unsigned int i;
89befd46 585 char str[128];
8b35f474 586
53b4680f 587 (void)cg;
8f996b89 588
a920a7d8
ML
589 if (!sdi)
590 return SR_ERR_ARG;
591
592 devc = sdi->priv;
593
584560f1 594 switch (key) {
89befd46 595 case SR_CONF_CONN:
a920a7d8 596 if (!sdi->conn)
38ab8dbe 597 return SR_ERR_ARG;
89befd46
BV
598 usb = sdi->conn;
599 if (usb->address == 255)
600 /* Device still needs to re-enumerate after firmware
601 * upload, so we don't know its (future) address. */
602 return SR_ERR;
603 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
604 *data = g_variant_new_string(str);
605 break;
3fc3fbe4
DA
606 case SR_CONF_VOLTAGE_THRESHOLD:
607 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
608 if (volt_thresholds[i].range != devc->dslogic_voltage_threshold)
609 continue;
610 range[0] = g_variant_new_double(volt_thresholds[i].low);
611 range[1] = g_variant_new_double(volt_thresholds[i].high);
612 *data = g_variant_new_tuple(range, 2);
613 break;
614 }
615 break;
a920a7d8
ML
616 case SR_CONF_LIMIT_SAMPLES:
617 *data = g_variant_new_uint64(devc->limit_samples);
618 break;
123e1313 619 case SR_CONF_SAMPLERATE:
89befd46 620 *data = g_variant_new_uint64(devc->cur_samplerate);
6e9339aa 621 break;
7bfcb25c
AJ
622 case SR_CONF_CAPTURE_RATIO:
623 *data = g_variant_new_uint64(devc->capture_ratio);
624 break;
ea3a77c7
DA
625 case SR_CONF_EXTERNAL_CLOCK:
626 *data = g_variant_new_boolean(devc->dslogic_external_clock);
627 break;
41dc2547
DA
628 case SR_CONF_CONTINUOUS:
629 *data = g_variant_new_boolean(devc->dslogic_continuous_mode);
630 break;
d9a58763
DA
631 case SR_CONF_CLOCK_EDGE:
632 i = devc->dslogic_clock_edge;
633 if (i >= ARRAY_SIZE(signal_edge_names))
634 return SR_ERR_BUG;
9803346f 635 *data = g_variant_new_string(signal_edge_names[0]);
d9a58763 636 break;
6e9339aa 637 default:
bd6fbf62 638 return SR_ERR_NA;
8b35f474
JH
639 }
640
6e9339aa 641 return SR_OK;
f302a082
JH
642}
643
9803346f
UH
644/*
645 * Helper for mapping a string-typed configuration value to an index
d9a58763
DA
646 * within a table of possible values.
647 */
648static int lookup_index(GVariant *value, const char *const *table, int len)
649{
650 const char *entry;
651 int i;
652
653 entry = g_variant_get_string(value, NULL);
654 if (!entry)
655 return -1;
656
657 /* Linear search is fine for very small tables. */
658 for (i = 0; i < len; i++) {
659 if (strcmp(entry, table[i]) == 0)
660 return i;
661 }
662
663 return -1;
664}
665
9803346f
UH
666static int config_set(uint32_t key, GVariant *data,
667 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 668{
dc9dbe94 669 struct dev_context *devc;
4d7b36a0 670 uint64_t arg;
65e00366 671 int i, ret;
3fc3fbe4 672 gdouble low, high;
7cb621d4 673
53b4680f 674 (void)cg;
8f996b89 675
1c48000d
ML
676 if (!sdi)
677 return SR_ERR_ARG;
678
e73ffd42
BV
679 if (sdi->status != SR_ST_ACTIVE)
680 return SR_ERR;
681
dc9dbe94 682 devc = sdi->priv;
7cb621d4 683
1c48000d
ML
684 ret = SR_OK;
685
584560f1 686 switch (key) {
93b118da
UH
687 case SR_CONF_SAMPLERATE:
688 arg = g_variant_get_uint64(data);
65e00366
CFS
689 for (i = 0; i < devc->num_samplerates; i++) {
690 if (devc->samplerates[i] == arg) {
93b118da
UH
691 devc->cur_samplerate = arg;
692 break;
4d7b36a0 693 }
93b118da 694 }
65e00366 695 if (i == devc->num_samplerates)
93b118da
UH
696 ret = SR_ERR_ARG;
697 break;
698 case SR_CONF_LIMIT_SAMPLES:
699 devc->limit_samples = g_variant_get_uint64(data);
700 break;
701 case SR_CONF_CAPTURE_RATIO:
702 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 703 ret = (devc->capture_ratio > 100) ? SR_ERR : SR_OK;
93b118da 704 break;
3fc3fbe4
DA
705 case SR_CONF_VOLTAGE_THRESHOLD:
706 g_variant_get(data, "(dd)", &low, &high);
707 ret = SR_ERR_ARG;
708 for (i = 0; (unsigned int)i < ARRAY_SIZE(volt_thresholds); i++) {
709 if (fabs(volt_thresholds[i].low - low) < 0.1 &&
710 fabs(volt_thresholds[i].high - high) < 0.1) {
711 devc->dslogic_voltage_threshold = volt_thresholds[i].range;
712 break;
713 }
714 }
715 if (!strcmp(devc->profile->model, "DSLogic")) {
716 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_5_V)
717 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_5V);
718 else
719 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
9803346f 720 } else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
3fc3fbe4 721 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
c33f32a9
JH
722 } else if (!strcmp(devc->profile->model, "DSLogic Plus")) {
723 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PLUS_FPGA_FIRMWARE);
724 } else if (!strcmp(devc->profile->model, "DSLogic Basic")) {
725 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_BASIC_FPGA_FIRMWARE);
3fc3fbe4
DA
726 }
727 break;
ea3a77c7
DA
728 case SR_CONF_EXTERNAL_CLOCK:
729 devc->dslogic_external_clock = g_variant_get_boolean(data);
730 break;
41dc2547
DA
731 case SR_CONF_CONTINUOUS:
732 devc->dslogic_continuous_mode = g_variant_get_boolean(data);
733 break;
d9a58763
DA
734 case SR_CONF_CLOCK_EDGE:
735 i = lookup_index(data, signal_edge_names,
736 ARRAY_SIZE(signal_edge_names));
737 if (i < 0)
738 return SR_ERR_ARG;
739 devc->dslogic_clock_edge = i;
176d785d 740 break;
93b118da
UH
741 default:
742 ret = SR_ERR_NA;
7cb621d4
JH
743 }
744
745 return ret;
f302a082
JH
746}
747
9803346f
UH
748static int config_list(uint32_t key, GVariant **data,
749 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 750{
a7d7f93c 751 struct dev_context *devc;
3fc3fbe4 752 GVariant *gvar, *range[2];
d6836bf1 753 GVariantBuilder gvb;
3fc3fbe4 754 unsigned int i;
a1c743fc 755
53b4680f 756 (void)cg;
a1c743fc
BV
757
758 switch (key) {
89befd46 759 case SR_CONF_SCAN_OPTIONS:
584560f1 760 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 761 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
89befd46 762 break;
9a6517d1 763 case SR_CONF_DEVICE_OPTIONS:
9803346f 764 if (!sdi) {
ff6b76a1 765 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
9803346f
UH
766 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
767 } else {
3fc3fbe4
DA
768 devc = sdi->priv;
769 if (!devc->dslogic)
770 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
771 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
772 else
773 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
774 dslogic_devopts, ARRAY_SIZE(dslogic_devopts), sizeof(uint32_t));
775 }
776 break;
777 case SR_CONF_VOLTAGE_THRESHOLD:
9803346f
UH
778 if (!sdi->priv)
779 return SR_ERR_ARG;
3fc3fbe4 780 devc = sdi->priv;
9803346f
UH
781 if (!devc->dslogic)
782 return SR_ERR_NA;
3fc3fbe4
DA
783 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
784 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
785 range[0] = g_variant_new_double(volt_thresholds[i].low);
786 range[1] = g_variant_new_double(volt_thresholds[i].high);
787 gvar = g_variant_new_tuple(range, 2);
788 g_variant_builder_add_value(&gvb, gvar);
789 }
790 *data = g_variant_builder_end(&gvb);
9a6517d1 791 break;
a1c743fc 792 case SR_CONF_SAMPLERATE:
a7d7f93c 793 devc = sdi->priv;
d6836bf1 794 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
a7d7f93c
BV
795 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), devc->samplerates,
796 devc->num_samplerates, sizeof(uint64_t));
d6836bf1
BV
797 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
798 *data = g_variant_builder_end(&gvb);
a1c743fc 799 break;
9615eeb5
BV
800 case SR_CONF_TRIGGER_MATCH:
801 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
802 soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
803 sizeof(int32_t));
c50277a6 804 break;
d9a58763
DA
805 case SR_CONF_CLOCK_EDGE:
806 *data = g_variant_new_strv(signal_edge_names,
807 ARRAY_SIZE(signal_edge_names));
808 break;
a1c743fc 809 default:
bd6fbf62 810 return SR_ERR_NA;
a1c743fc
BV
811 }
812
813 return SR_OK;
814}
815
1f9813eb 816static int receive_data(int fd, int revents, void *cb_data)
610dbb70
JH
817{
818 struct timeval tv;
b99457f0 819 struct drv_context *drvc;
610dbb70 820
610dbb70
JH
821 (void)fd;
822 (void)revents;
610dbb70 823
1a863916 824 drvc = (struct drv_context *)cb_data;
b99457f0 825
610dbb70 826 tv.tv_sec = tv.tv_usec = 0;
d4abb463 827 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
610dbb70
JH
828
829 return TRUE;
830}
831
b9d53092 832static int start_transfers(const struct sr_dev_inst *sdi)
f302a082 833{
dc9dbe94 834 struct dev_context *devc;
250a78c7 835 struct sr_usb_dev_inst *usb;
335122f0 836 struct sr_trigger *trigger;
610dbb70 837 struct libusb_transfer *transfer;
b9d53092
BV
838 unsigned int i, num_transfers;
839 int endpoint, timeout, ret;
610dbb70 840 unsigned char *buf;
b99457f0 841 size_t size;
610dbb70 842
dc9dbe94 843 devc = sdi->priv;
250a78c7 844 usb = sdi->conn;
b99457f0 845
b0ccd64d
BV
846 devc->sent_samples = 0;
847 devc->acq_aborted = FALSE;
dc9dbe94 848 devc->empty_transfer_count = 0;
610dbb70 849
4237fbca 850 if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
7bfcb25c
AJ
851 int pre_trigger_samples = 0;
852 if (devc->limit_samples > 0)
853 pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
854 devc->stl = soft_trigger_logic_new(sdi, trigger, pre_trigger_samples);
98fec29e 855 if (!devc->stl)
7bfcb25c 856 return SR_ERR_MALLOC;
9615eeb5 857 devc->trigger_fired = FALSE;
9615eeb5
BV
858 } else
859 devc->trigger_fired = TRUE;
860
2f937611 861 num_transfers = fx2lafw_get_number_of_transfers(devc);
a04b28ce 862
9803346f
UH
863 if (devc->dslogic) {
864 if (devc->cur_samplerate == SR_MHZ(100))
a04b28ce
DA
865 num_transfers = 16;
866 else if (devc->cur_samplerate == SR_MHZ(200))
867 num_transfers = 8;
868 else if (devc->cur_samplerate == SR_MHZ(400))
869 num_transfers = 4;
870 }
871
2f937611 872 size = fx2lafw_get_buffer_size(devc);
2a67abfe 873 devc->submitted_transfers = 0;
5af666a9 874
dc9dbe94 875 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
886a52b6 876 if (!devc->transfers) {
f427daef 877 sr_err("USB transfers malloc failed.");
886a52b6
UH
878 return SR_ERR_MALLOC;
879 }
0caa1ef0 880
b9d53092
BV
881 timeout = fx2lafw_get_timeout(devc);
882 endpoint = devc->dslogic ? 6 : 2;
dc9dbe94 883 devc->num_transfers = num_transfers;
5af666a9 884 for (i = 0; i < num_transfers; i++) {
610dbb70 885 if (!(buf = g_try_malloc(size))) {
b99457f0 886 sr_err("USB transfer buffer malloc failed.");
610dbb70
JH
887 return SR_ERR_MALLOC;
888 }
889 transfer = libusb_alloc_transfer(0);
250a78c7 890 libusb_fill_bulk_transfer(transfer, usb->devhdl,
b9d53092 891 endpoint | LIBUSB_ENDPOINT_IN, buf, size,
9615eeb5 892 fx2lafw_receive_transfer, (void *)sdi, timeout);
a04b28ce 893 sr_info("submitting transfer: %d", i);
d4928d71 894 if ((ret = libusb_submit_transfer(transfer)) != 0) {
b99457f0
UH
895 sr_err("Failed to submit transfer: %s.",
896 libusb_error_name(ret));
610dbb70
JH
897 libusb_free_transfer(transfer);
898 g_free(buf);
2f937611 899 fx2lafw_abort_acquisition(devc);
610dbb70
JH
900 return SR_ERR;
901 }
dc9dbe94
BV
902 devc->transfers[i] = transfer;
903 devc->submitted_transfers++;
610dbb70
JH
904 }
905
f9592d65
UH
906 /*
907 * If this device has analog channels and at least one of them is
908 * enabled, use mso_send_data_proc() to properly handle the analog
909 * data. Otherwise use la_send_data_proc().
910 */
911 if (g_slist_length(devc->enabled_analog_channels) > 0)
7e5ccff2
JH
912 devc->send_data_proc = mso_send_data_proc;
913 else
914 devc->send_data_proc = la_send_data_proc;
7b5d1c64 915
bee2b016 916 std_session_send_df_header(sdi);
610dbb70 917
b9d53092
BV
918 return SR_OK;
919}
920
55462b8b 921static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer)
b9d53092
BV
922{
923 const struct sr_dev_inst *sdi;
924 struct dslogic_trigger_pos *tpos;
40ebad35 925 struct dev_context *devc;
b9d53092
BV
926
927 sdi = transfer->user_data;
40ebad35
DA
928 devc = sdi->priv;
929 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
930 sr_dbg("Trigger transfer canceled.");
931 /* Terminate session. */
bee2b016 932 std_session_send_df_end(sdi);
40ebad35
DA
933 usb_source_remove(sdi->session, devc->ctx);
934 devc->num_transfers = 0;
935 g_free(devc->transfers);
936 if (devc->stl) {
937 soft_trigger_logic_free(devc->stl);
938 devc->stl = NULL;
939 }
940 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
b9d53092
BV
941 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
942 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
9803346f
UH
943 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
944 tpos->ram_saddr, tpos->remain_cnt);
945 devc->trigger_pos = tpos->real_pos;
b9d53092
BV
946 g_free(tpos);
947 start_transfers(sdi);
948 }
b9d53092 949 libusb_free_transfer(transfer);
b9d53092
BV
950}
951
952static int dslogic_trigger_request(const struct sr_dev_inst *sdi)
953{
954 struct sr_usb_dev_inst *usb;
955 struct libusb_transfer *transfer;
956 struct dslogic_trigger_pos *tpos;
40ebad35 957 struct dev_context *devc;
b9d53092
BV
958 int ret;
959
960 usb = sdi->conn;
40ebad35 961 devc = sdi->priv;
b9d53092
BV
962
963 if ((ret = dslogic_stop_acquisition(sdi)) != SR_OK)
964 return ret;
965
966 if ((ret = dslogic_fpga_configure(sdi)) != SR_OK)
967 return ret;
f366e86c 968
9803346f 969 /* If this is a DSLogic Pro, set the voltage threshold. */
3fc3fbe4 970 if (!strcmp(devc->profile->model, "DSLogic Pro")){
9803346f 971 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V) {
3fc3fbe4 972 dslogic_set_vth(sdi, 1.4);
9803346f 973 } else {
3fc3fbe4
DA
974 dslogic_set_vth(sdi, 3.3);
975 }
976 }
977
b9d53092 978 if ((ret = dslogic_start_acquisition(sdi)) != SR_OK)
ebc34738 979 return ret;
b9d53092
BV
980
981 sr_dbg("Getting trigger.");
982 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
983 transfer = libusb_alloc_transfer(0);
984 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
985 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
986 dslogic_trigger_receive, (void *)sdi, 0);
987 if ((ret = libusb_submit_transfer(transfer)) < 0) {
988 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
989 libusb_free_transfer(transfer);
990 g_free(tpos);
991 return SR_ERR;
992 }
993
40ebad35
DA
994 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
995 if (!devc->transfers) {
996 sr_err("USB trigger_pos transfer malloc failed.");
997 return SR_ERR_MALLOC;
998 }
999 devc->num_transfers = 1;
1000 devc->submitted_transfers++;
1001 devc->transfers[0] = transfer;
1002
b9d53092
BV
1003 return ret;
1004}
1005
7fb90f94
BL
1006static int configure_channels(const struct sr_dev_inst *sdi)
1007{
1008 struct dev_context *devc;
1009 const GSList *l;
1010 int p;
1011 struct sr_channel *ch;
8399f68a 1012 uint32_t channel_mask = 0, num_analog = 0;
7fb90f94
BL
1013
1014 devc = sdi->priv;
1015
1016 g_slist_free(devc->enabled_analog_channels);
1017 devc->enabled_analog_channels = NULL;
7fb90f94
BL
1018
1019 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
1020 ch = l->data;
f9592d65
UH
1021 if ((p <= NUM_CHANNELS) && (ch->type == SR_CHANNEL_ANALOG)
1022 && (ch->enabled)) {
8399f68a 1023 num_analog++;
7fb90f94
BL
1024 devc->enabled_analog_channels =
1025 g_slist_append(devc->enabled_analog_channels, ch);
8399f68a
JL
1026 } else {
1027 channel_mask |= ch->enabled << p;
7fb90f94
BL
1028 }
1029 }
1030
f9592d65 1031 /*
8a68f96e
AG
1032 * Use wide sampling if either any of the LA channels 8..15 is enabled,
1033 * and/or at least one analog channel is enabled, and/or the device
1034 * is running DSLogic firmware (not fx2lafw).
f9592d65 1035 */
8a68f96e
AG
1036 devc->sample_wide = (channel_mask > 0xff
1037 || num_analog > 0
1038 || (devc->profile->dev_caps & DEV_CAPS_DSLOGIC_FW));
8399f68a 1039
7fb90f94
BL
1040 return SR_OK;
1041}
1042
695dc859 1043static int dev_acquisition_start(const struct sr_dev_inst *sdi)
b9d53092 1044{
4f840ce9 1045 struct sr_dev_driver *di;
b9d53092
BV
1046 struct drv_context *drvc;
1047 struct dev_context *devc;
1048 int timeout, ret;
7e5ccff2 1049 size_t size;
b9d53092
BV
1050
1051 if (sdi->status != SR_ST_ACTIVE)
1052 return SR_ERR_DEV_CLOSED;
1053
4f840ce9 1054 di = sdi->driver;
41812aca 1055 drvc = di->context;
b9d53092
BV
1056 devc = sdi->priv;
1057
b9d53092 1058 devc->ctx = drvc->sr_ctx;
b9d53092
BV
1059 devc->sent_samples = 0;
1060 devc->empty_transfer_count = 0;
1061 devc->acq_aborted = FALSE;
1062
7fb90f94
BL
1063 if (configure_channels(sdi) != SR_OK) {
1064 sr_err("Failed to configure channels.");
1065 return SR_ERR;
1066 }
1067
b9d53092 1068 timeout = fx2lafw_get_timeout(devc);
4f840ce9 1069 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
b9d53092
BV
1070
1071 if (devc->dslogic) {
1072 dslogic_trigger_request(sdi);
c442ffda 1073 } else {
7e5ccff2
JH
1074 size = fx2lafw_get_buffer_size(devc);
1075 /* Prepare for analog sampling. */
f9592d65 1076 if (g_slist_length(devc->enabled_analog_channels) > 0) {
7e5ccff2
JH
1077 /* We need a buffer half the size of a transfer. */
1078 devc->logic_buffer = g_try_malloc(size / 2);
1079 devc->analog_buffer = g_try_malloc(
1080 sizeof(float) * size / 2);
1081 }
b9d53092 1082 start_transfers(sdi);
815e3cb8
SA
1083 if ((ret = fx2lafw_command_start_acquisition(sdi)) != SR_OK) {
1084 fx2lafw_abort_acquisition(devc);
1085 return ret;
1086 }
017375d1
JH
1087 }
1088
f302a082
JH
1089 return SR_OK;
1090}
1091
695dc859 1092static int dev_acquisition_stop(struct sr_dev_inst *sdi)
f302a082 1093{
1a7ff3d0
UH
1094 struct dev_context *devc;
1095
1a7ff3d0
UH
1096 devc = sdi->priv;
1097
1098 if (devc->dslogic)
1099 dslogic_stop_acquisition(sdi);
1100
2f937611 1101 fx2lafw_abort_acquisition(sdi->priv);
5da93902 1102
f302a082
JH
1103 return SR_OK;
1104}
1105
dd5c48a6 1106static struct sr_dev_driver fx2lafw_driver_info = {
f302a082 1107 .name = "fx2lafw",
2e7cb004 1108 .longname = "fx2lafw (generic driver for FX2 based LAs)",
f302a082 1109 .api_version = 1,
c2fdcc25 1110 .init = std_init,
700d6b64 1111 .cleanup = std_cleanup,
6078d2c9 1112 .scan = scan,
c01bf34c 1113 .dev_list = std_dev_list,
7fb90f94 1114 .dev_clear = dev_clear,
035a1078
BV
1115 .config_get = config_get,
1116 .config_set = config_set,
a1c743fc 1117 .config_list = config_list,
6078d2c9
UH
1118 .dev_open = dev_open,
1119 .dev_close = dev_close,
1120 .dev_acquisition_start = dev_acquisition_start,
1121 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 1122 .context = NULL,
f302a082 1123};
dd5c48a6 1124SR_REGISTER_DEV_DRIVER(fx2lafw_driver_info);