]> sigrok.org Git - libsigrok.git/blame - src/hardware/fx2lafw/api.c
Change type of SR_CONF_CONTINUOUS from SR_T_UINT64 to SR_T_BOOL
[libsigrok.git] / src / hardware / fx2lafw / api.c
CommitLineData
f302a082 1/*
50985c20 2 * This file is part of the libsigrok project.
f302a082 3 *
13d8e03c 4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f302a082
JH
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
2f937611 22#include "protocol.h"
b9d53092 23#include "dslogic.h"
3fc3fbe4 24#include <math.h>
f302a082 25
4679d14d 26static const struct fx2lafw_profile supported_fx2[] = {
7ae2f9d5
UH
27 /*
28 * CWAV USBee AX
17b6c75a 29 * EE Electronics ESLA201A
9f05304e 30 * ARMFLY AX-Pro
17b6c75a 31 */
f8b07fc6 32 { 0x08a9, 0x0014, "CWAV", "USBee AX", NULL,
8e2d6c9d 33 "fx2lafw-cwav-usbeeax.fw",
232a975f 34 DEV_CAPS_AX_ANALOG, NULL, NULL},
0e8d0e24
IF
35 /*
36 * CWAV USBee DX
37 * XZL-Studio DX
38 */
39 { 0x08a9, 0x0015, "CWAV", "USBee DX", NULL,
8e2d6c9d 40 "fx2lafw-cwav-usbeedx.fw",
e826239c 41 DEV_CAPS_16BIT, NULL, NULL },
93a9f3da 42
7ae2f9d5
UH
43 /*
44 * CWAV USBee SX
4502e869
JH
45 */
46 { 0x08a9, 0x0009, "CWAV", "USBee SX", NULL,
8e2d6c9d 47 "fx2lafw-cwav-usbeesx.fw",
e826239c 48 0, NULL, NULL},
4502e869 49
b7c53d48 50 /* DreamSourceLab DSLogic (before FW upload) */
a7d7f93c 51 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 52 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c 53 DEV_CAPS_16BIT, NULL, NULL},
b7c53d48 54 /* DreamSourceLab DSLogic (after FW upload) */
a7d7f93c 55 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 56 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c
BV
57 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
58
b7c53d48
DG
59 /* DreamSourceLab DSCope (before FW upload) */
60 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 61 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
62 DEV_CAPS_16BIT, NULL, NULL},
63 /* DreamSourceLab DSCope (after FW upload) */
64 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 65 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
66 DEV_CAPS_16BIT, "DreamSourceLab", "DSCope"},
67
68 /* DreamSourceLab DSLogic Pro (before FW upload) */
69 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 70 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
71 DEV_CAPS_16BIT, NULL, NULL},
72 /* DreamSourceLab DSLogic Pro (after FW upload) */
73 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 74 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
75 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
76
7ae2f9d5
UH
77 /*
78 * Saleae Logic
93a9f3da
JH
79 * EE Electronics ESLA100
80 * Robomotic MiniLogic
1663e470 81 * Robomotic BugLogic 3
93a9f3da
JH
82 */
83 { 0x0925, 0x3881, "Saleae", "Logic", NULL,
8e2d6c9d 84 "fx2lafw-saleae-logic.fw",
e826239c 85 0, NULL, NULL},
93a9f3da 86
f488762a 87 /*
1663e470
UH
88 * Default Cypress FX2 without EEPROM, e.g.:
89 * Lcsoft Mini Board
90 * Braintechnology USB Interface V2.x
f488762a
JH
91 */
92 { 0x04B4, 0x8613, "Cypress", "FX2", NULL,
8e2d6c9d 93 "fx2lafw-cypress-fx2.fw",
e826239c 94 DEV_CAPS_16BIT, NULL, NULL },
f488762a 95
1663e470
UH
96 /*
97 * Braintechnology USB-LPS
98 */
99 { 0x16d0, 0x0498, "Braintechnology", "USB-LPS", NULL,
8e2d6c9d 100 "fx2lafw-braintechnology-usb-lps.fw",
e826239c 101 DEV_CAPS_16BIT, NULL, NULL },
1663e470 102
3e91de2b
UH
103 /*
104 * sigrok FX2 based 8-channel logic analyzer
105 */
106 { 0x1d50, 0x608c, "sigrok", "FX2 LA (8ch)", NULL,
087c4d59 107 "fx2lafw-sigrok-fx2-8ch.fw",
3e91de2b
UH
108 0, NULL, NULL},
109
110 /*
111 * sigrok FX2 based 16-channel logic analyzer
112 */
113 { 0x1d50, 0x608d, "sigrok", "FX2 LA (16ch)", NULL,
087c4d59 114 "fx2lafw-sigrok-fx2-16ch.fw",
3e91de2b
UH
115 DEV_CAPS_16BIT, NULL, NULL },
116
1b4aedc0 117 ALL_ZERO
187b3582
JH
118};
119
ff6b76a1
BV
120static const uint32_t drvopts[] = {
121 SR_CONF_LOGIC_ANALYZER,
122};
123
a0e0bb41 124static const uint32_t scanopts[] = {
89befd46
BV
125 SR_CONF_CONN,
126};
127
f254bc4b 128static const uint32_t devopts[] = {
e91bb0a6 129 SR_CONF_CONTINUOUS,
ff6b76a1 130 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
5827f61b
BV
131 SR_CONF_CONN | SR_CONF_GET,
132 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 133 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
7bfcb25c 134 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
8b35f474
JH
135};
136
3fc3fbe4
DA
137static const uint32_t dslogic_devopts[] = {
138 SR_CONF_CONTINUOUS | SR_CONF_SET,
139 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
140 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
141 SR_CONF_CONN | SR_CONF_GET,
142 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
144 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
ea3a77c7 145 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
3fc3fbe4
DA
146};
147
9615eeb5
BV
148static const int32_t soft_trigger_matches[] = {
149 SR_TRIGGER_ZERO,
150 SR_TRIGGER_ONE,
335122f0
BV
151 SR_TRIGGER_RISING,
152 SR_TRIGGER_FALLING,
153 SR_TRIGGER_EDGE,
9615eeb5
BV
154};
155
3fc3fbe4
DA
156static const struct {
157 int range;
158 gdouble low;
159 gdouble high;
160} volt_thresholds[] = {
161 { DS_VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
162 { DS_VOLTAGE_RANGE_5_V, 1.4, 3.6 },
163};
164
d6836bf1 165static const uint64_t samplerates[] = {
79dc6498
JH
166 SR_KHZ(20),
167 SR_KHZ(25),
897c1a2e
JH
168 SR_KHZ(50),
169 SR_KHZ(100),
9304d576
JH
170 SR_KHZ(200),
171 SR_KHZ(250),
172 SR_KHZ(500),
8b35f474
JH
173 SR_MHZ(1),
174 SR_MHZ(2),
175 SR_MHZ(3),
176 SR_MHZ(4),
177 SR_MHZ(6),
178 SR_MHZ(8),
179 SR_MHZ(12),
180 SR_MHZ(16),
772a0e61 181 SR_MHZ(24),
8b35f474
JH
182};
183
a7d7f93c
BV
184static const uint64_t dslogic_samplerates[] = {
185 SR_KHZ(10),
186 SR_KHZ(20),
187 SR_KHZ(50),
188 SR_KHZ(100),
189 SR_KHZ(200),
190 SR_KHZ(500),
191 SR_MHZ(1),
192 SR_MHZ(2),
193 SR_MHZ(5),
194 SR_MHZ(10),
195 SR_MHZ(20),
196 SR_MHZ(25),
197 SR_MHZ(50),
198 SR_MHZ(100),
199 SR_MHZ(200),
200 SR_MHZ(400),
201};
202
a8cc8e44 203SR_PRIV struct sr_dev_driver fx2lafw_driver_info;
610dbb70 204
4f840ce9 205static GSList *scan(struct sr_dev_driver *di, GSList *options)
f302a082 206{
dc9dbe94
BV
207 struct drv_context *drvc;
208 struct dev_context *devc;
754b5ff2
BV
209 struct sr_dev_inst *sdi;
210 struct sr_usb_dev_inst *usb;
7fb90f94
BL
211 struct sr_channel *ch;
212 struct sr_channel_group *cg;
754b5ff2
BV
213 struct sr_config *src;
214 const struct fx2lafw_profile *prof;
215 GSList *l, *devices, *conn_devices;
a7d7f93c 216 gboolean has_firmware;
754b5ff2 217 struct libusb_device_descriptor des;
187b3582 218 libusb_device **devlist;
e826239c 219 struct libusb_device_handle *hdl;
232a975f
JH
220 int ret, i, j;
221 int num_logic_channels = 0, num_analog_channels = 0;
754b5ff2 222 const char *conn;
5e2c86eb 223 char manufacturer[64], product[64], serial_num[64], connection_id[64];
7fb90f94 224 char channel_name[16];
3a7a22cb 225
41812aca 226 drvc = di->context;
187b3582 227
754b5ff2
BV
228 conn = NULL;
229 for (l = options; l; l = l->next) {
230 src = l->data;
231 switch (src->key) {
232 case SR_CONF_CONN:
233 conn = g_variant_get_string(src->data, NULL);
234 break;
235 }
236 }
237 if (conn)
238 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
239 else
240 conn_devices = NULL;
241
921634ec 242 /* Find all fx2lafw compatible devices and upload firmware to them. */
3a7a22cb 243 devices = NULL;
d4abb463 244 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
187b3582 245 for (i = 0; devlist[i]; i++) {
754b5ff2
BV
246 if (conn) {
247 usb = NULL;
248 for (l = conn_devices; l; l = l->next) {
249 usb = l->data;
250 if (usb->bus == libusb_get_bus_number(devlist[i])
251 && usb->address == libusb_get_device_address(devlist[i]))
252 break;
253 }
254 if (!l)
255 /* This device matched none of the ones that
256 * matched the conn specification. */
257 continue;
258 }
187b3582 259
2a8f2d41 260 libusb_get_device_descriptor( devlist[i], &des);
187b3582 261
e826239c
ML
262 if ((ret = libusb_open(devlist[i], &hdl)) < 0)
263 continue;
264
265 if (des.iManufacturer == 0) {
266 manufacturer[0] = '\0';
267 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
268 des.iManufacturer, (unsigned char *) manufacturer,
269 sizeof(manufacturer))) < 0) {
270 sr_warn("Failed to get manufacturer string descriptor: %s.",
271 libusb_error_name(ret));
272 continue;
273 }
274
275 if (des.iProduct == 0) {
276 product[0] = '\0';
277 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
278 des.iProduct, (unsigned char *) product,
279 sizeof(product))) < 0) {
280 sr_warn("Failed to get product string descriptor: %s.",
281 libusb_error_name(ret));
282 continue;
283 }
284
5e2c86eb
SA
285 if (des.iSerialNumber == 0) {
286 serial_num[0] = '\0';
287 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
288 des.iSerialNumber, (unsigned char *) serial_num,
289 sizeof(serial_num))) < 0) {
290 sr_warn("Failed to get serial number string descriptor: %s.",
291 libusb_error_name(ret));
292 continue;
293 }
294
295 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
296
e826239c
ML
297 libusb_close(hdl);
298
da686568 299 prof = NULL;
187b3582
JH
300 for (j = 0; supported_fx2[j].vid; j++) {
301 if (des.idVendor == supported_fx2[j].vid &&
e826239c
ML
302 des.idProduct == supported_fx2[j].pid &&
303 (!supported_fx2[j].usb_manufacturer ||
304 !strcmp(manufacturer, supported_fx2[j].usb_manufacturer)) &&
305 (!supported_fx2[j].usb_manufacturer ||
306 !strcmp(product, supported_fx2[j].usb_product))) {
da686568 307 prof = &supported_fx2[j];
e826239c 308 break;
187b3582
JH
309 }
310 }
311
b99457f0 312 /* Skip if the device was not found. */
da686568 313 if (!prof)
187b3582
JH
314 continue;
315
aac29cc1 316 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
317 sdi->status = SR_ST_INITIALIZING;
318 sdi->vendor = g_strdup(prof->vendor);
319 sdi->model = g_strdup(prof->model);
320 sdi->version = g_strdup(prof->model_version);
a873c594 321 sdi->driver = di;
5e2c86eb
SA
322 sdi->serial_num = g_strdup(serial_num);
323 sdi->connection_id = g_strdup(connection_id);
187b3582 324
ba7dd8bb
UH
325 /* Fill in channellist according to this device's profile. */
326 num_logic_channels = prof->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
232a975f
JH
327 num_analog_channels = prof->dev_caps & DEV_CAPS_AX_ANALOG ? 1 : 0;
328
7fb90f94
BL
329 /* Logic channels, all in one channel group. */
330 cg = g_malloc0(sizeof(struct sr_channel_group));
331 cg->name = g_strdup("Logic");
332 for (j = 0; j < num_logic_channels; j++) {
333 sprintf(channel_name, "D%d", j);
334 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC,
335 TRUE, channel_name);
336 cg->channels = g_slist_append(cg->channels, ch);
337 }
338 sdi->channel_groups = g_slist_append(NULL, cg);
339
340 for (j = 0; j < num_analog_channels; j++) {
341 snprintf(channel_name, 16, "A%d", j);
342 ch = sr_channel_new(sdi, j + num_logic_channels,
343 SR_CHANNEL_ANALOG, TRUE, channel_name);
344
345 /* Every analog channel gets its own channel group. */
346 cg = g_malloc0(sizeof(struct sr_channel_group));
347 cg->name = g_strdup(channel_name);
348 cg->channels = g_slist_append(NULL, ch);
349 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
350 }
232a975f 351
dc9dbe94
BV
352 devc = fx2lafw_dev_new();
353 devc->profile = prof;
7fb90f94
BL
354 if ((prof->dev_caps & DEV_CAPS_16BIT) || (prof->dev_caps & DEV_CAPS_AX_ANALOG))
355 devc->sample_wide = TRUE;
dc9dbe94
BV
356 sdi->priv = devc;
357 drvc->instances = g_slist_append(drvc->instances, sdi);
a8cc8e44 358 devices = g_slist_append(devices, sdi);
187b3582 359
b7c53d48
DG
360 if (!strcmp(prof->model, "DSLogic")
361 || !strcmp(prof->model, "DSLogic Pro")
362 || !strcmp(prof->model, "DSCope")) {
363 devc->dslogic = TRUE;
364 devc->samplerates = dslogic_samplerates;
365 devc->num_samplerates = ARRAY_SIZE(dslogic_samplerates);
366 has_firmware = match_manuf_prod(devlist[i], "DreamSourceLab", "DSLogic")
367 || match_manuf_prod(devlist[i], "DreamSourceLab", "DSCope");
368 } else {
a7d7f93c
BV
369 devc->dslogic = FALSE;
370 devc->samplerates = samplerates;
371 devc->num_samplerates = ARRAY_SIZE(samplerates);
372 has_firmware = match_manuf_prod(devlist[i],
373 "sigrok", "fx2lafw");
a7d7f93c
BV
374 }
375
376 if (has_firmware) {
b1eeb67e 377 /* Already has the firmware, so fix the new address. */
f427daef 378 sr_dbg("Found an fx2lafw device.");
b1eeb67e 379 sdi->status = SR_ST_INACTIVE;
250a78c7
BV
380 sdi->inst_type = SR_INST_USB;
381 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
382 libusb_get_device_address(devlist[i]), NULL);
b1eeb67e 383 } else {
8e2d6c9d
DE
384 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
385 USB_CONFIGURATION, prof->firmware) == SR_OK)
b99457f0 386 /* Store when this device's FW was updated. */
dc9dbe94 387 devc->fw_updated = g_get_monotonic_time();
b1eeb67e 388 else
f427daef 389 sr_err("Firmware upload failed for "
5e2c86eb
SA
390 "device %d.%d (logical).",
391 libusb_get_bus_number(devlist[i]),
392 libusb_get_device_address(devlist[i]));
250a78c7 393 sdi->inst_type = SR_INST_USB;
87b545fb 394 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
250a78c7 395 0xff, NULL);
b1eeb67e 396 }
187b3582
JH
397 }
398 libusb_free_device_list(devlist, 1);
9dc7a75e 399 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
187b3582 400
3a7a22cb 401 return devices;
f302a082
JH
402}
403
7fb90f94
BL
404static void clear_dev_context(void *priv)
405{
406 struct dev_context *devc;
407
408 devc = priv;
409 g_slist_free(devc->enabled_analog_channels);
410 g_free(devc);
411}
412
413static int dev_clear(const struct sr_dev_driver *di)
414{
415 return std_dev_clear(di, clear_dev_context);
416}
417
6078d2c9 418static int dev_open(struct sr_dev_inst *sdi)
f302a082 419{
4f840ce9 420 struct sr_dev_driver *di = sdi->driver;
250a78c7 421 struct sr_usb_dev_inst *usb;
dc9dbe94 422 struct dev_context *devc;
2c240774 423 const char *fpga_firmware = NULL;
e8bd58ff
UH
424 int ret;
425 int64_t timediff_us, timediff_ms;
43125c69 426
dc9dbe94 427 devc = sdi->priv;
250a78c7 428 usb = sdi->conn;
43125c69
JH
429
430 /*
f60fdf6e
UH
431 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
432 * milliseconds for the FX2 to renumerate.
43125c69 433 */
3b6c1930 434 ret = SR_ERR;
dc9dbe94 435 if (devc->fw_updated > 0) {
f427daef 436 sr_info("Waiting for device to reset.");
b99457f0 437 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
43125c69 438 g_usleep(300 * 1000);
e8bd58ff 439 timediff_ms = 0;
f60fdf6e 440 while (timediff_ms < MAX_RENUM_DELAY_MS) {
2f937611 441 if ((ret = fx2lafw_dev_open(sdi, di)) == SR_OK)
43125c69
JH
442 break;
443 g_usleep(100 * 1000);
e8bd58ff 444
dc9dbe94 445 timediff_us = g_get_monotonic_time() - devc->fw_updated;
3b6c1930 446 timediff_ms = timediff_us / 1000;
b99457f0 447 sr_spew("Waited %" PRIi64 "ms.", timediff_ms);
43125c69 448 }
443a14d8
AG
449 if (ret != SR_OK) {
450 sr_err("Device failed to renumerate.");
451 return SR_ERR;
452 }
c0bf69c2 453 sr_info("Device came back after %" PRIi64 "ms.", timediff_ms);
43125c69 454 } else {
443a14d8 455 sr_info("Firmware upload was not needed.");
2f937611 456 ret = fx2lafw_dev_open(sdi, di);
43125c69
JH
457 }
458
ebc34738 459 if (ret != SR_OK) {
f427daef 460 sr_err("Unable to open device.");
43125c69
JH
461 return SR_ERR;
462 }
378abfea 463
250a78c7 464 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
ebc34738 465 if (ret != 0) {
87b545fb 466 switch (ret) {
0c156e06 467 case LIBUSB_ERROR_BUSY:
f427daef 468 sr_err("Unable to claim USB interface. Another "
b99457f0 469 "program or driver has already claimed it.");
0c156e06 470 break;
0c156e06 471 case LIBUSB_ERROR_NO_DEVICE:
f427daef 472 sr_err("Device has been disconnected.");
0c156e06 473 break;
0c156e06 474 default:
f427daef 475 sr_err("Unable to claim interface: %s.",
d4928d71 476 libusb_error_name(ret));
0c156e06
JH
477 break;
478 }
479
43125c69
JH
480 return SR_ERR;
481 }
482
a7d7f93c 483 if (devc->dslogic) {
b7c53d48 484 if (!strcmp(devc->profile->model, "DSLogic")) {
3fc3fbe4
DA
485 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V)
486 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_3V3;
487 else
488 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
489 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
b7c53d48
DG
490 fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
491 } else if (!strcmp(devc->profile->model, "DSCope")) {
492 fpga_firmware = DSCOPE_FPGA_FIRMWARE;
493 }
494
3fc3fbe4 495 if ((ret = dslogic_fpga_firmware_upload(sdi, fpga_firmware)) != SR_OK)
a7d7f93c
BV
496 return ret;
497 }
dc9dbe94 498 if (devc->cur_samplerate == 0) {
f92994fd 499 /* Samplerate hasn't been set; default to the slowest one. */
a7d7f93c 500 devc->cur_samplerate = devc->samplerates[0];
f92994fd
JH
501 }
502
f302a082
JH
503 return SR_OK;
504}
505
6078d2c9 506static int dev_close(struct sr_dev_inst *sdi)
f302a082 507{
250a78c7 508 struct sr_usb_dev_inst *usb;
961009b0 509
250a78c7 510 usb = sdi->conn;
98fec29e 511 if (!usb->devhdl)
25a0f108 512 return SR_ERR;
f1898235 513
5e2c86eb
SA
514 sr_info("fx2lafw: Closing device on %d.%d (logical) / %s (physical) interface %d.",
515 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
250a78c7
BV
516 libusb_release_interface(usb->devhdl, USB_INTERFACE);
517 libusb_close(usb->devhdl);
518 usb->devhdl = NULL;
25a0f108 519 sdi->status = SR_ST_INACTIVE;
f1898235 520
f302a082
JH
521 return SR_OK;
522}
523
584560f1 524static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 525 const struct sr_channel_group *cg)
f302a082 526{
dc9dbe94 527 struct dev_context *devc;
89befd46 528 struct sr_usb_dev_inst *usb;
3fc3fbe4
DA
529 GVariant *range[2];
530 unsigned int i;
89befd46 531 char str[128];
8b35f474 532
53b4680f 533 (void)cg;
8f996b89 534
a920a7d8
ML
535 if (!sdi)
536 return SR_ERR_ARG;
537
538 devc = sdi->priv;
539
584560f1 540 switch (key) {
89befd46 541 case SR_CONF_CONN:
a920a7d8 542 if (!sdi->conn)
38ab8dbe 543 return SR_ERR_ARG;
89befd46
BV
544 usb = sdi->conn;
545 if (usb->address == 255)
546 /* Device still needs to re-enumerate after firmware
547 * upload, so we don't know its (future) address. */
548 return SR_ERR;
549 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
550 *data = g_variant_new_string(str);
551 break;
3fc3fbe4
DA
552 case SR_CONF_VOLTAGE_THRESHOLD:
553 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
554 if (volt_thresholds[i].range != devc->dslogic_voltage_threshold)
555 continue;
556 range[0] = g_variant_new_double(volt_thresholds[i].low);
557 range[1] = g_variant_new_double(volt_thresholds[i].high);
558 *data = g_variant_new_tuple(range, 2);
559 break;
560 }
561 break;
a920a7d8
ML
562 case SR_CONF_LIMIT_SAMPLES:
563 *data = g_variant_new_uint64(devc->limit_samples);
564 break;
123e1313 565 case SR_CONF_SAMPLERATE:
89befd46 566 *data = g_variant_new_uint64(devc->cur_samplerate);
6e9339aa 567 break;
7bfcb25c
AJ
568 case SR_CONF_CAPTURE_RATIO:
569 *data = g_variant_new_uint64(devc->capture_ratio);
570 break;
ea3a77c7
DA
571 case SR_CONF_EXTERNAL_CLOCK:
572 *data = g_variant_new_boolean(devc->dslogic_external_clock);
573 break;
6e9339aa 574 default:
bd6fbf62 575 return SR_ERR_NA;
8b35f474
JH
576 }
577
6e9339aa 578 return SR_OK;
f302a082
JH
579}
580
584560f1 581static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 582 const struct sr_channel_group *cg)
f302a082 583{
dc9dbe94 584 struct dev_context *devc;
4d7b36a0 585 uint64_t arg;
65e00366 586 int i, ret;
3fc3fbe4 587 gdouble low, high;
7cb621d4 588
53b4680f 589 (void)cg;
8f996b89 590
1c48000d
ML
591 if (!sdi)
592 return SR_ERR_ARG;
593
e73ffd42
BV
594 if (sdi->status != SR_ST_ACTIVE)
595 return SR_ERR;
596
dc9dbe94 597 devc = sdi->priv;
7cb621d4 598
1c48000d
ML
599 ret = SR_OK;
600
584560f1 601 switch (key) {
93b118da
UH
602 case SR_CONF_SAMPLERATE:
603 arg = g_variant_get_uint64(data);
65e00366
CFS
604 for (i = 0; i < devc->num_samplerates; i++) {
605 if (devc->samplerates[i] == arg) {
93b118da
UH
606 devc->cur_samplerate = arg;
607 break;
4d7b36a0 608 }
93b118da 609 }
65e00366 610 if (i == devc->num_samplerates)
93b118da
UH
611 ret = SR_ERR_ARG;
612 break;
613 case SR_CONF_LIMIT_SAMPLES:
614 devc->limit_samples = g_variant_get_uint64(data);
615 break;
616 case SR_CONF_CAPTURE_RATIO:
617 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 618 ret = (devc->capture_ratio > 100) ? SR_ERR : SR_OK;
93b118da 619 break;
3fc3fbe4
DA
620 case SR_CONF_VOLTAGE_THRESHOLD:
621 g_variant_get(data, "(dd)", &low, &high);
622 ret = SR_ERR_ARG;
623 for (i = 0; (unsigned int)i < ARRAY_SIZE(volt_thresholds); i++) {
624 if (fabs(volt_thresholds[i].low - low) < 0.1 &&
625 fabs(volt_thresholds[i].high - high) < 0.1) {
626 devc->dslogic_voltage_threshold = volt_thresholds[i].range;
627 break;
628 }
629 }
630 if (!strcmp(devc->profile->model, "DSLogic")) {
631 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_5_V)
632 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_5V);
633 else
634 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
635 }else if (!strcmp(devc->profile->model, "DSLogic Pro")){
636 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
637 }
638 break;
ea3a77c7
DA
639 case SR_CONF_EXTERNAL_CLOCK:
640 devc->dslogic_external_clock = g_variant_get_boolean(data);
641 break;
93b118da
UH
642 default:
643 ret = SR_ERR_NA;
7cb621d4
JH
644 }
645
646 return ret;
f302a082
JH
647}
648
584560f1 649static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 650 const struct sr_channel_group *cg)
a1c743fc 651{
a7d7f93c 652 struct dev_context *devc;
3fc3fbe4 653 GVariant *gvar, *range[2];
d6836bf1 654 GVariantBuilder gvb;
3fc3fbe4 655 unsigned int i;
a1c743fc 656
53b4680f 657 (void)cg;
a1c743fc
BV
658
659 switch (key) {
89befd46 660 case SR_CONF_SCAN_OPTIONS:
584560f1 661 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 662 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
89befd46 663 break;
9a6517d1 664 case SR_CONF_DEVICE_OPTIONS:
ff6b76a1
BV
665 if (!sdi)
666 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
3fc3fbe4
DA
667 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
668 else{
669 devc = sdi->priv;
670 if (!devc->dslogic)
671 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
672 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
673 else
674 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
675 dslogic_devopts, ARRAY_SIZE(dslogic_devopts), sizeof(uint32_t));
676 }
677 break;
678 case SR_CONF_VOLTAGE_THRESHOLD:
679 if (!sdi->priv) return SR_ERR_ARG;
680 devc = sdi->priv;
681 if (!devc->dslogic) return SR_ERR_NA;
682 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
683 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
684 range[0] = g_variant_new_double(volt_thresholds[i].low);
685 range[1] = g_variant_new_double(volt_thresholds[i].high);
686 gvar = g_variant_new_tuple(range, 2);
687 g_variant_builder_add_value(&gvb, gvar);
688 }
689 *data = g_variant_builder_end(&gvb);
9a6517d1 690 break;
a1c743fc 691 case SR_CONF_SAMPLERATE:
a7d7f93c
BV
692 if (!sdi->priv)
693 return SR_ERR_ARG;
694 devc = sdi->priv;
d6836bf1 695 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
a7d7f93c
BV
696 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), devc->samplerates,
697 devc->num_samplerates, sizeof(uint64_t));
d6836bf1
BV
698 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
699 *data = g_variant_builder_end(&gvb);
a1c743fc 700 break;
9615eeb5
BV
701 case SR_CONF_TRIGGER_MATCH:
702 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
703 soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
704 sizeof(int32_t));
c50277a6 705 break;
a1c743fc 706 default:
bd6fbf62 707 return SR_ERR_NA;
a1c743fc
BV
708 }
709
710 return SR_OK;
711}
712
1f9813eb 713static int receive_data(int fd, int revents, void *cb_data)
610dbb70
JH
714{
715 struct timeval tv;
b99457f0 716 struct drv_context *drvc;
610dbb70 717
610dbb70
JH
718 (void)fd;
719 (void)revents;
610dbb70 720
1a863916 721 drvc = (struct drv_context *)cb_data;
b99457f0 722
610dbb70 723 tv.tv_sec = tv.tv_usec = 0;
d4abb463 724 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
610dbb70
JH
725
726 return TRUE;
727}
728
b9d53092 729static int start_transfers(const struct sr_dev_inst *sdi)
f302a082 730{
dc9dbe94 731 struct dev_context *devc;
250a78c7 732 struct sr_usb_dev_inst *usb;
335122f0 733 struct sr_trigger *trigger;
610dbb70 734 struct libusb_transfer *transfer;
b9d53092
BV
735 unsigned int i, num_transfers;
736 int endpoint, timeout, ret;
610dbb70 737 unsigned char *buf;
b99457f0 738 size_t size;
610dbb70 739
dc9dbe94 740 devc = sdi->priv;
250a78c7 741 usb = sdi->conn;
b99457f0 742
b0ccd64d
BV
743 devc->sent_samples = 0;
744 devc->acq_aborted = FALSE;
dc9dbe94 745 devc->empty_transfer_count = 0;
610dbb70 746
4237fbca 747 if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
7bfcb25c
AJ
748 int pre_trigger_samples = 0;
749 if (devc->limit_samples > 0)
750 pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
751 devc->stl = soft_trigger_logic_new(sdi, trigger, pre_trigger_samples);
98fec29e 752 if (!devc->stl)
7bfcb25c 753 return SR_ERR_MALLOC;
9615eeb5 754 devc->trigger_fired = FALSE;
9615eeb5
BV
755 } else
756 devc->trigger_fired = TRUE;
757
2f937611
UH
758 num_transfers = fx2lafw_get_number_of_transfers(devc);
759 size = fx2lafw_get_buffer_size(devc);
2a67abfe 760 devc->submitted_transfers = 0;
5af666a9 761
dc9dbe94 762 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
886a52b6 763 if (!devc->transfers) {
f427daef 764 sr_err("USB transfers malloc failed.");
886a52b6
UH
765 return SR_ERR_MALLOC;
766 }
0caa1ef0 767
b9d53092
BV
768 timeout = fx2lafw_get_timeout(devc);
769 endpoint = devc->dslogic ? 6 : 2;
dc9dbe94 770 devc->num_transfers = num_transfers;
5af666a9 771 for (i = 0; i < num_transfers; i++) {
610dbb70 772 if (!(buf = g_try_malloc(size))) {
b99457f0 773 sr_err("USB transfer buffer malloc failed.");
610dbb70
JH
774 return SR_ERR_MALLOC;
775 }
776 transfer = libusb_alloc_transfer(0);
250a78c7 777 libusb_fill_bulk_transfer(transfer, usb->devhdl,
b9d53092 778 endpoint | LIBUSB_ENDPOINT_IN, buf, size,
9615eeb5 779 fx2lafw_receive_transfer, (void *)sdi, timeout);
d4928d71 780 if ((ret = libusb_submit_transfer(transfer)) != 0) {
b99457f0
UH
781 sr_err("Failed to submit transfer: %s.",
782 libusb_error_name(ret));
610dbb70
JH
783 libusb_free_transfer(transfer);
784 g_free(buf);
2f937611 785 fx2lafw_abort_acquisition(devc);
610dbb70
JH
786 return SR_ERR;
787 }
dc9dbe94
BV
788 devc->transfers[i] = transfer;
789 devc->submitted_transfers++;
610dbb70
JH
790 }
791
7e5ccff2
JH
792 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG)
793 devc->send_data_proc = mso_send_data_proc;
794 else
795 devc->send_data_proc = la_send_data_proc;
7b5d1c64 796
6fcf3f0a 797 std_session_send_df_header(sdi, LOG_PREFIX);
610dbb70 798
b9d53092
BV
799 return SR_OK;
800}
801
55462b8b 802static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer)
b9d53092
BV
803{
804 const struct sr_dev_inst *sdi;
805 struct dslogic_trigger_pos *tpos;
40ebad35 806 struct dev_context *devc;
b9d53092
BV
807
808 sdi = transfer->user_data;
40ebad35
DA
809 devc = sdi->priv;
810 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
811 sr_dbg("Trigger transfer canceled.");
812 /* Terminate session. */
3be42bc2 813 std_session_send_df_end(sdi, LOG_PREFIX);
40ebad35
DA
814 usb_source_remove(sdi->session, devc->ctx);
815 devc->num_transfers = 0;
816 g_free(devc->transfers);
817 if (devc->stl) {
818 soft_trigger_logic_free(devc->stl);
819 devc->stl = NULL;
820 }
821 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
b9d53092
BV
822 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
823 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
3fc3fbe4 824 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos, tpos->ram_saddr, tpos->remain_cnt);
4237fbca 825 devc->trigger_pos = tpos->real_pos;
b9d53092
BV
826 g_free(tpos);
827 start_transfers(sdi);
828 }
b9d53092 829 libusb_free_transfer(transfer);
b9d53092
BV
830}
831
832static int dslogic_trigger_request(const struct sr_dev_inst *sdi)
833{
834 struct sr_usb_dev_inst *usb;
835 struct libusb_transfer *transfer;
836 struct dslogic_trigger_pos *tpos;
40ebad35 837 struct dev_context *devc;
b9d53092
BV
838 int ret;
839
840 usb = sdi->conn;
40ebad35 841 devc = sdi->priv;
b9d53092
BV
842
843 if ((ret = dslogic_stop_acquisition(sdi)) != SR_OK)
844 return ret;
845
846 if ((ret = dslogic_fpga_configure(sdi)) != SR_OK)
847 return ret;
f366e86c 848
3fc3fbe4
DA
849 /* if this is a dslogic pro, set the voltage threshold */
850 if (!strcmp(devc->profile->model, "DSLogic Pro")){
851 if(devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V){
852 dslogic_set_vth(sdi, 1.4);
853 }else{
854 dslogic_set_vth(sdi, 3.3);
855 }
856 }
857
b9d53092 858 if ((ret = dslogic_start_acquisition(sdi)) != SR_OK)
ebc34738 859 return ret;
b9d53092
BV
860
861 sr_dbg("Getting trigger.");
862 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
863 transfer = libusb_alloc_transfer(0);
864 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
865 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
866 dslogic_trigger_receive, (void *)sdi, 0);
867 if ((ret = libusb_submit_transfer(transfer)) < 0) {
868 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
869 libusb_free_transfer(transfer);
870 g_free(tpos);
871 return SR_ERR;
872 }
873
40ebad35
DA
874 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
875 if (!devc->transfers) {
876 sr_err("USB trigger_pos transfer malloc failed.");
877 return SR_ERR_MALLOC;
878 }
879 devc->num_transfers = 1;
880 devc->submitted_transfers++;
881 devc->transfers[0] = transfer;
882
b9d53092
BV
883 return ret;
884}
885
7fb90f94
BL
886static int configure_channels(const struct sr_dev_inst *sdi)
887{
888 struct dev_context *devc;
889 const GSList *l;
890 int p;
891 struct sr_channel *ch;
892
893 devc = sdi->priv;
894
895 g_slist_free(devc->enabled_analog_channels);
896 devc->enabled_analog_channels = NULL;
897 memset(devc->ch_enabled, 0, sizeof(devc->ch_enabled));
898
899 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
900 ch = l->data;
901 if ((p <= NUM_CHANNELS) && (ch->type == SR_CHANNEL_ANALOG)) {
902 devc->ch_enabled[p] = ch->enabled;
903 devc->enabled_analog_channels =
904 g_slist_append(devc->enabled_analog_channels, ch);
905 }
906 }
907
908 return SR_OK;
909}
910
695dc859 911static int dev_acquisition_start(const struct sr_dev_inst *sdi)
b9d53092 912{
4f840ce9 913 struct sr_dev_driver *di;
b9d53092
BV
914 struct drv_context *drvc;
915 struct dev_context *devc;
916 int timeout, ret;
7e5ccff2 917 size_t size;
b9d53092
BV
918
919 if (sdi->status != SR_ST_ACTIVE)
920 return SR_ERR_DEV_CLOSED;
921
4f840ce9 922 di = sdi->driver;
41812aca 923 drvc = di->context;
b9d53092
BV
924 devc = sdi->priv;
925
b9d53092 926 devc->ctx = drvc->sr_ctx;
b9d53092
BV
927 devc->sent_samples = 0;
928 devc->empty_transfer_count = 0;
929 devc->acq_aborted = FALSE;
930
7fb90f94
BL
931 if (configure_channels(sdi) != SR_OK) {
932 sr_err("Failed to configure channels.");
933 return SR_ERR;
934 }
935
b9d53092 936 timeout = fx2lafw_get_timeout(devc);
4f840ce9 937 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
b9d53092
BV
938
939 if (devc->dslogic) {
940 dslogic_trigger_request(sdi);
c442ffda 941 } else {
7e5ccff2
JH
942 size = fx2lafw_get_buffer_size(devc);
943 /* Prepare for analog sampling. */
944 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG) {
945 /* We need a buffer half the size of a transfer. */
946 devc->logic_buffer = g_try_malloc(size / 2);
947 devc->analog_buffer = g_try_malloc(
948 sizeof(float) * size / 2);
949 }
b9d53092 950 start_transfers(sdi);
815e3cb8
SA
951 if ((ret = fx2lafw_command_start_acquisition(sdi)) != SR_OK) {
952 fx2lafw_abort_acquisition(devc);
953 return ret;
954 }
017375d1
JH
955 }
956
f302a082
JH
957 return SR_OK;
958}
959
695dc859 960static int dev_acquisition_stop(struct sr_dev_inst *sdi)
f302a082 961{
1a7ff3d0
UH
962 struct dev_context *devc;
963
1a7ff3d0
UH
964 devc = sdi->priv;
965
966 if (devc->dslogic)
967 dslogic_stop_acquisition(sdi);
968
2f937611 969 fx2lafw_abort_acquisition(sdi->priv);
5da93902 970
f302a082
JH
971 return SR_OK;
972}
973
c09f0b57 974SR_PRIV struct sr_dev_driver fx2lafw_driver_info = {
f302a082 975 .name = "fx2lafw",
2e7cb004 976 .longname = "fx2lafw (generic driver for FX2 based LAs)",
f302a082 977 .api_version = 1,
c2fdcc25 978 .init = std_init,
700d6b64 979 .cleanup = std_cleanup,
6078d2c9 980 .scan = scan,
c01bf34c 981 .dev_list = std_dev_list,
7fb90f94 982 .dev_clear = dev_clear,
035a1078
BV
983 .config_get = config_get,
984 .config_set = config_set,
a1c743fc 985 .config_list = config_list,
6078d2c9
UH
986 .dev_open = dev_open,
987 .dev_close = dev_close,
988 .dev_acquisition_start = dev_acquisition_start,
989 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 990 .context = NULL,
f302a082 991};