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config_list: Don't check for sdi->priv != NULL.
[libsigrok.git] / src / hardware / fx2lafw / api.c
CommitLineData
f302a082 1/*
50985c20 2 * This file is part of the libsigrok project.
f302a082 3 *
13d8e03c 4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f302a082
JH
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
2f937611 22#include "protocol.h"
b9d53092 23#include "dslogic.h"
3fc3fbe4 24#include <math.h>
f302a082 25
4679d14d 26static const struct fx2lafw_profile supported_fx2[] = {
7ae2f9d5
UH
27 /*
28 * CWAV USBee AX
17b6c75a 29 * EE Electronics ESLA201A
9f05304e 30 * ARMFLY AX-Pro
17b6c75a 31 */
f8b07fc6 32 { 0x08a9, 0x0014, "CWAV", "USBee AX", NULL,
8e2d6c9d 33 "fx2lafw-cwav-usbeeax.fw",
232a975f 34 DEV_CAPS_AX_ANALOG, NULL, NULL},
0e8d0e24
IF
35 /*
36 * CWAV USBee DX
37 * XZL-Studio DX
38 */
39 { 0x08a9, 0x0015, "CWAV", "USBee DX", NULL,
8e2d6c9d 40 "fx2lafw-cwav-usbeedx.fw",
e826239c 41 DEV_CAPS_16BIT, NULL, NULL },
93a9f3da 42
7ae2f9d5
UH
43 /*
44 * CWAV USBee SX
4502e869
JH
45 */
46 { 0x08a9, 0x0009, "CWAV", "USBee SX", NULL,
8e2d6c9d 47 "fx2lafw-cwav-usbeesx.fw",
e826239c 48 0, NULL, NULL},
4502e869 49
b7c53d48 50 /* DreamSourceLab DSLogic (before FW upload) */
a7d7f93c 51 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 52 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c 53 DEV_CAPS_16BIT, NULL, NULL},
b7c53d48 54 /* DreamSourceLab DSLogic (after FW upload) */
a7d7f93c 55 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 56 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c
BV
57 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
58
b7c53d48
DG
59 /* DreamSourceLab DSCope (before FW upload) */
60 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 61 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
62 DEV_CAPS_16BIT, NULL, NULL},
63 /* DreamSourceLab DSCope (after FW upload) */
64 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 65 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
66 DEV_CAPS_16BIT, "DreamSourceLab", "DSCope"},
67
68 /* DreamSourceLab DSLogic Pro (before FW upload) */
69 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 70 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
71 DEV_CAPS_16BIT, NULL, NULL},
72 /* DreamSourceLab DSLogic Pro (after FW upload) */
73 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 74 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
75 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
76
7ae2f9d5
UH
77 /*
78 * Saleae Logic
93a9f3da
JH
79 * EE Electronics ESLA100
80 * Robomotic MiniLogic
1663e470 81 * Robomotic BugLogic 3
93a9f3da
JH
82 */
83 { 0x0925, 0x3881, "Saleae", "Logic", NULL,
8e2d6c9d 84 "fx2lafw-saleae-logic.fw",
e826239c 85 0, NULL, NULL},
93a9f3da 86
f488762a 87 /*
1663e470
UH
88 * Default Cypress FX2 without EEPROM, e.g.:
89 * Lcsoft Mini Board
90 * Braintechnology USB Interface V2.x
f488762a
JH
91 */
92 { 0x04B4, 0x8613, "Cypress", "FX2", NULL,
8e2d6c9d 93 "fx2lafw-cypress-fx2.fw",
e826239c 94 DEV_CAPS_16BIT, NULL, NULL },
f488762a 95
1663e470
UH
96 /*
97 * Braintechnology USB-LPS
98 */
99 { 0x16d0, 0x0498, "Braintechnology", "USB-LPS", NULL,
8e2d6c9d 100 "fx2lafw-braintechnology-usb-lps.fw",
e826239c 101 DEV_CAPS_16BIT, NULL, NULL },
1663e470 102
3e91de2b
UH
103 /*
104 * sigrok FX2 based 8-channel logic analyzer
105 */
106 { 0x1d50, 0x608c, "sigrok", "FX2 LA (8ch)", NULL,
087c4d59 107 "fx2lafw-sigrok-fx2-8ch.fw",
3e91de2b
UH
108 0, NULL, NULL},
109
110 /*
111 * sigrok FX2 based 16-channel logic analyzer
112 */
113 { 0x1d50, 0x608d, "sigrok", "FX2 LA (16ch)", NULL,
087c4d59 114 "fx2lafw-sigrok-fx2-16ch.fw",
3e91de2b
UH
115 DEV_CAPS_16BIT, NULL, NULL },
116
1b4aedc0 117 ALL_ZERO
187b3582
JH
118};
119
ff6b76a1
BV
120static const uint32_t drvopts[] = {
121 SR_CONF_LOGIC_ANALYZER,
122};
123
a0e0bb41 124static const uint32_t scanopts[] = {
89befd46
BV
125 SR_CONF_CONN,
126};
127
f254bc4b 128static const uint32_t devopts[] = {
e91bb0a6 129 SR_CONF_CONTINUOUS,
ff6b76a1 130 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
5827f61b
BV
131 SR_CONF_CONN | SR_CONF_GET,
132 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 133 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
7bfcb25c 134 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
8b35f474
JH
135};
136
3fc3fbe4 137static const uint32_t dslogic_devopts[] = {
41dc2547 138 SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET,
3fc3fbe4
DA
139 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
140 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
141 SR_CONF_CONN | SR_CONF_GET,
142 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
143 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
144 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
ea3a77c7 145 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
9803346f 146 SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3fc3fbe4
DA
147};
148
9615eeb5
BV
149static const int32_t soft_trigger_matches[] = {
150 SR_TRIGGER_ZERO,
151 SR_TRIGGER_ONE,
335122f0
BV
152 SR_TRIGGER_RISING,
153 SR_TRIGGER_FALLING,
154 SR_TRIGGER_EDGE,
9615eeb5
BV
155};
156
9803346f 157/* Names assigned to available edge slope choices. */
d9a58763
DA
158static const char *const signal_edge_names[] = {
159 [DS_EDGE_RISING] = "rising",
160 [DS_EDGE_FALLING] = "falling",
161};
162
3fc3fbe4
DA
163static const struct {
164 int range;
165 gdouble low;
166 gdouble high;
167} volt_thresholds[] = {
9803346f
UH
168 { DS_VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
169 { DS_VOLTAGE_RANGE_5_V, 1.4, 3.6 },
3fc3fbe4
DA
170};
171
d6836bf1 172static const uint64_t samplerates[] = {
79dc6498
JH
173 SR_KHZ(20),
174 SR_KHZ(25),
897c1a2e
JH
175 SR_KHZ(50),
176 SR_KHZ(100),
9304d576
JH
177 SR_KHZ(200),
178 SR_KHZ(250),
179 SR_KHZ(500),
8b35f474
JH
180 SR_MHZ(1),
181 SR_MHZ(2),
182 SR_MHZ(3),
183 SR_MHZ(4),
184 SR_MHZ(6),
185 SR_MHZ(8),
186 SR_MHZ(12),
187 SR_MHZ(16),
772a0e61 188 SR_MHZ(24),
8b35f474
JH
189};
190
a7d7f93c
BV
191static const uint64_t dslogic_samplerates[] = {
192 SR_KHZ(10),
193 SR_KHZ(20),
194 SR_KHZ(50),
195 SR_KHZ(100),
196 SR_KHZ(200),
197 SR_KHZ(500),
198 SR_MHZ(1),
199 SR_MHZ(2),
200 SR_MHZ(5),
201 SR_MHZ(10),
202 SR_MHZ(20),
203 SR_MHZ(25),
204 SR_MHZ(50),
205 SR_MHZ(100),
206 SR_MHZ(200),
207 SR_MHZ(400),
208};
209
a8cc8e44 210SR_PRIV struct sr_dev_driver fx2lafw_driver_info;
610dbb70 211
4f840ce9 212static GSList *scan(struct sr_dev_driver *di, GSList *options)
f302a082 213{
dc9dbe94
BV
214 struct drv_context *drvc;
215 struct dev_context *devc;
754b5ff2
BV
216 struct sr_dev_inst *sdi;
217 struct sr_usb_dev_inst *usb;
7fb90f94
BL
218 struct sr_channel *ch;
219 struct sr_channel_group *cg;
754b5ff2
BV
220 struct sr_config *src;
221 const struct fx2lafw_profile *prof;
222 GSList *l, *devices, *conn_devices;
a7d7f93c 223 gboolean has_firmware;
754b5ff2 224 struct libusb_device_descriptor des;
187b3582 225 libusb_device **devlist;
e826239c 226 struct libusb_device_handle *hdl;
232a975f
JH
227 int ret, i, j;
228 int num_logic_channels = 0, num_analog_channels = 0;
754b5ff2 229 const char *conn;
5e2c86eb 230 char manufacturer[64], product[64], serial_num[64], connection_id[64];
7fb90f94 231 char channel_name[16];
3a7a22cb 232
41812aca 233 drvc = di->context;
187b3582 234
754b5ff2
BV
235 conn = NULL;
236 for (l = options; l; l = l->next) {
237 src = l->data;
238 switch (src->key) {
239 case SR_CONF_CONN:
240 conn = g_variant_get_string(src->data, NULL);
241 break;
242 }
243 }
244 if (conn)
245 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
246 else
247 conn_devices = NULL;
248
921634ec 249 /* Find all fx2lafw compatible devices and upload firmware to them. */
3a7a22cb 250 devices = NULL;
d4abb463 251 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
187b3582 252 for (i = 0; devlist[i]; i++) {
754b5ff2
BV
253 if (conn) {
254 usb = NULL;
255 for (l = conn_devices; l; l = l->next) {
256 usb = l->data;
257 if (usb->bus == libusb_get_bus_number(devlist[i])
258 && usb->address == libusb_get_device_address(devlist[i]))
259 break;
260 }
261 if (!l)
262 /* This device matched none of the ones that
263 * matched the conn specification. */
264 continue;
265 }
187b3582 266
2a8f2d41 267 libusb_get_device_descriptor( devlist[i], &des);
187b3582 268
e826239c
ML
269 if ((ret = libusb_open(devlist[i], &hdl)) < 0)
270 continue;
271
272 if (des.iManufacturer == 0) {
273 manufacturer[0] = '\0';
274 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
275 des.iManufacturer, (unsigned char *) manufacturer,
276 sizeof(manufacturer))) < 0) {
277 sr_warn("Failed to get manufacturer string descriptor: %s.",
278 libusb_error_name(ret));
279 continue;
280 }
281
282 if (des.iProduct == 0) {
283 product[0] = '\0';
284 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
285 des.iProduct, (unsigned char *) product,
286 sizeof(product))) < 0) {
287 sr_warn("Failed to get product string descriptor: %s.",
288 libusb_error_name(ret));
289 continue;
290 }
291
5e2c86eb
SA
292 if (des.iSerialNumber == 0) {
293 serial_num[0] = '\0';
294 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
295 des.iSerialNumber, (unsigned char *) serial_num,
296 sizeof(serial_num))) < 0) {
297 sr_warn("Failed to get serial number string descriptor: %s.",
298 libusb_error_name(ret));
299 continue;
300 }
301
302 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
303
e826239c
ML
304 libusb_close(hdl);
305
da686568 306 prof = NULL;
187b3582
JH
307 for (j = 0; supported_fx2[j].vid; j++) {
308 if (des.idVendor == supported_fx2[j].vid &&
e826239c
ML
309 des.idProduct == supported_fx2[j].pid &&
310 (!supported_fx2[j].usb_manufacturer ||
311 !strcmp(manufacturer, supported_fx2[j].usb_manufacturer)) &&
312 (!supported_fx2[j].usb_manufacturer ||
313 !strcmp(product, supported_fx2[j].usb_product))) {
da686568 314 prof = &supported_fx2[j];
e826239c 315 break;
187b3582
JH
316 }
317 }
318
b99457f0 319 /* Skip if the device was not found. */
da686568 320 if (!prof)
187b3582
JH
321 continue;
322
aac29cc1 323 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
324 sdi->status = SR_ST_INITIALIZING;
325 sdi->vendor = g_strdup(prof->vendor);
326 sdi->model = g_strdup(prof->model);
327 sdi->version = g_strdup(prof->model_version);
a873c594 328 sdi->driver = di;
5e2c86eb
SA
329 sdi->serial_num = g_strdup(serial_num);
330 sdi->connection_id = g_strdup(connection_id);
187b3582 331
ba7dd8bb
UH
332 /* Fill in channellist according to this device's profile. */
333 num_logic_channels = prof->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
232a975f
JH
334 num_analog_channels = prof->dev_caps & DEV_CAPS_AX_ANALOG ? 1 : 0;
335
7fb90f94
BL
336 /* Logic channels, all in one channel group. */
337 cg = g_malloc0(sizeof(struct sr_channel_group));
338 cg->name = g_strdup("Logic");
339 for (j = 0; j < num_logic_channels; j++) {
340 sprintf(channel_name, "D%d", j);
341 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC,
342 TRUE, channel_name);
343 cg->channels = g_slist_append(cg->channels, ch);
344 }
345 sdi->channel_groups = g_slist_append(NULL, cg);
346
347 for (j = 0; j < num_analog_channels; j++) {
348 snprintf(channel_name, 16, "A%d", j);
349 ch = sr_channel_new(sdi, j + num_logic_channels,
350 SR_CHANNEL_ANALOG, TRUE, channel_name);
351
352 /* Every analog channel gets its own channel group. */
353 cg = g_malloc0(sizeof(struct sr_channel_group));
354 cg->name = g_strdup(channel_name);
355 cg->channels = g_slist_append(NULL, ch);
356 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
357 }
232a975f 358
dc9dbe94
BV
359 devc = fx2lafw_dev_new();
360 devc->profile = prof;
7fb90f94
BL
361 if ((prof->dev_caps & DEV_CAPS_16BIT) || (prof->dev_caps & DEV_CAPS_AX_ANALOG))
362 devc->sample_wide = TRUE;
dc9dbe94
BV
363 sdi->priv = devc;
364 drvc->instances = g_slist_append(drvc->instances, sdi);
a8cc8e44 365 devices = g_slist_append(devices, sdi);
187b3582 366
b7c53d48
DG
367 if (!strcmp(prof->model, "DSLogic")
368 || !strcmp(prof->model, "DSLogic Pro")
369 || !strcmp(prof->model, "DSCope")) {
370 devc->dslogic = TRUE;
371 devc->samplerates = dslogic_samplerates;
372 devc->num_samplerates = ARRAY_SIZE(dslogic_samplerates);
373 has_firmware = match_manuf_prod(devlist[i], "DreamSourceLab", "DSLogic")
374 || match_manuf_prod(devlist[i], "DreamSourceLab", "DSCope");
375 } else {
a7d7f93c
BV
376 devc->dslogic = FALSE;
377 devc->samplerates = samplerates;
378 devc->num_samplerates = ARRAY_SIZE(samplerates);
379 has_firmware = match_manuf_prod(devlist[i],
380 "sigrok", "fx2lafw");
a7d7f93c
BV
381 }
382
383 if (has_firmware) {
b1eeb67e 384 /* Already has the firmware, so fix the new address. */
f427daef 385 sr_dbg("Found an fx2lafw device.");
b1eeb67e 386 sdi->status = SR_ST_INACTIVE;
250a78c7
BV
387 sdi->inst_type = SR_INST_USB;
388 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
389 libusb_get_device_address(devlist[i]), NULL);
b1eeb67e 390 } else {
8e2d6c9d
DE
391 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
392 USB_CONFIGURATION, prof->firmware) == SR_OK)
b99457f0 393 /* Store when this device's FW was updated. */
dc9dbe94 394 devc->fw_updated = g_get_monotonic_time();
b1eeb67e 395 else
f427daef 396 sr_err("Firmware upload failed for "
5e2c86eb
SA
397 "device %d.%d (logical).",
398 libusb_get_bus_number(devlist[i]),
399 libusb_get_device_address(devlist[i]));
250a78c7 400 sdi->inst_type = SR_INST_USB;
87b545fb 401 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
250a78c7 402 0xff, NULL);
b1eeb67e 403 }
187b3582
JH
404 }
405 libusb_free_device_list(devlist, 1);
9dc7a75e 406 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
187b3582 407
3a7a22cb 408 return devices;
f302a082
JH
409}
410
7fb90f94
BL
411static void clear_dev_context(void *priv)
412{
413 struct dev_context *devc;
414
415 devc = priv;
416 g_slist_free(devc->enabled_analog_channels);
417 g_free(devc);
418}
419
420static int dev_clear(const struct sr_dev_driver *di)
421{
422 return std_dev_clear(di, clear_dev_context);
423}
424
6078d2c9 425static int dev_open(struct sr_dev_inst *sdi)
f302a082 426{
4f840ce9 427 struct sr_dev_driver *di = sdi->driver;
250a78c7 428 struct sr_usb_dev_inst *usb;
dc9dbe94 429 struct dev_context *devc;
2c240774 430 const char *fpga_firmware = NULL;
e8bd58ff
UH
431 int ret;
432 int64_t timediff_us, timediff_ms;
43125c69 433
dc9dbe94 434 devc = sdi->priv;
250a78c7 435 usb = sdi->conn;
43125c69
JH
436
437 /*
f60fdf6e
UH
438 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
439 * milliseconds for the FX2 to renumerate.
43125c69 440 */
3b6c1930 441 ret = SR_ERR;
dc9dbe94 442 if (devc->fw_updated > 0) {
f427daef 443 sr_info("Waiting for device to reset.");
b99457f0 444 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
43125c69 445 g_usleep(300 * 1000);
e8bd58ff 446 timediff_ms = 0;
f60fdf6e 447 while (timediff_ms < MAX_RENUM_DELAY_MS) {
2f937611 448 if ((ret = fx2lafw_dev_open(sdi, di)) == SR_OK)
43125c69
JH
449 break;
450 g_usleep(100 * 1000);
e8bd58ff 451
dc9dbe94 452 timediff_us = g_get_monotonic_time() - devc->fw_updated;
3b6c1930 453 timediff_ms = timediff_us / 1000;
b99457f0 454 sr_spew("Waited %" PRIi64 "ms.", timediff_ms);
43125c69 455 }
443a14d8
AG
456 if (ret != SR_OK) {
457 sr_err("Device failed to renumerate.");
458 return SR_ERR;
459 }
c0bf69c2 460 sr_info("Device came back after %" PRIi64 "ms.", timediff_ms);
43125c69 461 } else {
443a14d8 462 sr_info("Firmware upload was not needed.");
2f937611 463 ret = fx2lafw_dev_open(sdi, di);
43125c69
JH
464 }
465
ebc34738 466 if (ret != SR_OK) {
f427daef 467 sr_err("Unable to open device.");
43125c69
JH
468 return SR_ERR;
469 }
378abfea 470
250a78c7 471 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
ebc34738 472 if (ret != 0) {
87b545fb 473 switch (ret) {
0c156e06 474 case LIBUSB_ERROR_BUSY:
f427daef 475 sr_err("Unable to claim USB interface. Another "
b99457f0 476 "program or driver has already claimed it.");
0c156e06 477 break;
0c156e06 478 case LIBUSB_ERROR_NO_DEVICE:
f427daef 479 sr_err("Device has been disconnected.");
0c156e06 480 break;
0c156e06 481 default:
f427daef 482 sr_err("Unable to claim interface: %s.",
d4928d71 483 libusb_error_name(ret));
0c156e06
JH
484 break;
485 }
486
43125c69
JH
487 return SR_ERR;
488 }
489
a7d7f93c 490 if (devc->dslogic) {
b7c53d48 491 if (!strcmp(devc->profile->model, "DSLogic")) {
3fc3fbe4
DA
492 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V)
493 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_3V3;
494 else
495 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
496 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
b7c53d48
DG
497 fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
498 } else if (!strcmp(devc->profile->model, "DSCope")) {
499 fpga_firmware = DSCOPE_FPGA_FIRMWARE;
500 }
501
3fc3fbe4 502 if ((ret = dslogic_fpga_firmware_upload(sdi, fpga_firmware)) != SR_OK)
a7d7f93c
BV
503 return ret;
504 }
dc9dbe94 505 if (devc->cur_samplerate == 0) {
f92994fd 506 /* Samplerate hasn't been set; default to the slowest one. */
a7d7f93c 507 devc->cur_samplerate = devc->samplerates[0];
f92994fd
JH
508 }
509
f302a082
JH
510 return SR_OK;
511}
512
6078d2c9 513static int dev_close(struct sr_dev_inst *sdi)
f302a082 514{
250a78c7 515 struct sr_usb_dev_inst *usb;
961009b0 516
250a78c7 517 usb = sdi->conn;
9803346f 518
98fec29e 519 if (!usb->devhdl)
25a0f108 520 return SR_ERR;
f1898235 521
5e2c86eb
SA
522 sr_info("fx2lafw: Closing device on %d.%d (logical) / %s (physical) interface %d.",
523 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
250a78c7
BV
524 libusb_release_interface(usb->devhdl, USB_INTERFACE);
525 libusb_close(usb->devhdl);
526 usb->devhdl = NULL;
25a0f108 527 sdi->status = SR_ST_INACTIVE;
f1898235 528
f302a082
JH
529 return SR_OK;
530}
531
9803346f
UH
532static int config_get(uint32_t key, GVariant **data,
533 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 534{
dc9dbe94 535 struct dev_context *devc;
89befd46 536 struct sr_usb_dev_inst *usb;
3fc3fbe4
DA
537 GVariant *range[2];
538 unsigned int i;
89befd46 539 char str[128];
8b35f474 540
53b4680f 541 (void)cg;
8f996b89 542
a920a7d8
ML
543 if (!sdi)
544 return SR_ERR_ARG;
545
546 devc = sdi->priv;
547
584560f1 548 switch (key) {
89befd46 549 case SR_CONF_CONN:
a920a7d8 550 if (!sdi->conn)
38ab8dbe 551 return SR_ERR_ARG;
89befd46
BV
552 usb = sdi->conn;
553 if (usb->address == 255)
554 /* Device still needs to re-enumerate after firmware
555 * upload, so we don't know its (future) address. */
556 return SR_ERR;
557 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
558 *data = g_variant_new_string(str);
559 break;
3fc3fbe4
DA
560 case SR_CONF_VOLTAGE_THRESHOLD:
561 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
562 if (volt_thresholds[i].range != devc->dslogic_voltage_threshold)
563 continue;
564 range[0] = g_variant_new_double(volt_thresholds[i].low);
565 range[1] = g_variant_new_double(volt_thresholds[i].high);
566 *data = g_variant_new_tuple(range, 2);
567 break;
568 }
569 break;
a920a7d8
ML
570 case SR_CONF_LIMIT_SAMPLES:
571 *data = g_variant_new_uint64(devc->limit_samples);
572 break;
123e1313 573 case SR_CONF_SAMPLERATE:
89befd46 574 *data = g_variant_new_uint64(devc->cur_samplerate);
6e9339aa 575 break;
7bfcb25c
AJ
576 case SR_CONF_CAPTURE_RATIO:
577 *data = g_variant_new_uint64(devc->capture_ratio);
578 break;
ea3a77c7
DA
579 case SR_CONF_EXTERNAL_CLOCK:
580 *data = g_variant_new_boolean(devc->dslogic_external_clock);
581 break;
41dc2547
DA
582 case SR_CONF_CONTINUOUS:
583 *data = g_variant_new_boolean(devc->dslogic_continuous_mode);
584 break;
d9a58763
DA
585 case SR_CONF_CLOCK_EDGE:
586 i = devc->dslogic_clock_edge;
587 if (i >= ARRAY_SIZE(signal_edge_names))
588 return SR_ERR_BUG;
9803346f 589 *data = g_variant_new_string(signal_edge_names[0]);
d9a58763 590 break;
6e9339aa 591 default:
bd6fbf62 592 return SR_ERR_NA;
8b35f474
JH
593 }
594
6e9339aa 595 return SR_OK;
f302a082
JH
596}
597
9803346f
UH
598/*
599 * Helper for mapping a string-typed configuration value to an index
d9a58763
DA
600 * within a table of possible values.
601 */
602static int lookup_index(GVariant *value, const char *const *table, int len)
603{
604 const char *entry;
605 int i;
606
607 entry = g_variant_get_string(value, NULL);
608 if (!entry)
609 return -1;
610
611 /* Linear search is fine for very small tables. */
612 for (i = 0; i < len; i++) {
613 if (strcmp(entry, table[i]) == 0)
614 return i;
615 }
616
617 return -1;
618}
619
9803346f
UH
620static int config_set(uint32_t key, GVariant *data,
621 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 622{
dc9dbe94 623 struct dev_context *devc;
4d7b36a0 624 uint64_t arg;
65e00366 625 int i, ret;
3fc3fbe4 626 gdouble low, high;
7cb621d4 627
53b4680f 628 (void)cg;
8f996b89 629
1c48000d
ML
630 if (!sdi)
631 return SR_ERR_ARG;
632
e73ffd42
BV
633 if (sdi->status != SR_ST_ACTIVE)
634 return SR_ERR;
635
dc9dbe94 636 devc = sdi->priv;
7cb621d4 637
1c48000d
ML
638 ret = SR_OK;
639
584560f1 640 switch (key) {
93b118da
UH
641 case SR_CONF_SAMPLERATE:
642 arg = g_variant_get_uint64(data);
65e00366
CFS
643 for (i = 0; i < devc->num_samplerates; i++) {
644 if (devc->samplerates[i] == arg) {
93b118da
UH
645 devc->cur_samplerate = arg;
646 break;
4d7b36a0 647 }
93b118da 648 }
65e00366 649 if (i == devc->num_samplerates)
93b118da
UH
650 ret = SR_ERR_ARG;
651 break;
652 case SR_CONF_LIMIT_SAMPLES:
653 devc->limit_samples = g_variant_get_uint64(data);
654 break;
655 case SR_CONF_CAPTURE_RATIO:
656 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 657 ret = (devc->capture_ratio > 100) ? SR_ERR : SR_OK;
93b118da 658 break;
3fc3fbe4
DA
659 case SR_CONF_VOLTAGE_THRESHOLD:
660 g_variant_get(data, "(dd)", &low, &high);
661 ret = SR_ERR_ARG;
662 for (i = 0; (unsigned int)i < ARRAY_SIZE(volt_thresholds); i++) {
663 if (fabs(volt_thresholds[i].low - low) < 0.1 &&
664 fabs(volt_thresholds[i].high - high) < 0.1) {
665 devc->dslogic_voltage_threshold = volt_thresholds[i].range;
666 break;
667 }
668 }
669 if (!strcmp(devc->profile->model, "DSLogic")) {
670 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_5_V)
671 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_5V);
672 else
673 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
9803346f 674 } else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
3fc3fbe4
DA
675 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
676 }
677 break;
ea3a77c7
DA
678 case SR_CONF_EXTERNAL_CLOCK:
679 devc->dslogic_external_clock = g_variant_get_boolean(data);
680 break;
41dc2547
DA
681 case SR_CONF_CONTINUOUS:
682 devc->dslogic_continuous_mode = g_variant_get_boolean(data);
683 break;
d9a58763
DA
684 case SR_CONF_CLOCK_EDGE:
685 i = lookup_index(data, signal_edge_names,
686 ARRAY_SIZE(signal_edge_names));
687 if (i < 0)
688 return SR_ERR_ARG;
689 devc->dslogic_clock_edge = i;
690 break;
93b118da
UH
691 default:
692 ret = SR_ERR_NA;
7cb621d4
JH
693 }
694
695 return ret;
f302a082
JH
696}
697
9803346f
UH
698static int config_list(uint32_t key, GVariant **data,
699 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 700{
a7d7f93c 701 struct dev_context *devc;
3fc3fbe4 702 GVariant *gvar, *range[2];
d6836bf1 703 GVariantBuilder gvb;
3fc3fbe4 704 unsigned int i;
a1c743fc 705
53b4680f 706 (void)cg;
a1c743fc
BV
707
708 switch (key) {
89befd46 709 case SR_CONF_SCAN_OPTIONS:
584560f1 710 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 711 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
89befd46 712 break;
9a6517d1 713 case SR_CONF_DEVICE_OPTIONS:
9803346f 714 if (!sdi) {
ff6b76a1 715 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
9803346f
UH
716 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
717 } else {
3fc3fbe4
DA
718 devc = sdi->priv;
719 if (!devc->dslogic)
720 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
721 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
722 else
723 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
724 dslogic_devopts, ARRAY_SIZE(dslogic_devopts), sizeof(uint32_t));
725 }
726 break;
727 case SR_CONF_VOLTAGE_THRESHOLD:
9803346f
UH
728 if (!sdi->priv)
729 return SR_ERR_ARG;
3fc3fbe4 730 devc = sdi->priv;
9803346f
UH
731 if (!devc->dslogic)
732 return SR_ERR_NA;
3fc3fbe4
DA
733 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
734 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
735 range[0] = g_variant_new_double(volt_thresholds[i].low);
736 range[1] = g_variant_new_double(volt_thresholds[i].high);
737 gvar = g_variant_new_tuple(range, 2);
738 g_variant_builder_add_value(&gvb, gvar);
739 }
740 *data = g_variant_builder_end(&gvb);
9a6517d1 741 break;
a1c743fc 742 case SR_CONF_SAMPLERATE:
a7d7f93c 743 devc = sdi->priv;
d6836bf1 744 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
a7d7f93c
BV
745 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), devc->samplerates,
746 devc->num_samplerates, sizeof(uint64_t));
d6836bf1
BV
747 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
748 *data = g_variant_builder_end(&gvb);
a1c743fc 749 break;
9615eeb5
BV
750 case SR_CONF_TRIGGER_MATCH:
751 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
752 soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
753 sizeof(int32_t));
c50277a6 754 break;
d9a58763
DA
755 case SR_CONF_CLOCK_EDGE:
756 *data = g_variant_new_strv(signal_edge_names,
757 ARRAY_SIZE(signal_edge_names));
758 break;
a1c743fc 759 default:
bd6fbf62 760 return SR_ERR_NA;
a1c743fc
BV
761 }
762
763 return SR_OK;
764}
765
1f9813eb 766static int receive_data(int fd, int revents, void *cb_data)
610dbb70
JH
767{
768 struct timeval tv;
b99457f0 769 struct drv_context *drvc;
610dbb70 770
610dbb70
JH
771 (void)fd;
772 (void)revents;
610dbb70 773
1a863916 774 drvc = (struct drv_context *)cb_data;
b99457f0 775
610dbb70 776 tv.tv_sec = tv.tv_usec = 0;
d4abb463 777 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
610dbb70
JH
778
779 return TRUE;
780}
781
b9d53092 782static int start_transfers(const struct sr_dev_inst *sdi)
f302a082 783{
dc9dbe94 784 struct dev_context *devc;
250a78c7 785 struct sr_usb_dev_inst *usb;
335122f0 786 struct sr_trigger *trigger;
610dbb70 787 struct libusb_transfer *transfer;
b9d53092
BV
788 unsigned int i, num_transfers;
789 int endpoint, timeout, ret;
610dbb70 790 unsigned char *buf;
b99457f0 791 size_t size;
610dbb70 792
dc9dbe94 793 devc = sdi->priv;
250a78c7 794 usb = sdi->conn;
b99457f0 795
b0ccd64d
BV
796 devc->sent_samples = 0;
797 devc->acq_aborted = FALSE;
dc9dbe94 798 devc->empty_transfer_count = 0;
610dbb70 799
4237fbca 800 if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
7bfcb25c
AJ
801 int pre_trigger_samples = 0;
802 if (devc->limit_samples > 0)
803 pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
804 devc->stl = soft_trigger_logic_new(sdi, trigger, pre_trigger_samples);
98fec29e 805 if (!devc->stl)
7bfcb25c 806 return SR_ERR_MALLOC;
9615eeb5 807 devc->trigger_fired = FALSE;
9615eeb5
BV
808 } else
809 devc->trigger_fired = TRUE;
810
2f937611 811 num_transfers = fx2lafw_get_number_of_transfers(devc);
a04b28ce
DA
812
813 //if (devc->dslogic)
814 // num_transfers = dslogic_get_number_of_transfers(devc);
815
9803346f
UH
816 if (devc->dslogic) {
817 if (devc->cur_samplerate == SR_MHZ(100))
a04b28ce
DA
818 num_transfers = 16;
819 else if (devc->cur_samplerate == SR_MHZ(200))
820 num_transfers = 8;
821 else if (devc->cur_samplerate == SR_MHZ(400))
822 num_transfers = 4;
823 }
824
2f937611 825 size = fx2lafw_get_buffer_size(devc);
2a67abfe 826 devc->submitted_transfers = 0;
5af666a9 827
dc9dbe94 828 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
886a52b6 829 if (!devc->transfers) {
f427daef 830 sr_err("USB transfers malloc failed.");
886a52b6
UH
831 return SR_ERR_MALLOC;
832 }
0caa1ef0 833
b9d53092
BV
834 timeout = fx2lafw_get_timeout(devc);
835 endpoint = devc->dslogic ? 6 : 2;
dc9dbe94 836 devc->num_transfers = num_transfers;
5af666a9 837 for (i = 0; i < num_transfers; i++) {
610dbb70 838 if (!(buf = g_try_malloc(size))) {
b99457f0 839 sr_err("USB transfer buffer malloc failed.");
610dbb70
JH
840 return SR_ERR_MALLOC;
841 }
842 transfer = libusb_alloc_transfer(0);
250a78c7 843 libusb_fill_bulk_transfer(transfer, usb->devhdl,
b9d53092 844 endpoint | LIBUSB_ENDPOINT_IN, buf, size,
9615eeb5 845 fx2lafw_receive_transfer, (void *)sdi, timeout);
a04b28ce 846 sr_info("submitting transfer: %d", i);
d4928d71 847 if ((ret = libusb_submit_transfer(transfer)) != 0) {
b99457f0
UH
848 sr_err("Failed to submit transfer: %s.",
849 libusb_error_name(ret));
610dbb70
JH
850 libusb_free_transfer(transfer);
851 g_free(buf);
2f937611 852 fx2lafw_abort_acquisition(devc);
610dbb70
JH
853 return SR_ERR;
854 }
dc9dbe94
BV
855 devc->transfers[i] = transfer;
856 devc->submitted_transfers++;
610dbb70
JH
857 }
858
7e5ccff2
JH
859 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG)
860 devc->send_data_proc = mso_send_data_proc;
861 else
862 devc->send_data_proc = la_send_data_proc;
7b5d1c64 863
6fcf3f0a 864 std_session_send_df_header(sdi, LOG_PREFIX);
610dbb70 865
b9d53092
BV
866 return SR_OK;
867}
868
55462b8b 869static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer)
b9d53092
BV
870{
871 const struct sr_dev_inst *sdi;
872 struct dslogic_trigger_pos *tpos;
40ebad35 873 struct dev_context *devc;
b9d53092
BV
874
875 sdi = transfer->user_data;
40ebad35
DA
876 devc = sdi->priv;
877 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
878 sr_dbg("Trigger transfer canceled.");
879 /* Terminate session. */
3be42bc2 880 std_session_send_df_end(sdi, LOG_PREFIX);
40ebad35
DA
881 usb_source_remove(sdi->session, devc->ctx);
882 devc->num_transfers = 0;
883 g_free(devc->transfers);
884 if (devc->stl) {
885 soft_trigger_logic_free(devc->stl);
886 devc->stl = NULL;
887 }
888 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
b9d53092
BV
889 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
890 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
9803346f
UH
891 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
892 tpos->ram_saddr, tpos->remain_cnt);
893 devc->trigger_pos = tpos->real_pos;
b9d53092
BV
894 g_free(tpos);
895 start_transfers(sdi);
896 }
b9d53092 897 libusb_free_transfer(transfer);
b9d53092
BV
898}
899
900static int dslogic_trigger_request(const struct sr_dev_inst *sdi)
901{
902 struct sr_usb_dev_inst *usb;
903 struct libusb_transfer *transfer;
904 struct dslogic_trigger_pos *tpos;
40ebad35 905 struct dev_context *devc;
b9d53092
BV
906 int ret;
907
908 usb = sdi->conn;
40ebad35 909 devc = sdi->priv;
b9d53092
BV
910
911 if ((ret = dslogic_stop_acquisition(sdi)) != SR_OK)
912 return ret;
913
914 if ((ret = dslogic_fpga_configure(sdi)) != SR_OK)
915 return ret;
f366e86c 916
9803346f 917 /* If this is a DSLogic Pro, set the voltage threshold. */
3fc3fbe4 918 if (!strcmp(devc->profile->model, "DSLogic Pro")){
9803346f 919 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V) {
3fc3fbe4 920 dslogic_set_vth(sdi, 1.4);
9803346f 921 } else {
3fc3fbe4
DA
922 dslogic_set_vth(sdi, 3.3);
923 }
924 }
925
b9d53092 926 if ((ret = dslogic_start_acquisition(sdi)) != SR_OK)
ebc34738 927 return ret;
b9d53092
BV
928
929 sr_dbg("Getting trigger.");
930 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
931 transfer = libusb_alloc_transfer(0);
932 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
933 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
934 dslogic_trigger_receive, (void *)sdi, 0);
935 if ((ret = libusb_submit_transfer(transfer)) < 0) {
936 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
937 libusb_free_transfer(transfer);
938 g_free(tpos);
939 return SR_ERR;
940 }
941
40ebad35
DA
942 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
943 if (!devc->transfers) {
944 sr_err("USB trigger_pos transfer malloc failed.");
945 return SR_ERR_MALLOC;
946 }
947 devc->num_transfers = 1;
948 devc->submitted_transfers++;
949 devc->transfers[0] = transfer;
950
b9d53092
BV
951 return ret;
952}
953
7fb90f94
BL
954static int configure_channels(const struct sr_dev_inst *sdi)
955{
956 struct dev_context *devc;
957 const GSList *l;
958 int p;
959 struct sr_channel *ch;
960
961 devc = sdi->priv;
962
963 g_slist_free(devc->enabled_analog_channels);
964 devc->enabled_analog_channels = NULL;
965 memset(devc->ch_enabled, 0, sizeof(devc->ch_enabled));
966
967 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
968 ch = l->data;
969 if ((p <= NUM_CHANNELS) && (ch->type == SR_CHANNEL_ANALOG)) {
970 devc->ch_enabled[p] = ch->enabled;
971 devc->enabled_analog_channels =
972 g_slist_append(devc->enabled_analog_channels, ch);
973 }
974 }
975
976 return SR_OK;
977}
978
695dc859 979static int dev_acquisition_start(const struct sr_dev_inst *sdi)
b9d53092 980{
4f840ce9 981 struct sr_dev_driver *di;
b9d53092
BV
982 struct drv_context *drvc;
983 struct dev_context *devc;
984 int timeout, ret;
7e5ccff2 985 size_t size;
b9d53092
BV
986
987 if (sdi->status != SR_ST_ACTIVE)
988 return SR_ERR_DEV_CLOSED;
989
4f840ce9 990 di = sdi->driver;
41812aca 991 drvc = di->context;
b9d53092
BV
992 devc = sdi->priv;
993
b9d53092 994 devc->ctx = drvc->sr_ctx;
b9d53092
BV
995 devc->sent_samples = 0;
996 devc->empty_transfer_count = 0;
997 devc->acq_aborted = FALSE;
998
7fb90f94
BL
999 if (configure_channels(sdi) != SR_OK) {
1000 sr_err("Failed to configure channels.");
1001 return SR_ERR;
1002 }
1003
b9d53092 1004 timeout = fx2lafw_get_timeout(devc);
4f840ce9 1005 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
b9d53092
BV
1006
1007 if (devc->dslogic) {
1008 dslogic_trigger_request(sdi);
c442ffda 1009 } else {
7e5ccff2
JH
1010 size = fx2lafw_get_buffer_size(devc);
1011 /* Prepare for analog sampling. */
1012 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG) {
1013 /* We need a buffer half the size of a transfer. */
1014 devc->logic_buffer = g_try_malloc(size / 2);
1015 devc->analog_buffer = g_try_malloc(
1016 sizeof(float) * size / 2);
1017 }
b9d53092 1018 start_transfers(sdi);
815e3cb8
SA
1019 if ((ret = fx2lafw_command_start_acquisition(sdi)) != SR_OK) {
1020 fx2lafw_abort_acquisition(devc);
1021 return ret;
1022 }
017375d1
JH
1023 }
1024
f302a082
JH
1025 return SR_OK;
1026}
1027
695dc859 1028static int dev_acquisition_stop(struct sr_dev_inst *sdi)
f302a082 1029{
1a7ff3d0
UH
1030 struct dev_context *devc;
1031
1a7ff3d0
UH
1032 devc = sdi->priv;
1033
1034 if (devc->dslogic)
1035 dslogic_stop_acquisition(sdi);
1036
2f937611 1037 fx2lafw_abort_acquisition(sdi->priv);
5da93902 1038
f302a082
JH
1039 return SR_OK;
1040}
1041
c09f0b57 1042SR_PRIV struct sr_dev_driver fx2lafw_driver_info = {
f302a082 1043 .name = "fx2lafw",
2e7cb004 1044 .longname = "fx2lafw (generic driver for FX2 based LAs)",
f302a082 1045 .api_version = 1,
c2fdcc25 1046 .init = std_init,
700d6b64 1047 .cleanup = std_cleanup,
6078d2c9 1048 .scan = scan,
c01bf34c 1049 .dev_list = std_dev_list,
7fb90f94 1050 .dev_clear = dev_clear,
035a1078
BV
1051 .config_get = config_get,
1052 .config_set = config_set,
a1c743fc 1053 .config_list = config_list,
6078d2c9
UH
1054 .dev_open = dev_open,
1055 .dev_close = dev_close,
1056 .dev_acquisition_start = dev_acquisition_start,
1057 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 1058 .context = NULL,
f302a082 1059};