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Add VID/PID for the CWAV USBee ZX.
[libsigrok.git] / src / hardware / fx2lafw / api.c
CommitLineData
f302a082 1/*
50985c20 2 * This file is part of the libsigrok project.
f302a082 3 *
13d8e03c 4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f302a082
JH
5 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
6ec6c43b 21#include <config.h>
2f937611 22#include "protocol.h"
b9d53092 23#include "dslogic.h"
3fc3fbe4 24#include <math.h>
f302a082 25
4679d14d 26static const struct fx2lafw_profile supported_fx2[] = {
7ae2f9d5
UH
27 /*
28 * CWAV USBee AX
17b6c75a 29 * EE Electronics ESLA201A
9f05304e 30 * ARMFLY AX-Pro
17b6c75a 31 */
f8b07fc6 32 { 0x08a9, 0x0014, "CWAV", "USBee AX", NULL,
8e2d6c9d 33 "fx2lafw-cwav-usbeeax.fw",
232a975f 34 DEV_CAPS_AX_ANALOG, NULL, NULL},
0e8d0e24
IF
35 /*
36 * CWAV USBee DX
37 * XZL-Studio DX
38 */
39 { 0x08a9, 0x0015, "CWAV", "USBee DX", NULL,
8e2d6c9d 40 "fx2lafw-cwav-usbeedx.fw",
e826239c 41 DEV_CAPS_16BIT, NULL, NULL },
93a9f3da 42
7ae2f9d5
UH
43 /*
44 * CWAV USBee SX
4502e869
JH
45 */
46 { 0x08a9, 0x0009, "CWAV", "USBee SX", NULL,
8e2d6c9d 47 "fx2lafw-cwav-usbeesx.fw",
e826239c 48 0, NULL, NULL},
4502e869 49
2f4b0f6a
T
50 /*
51 * CWAV USBee ZX
52 */
53 { 0x08a9, 0x0005, "CWAV", "USBee ZX", NULL,
54 "fx2lafw-cwav-usbeezx.fw",
55 0, NULL, NULL},
56
b7c53d48 57 /* DreamSourceLab DSLogic (before FW upload) */
a7d7f93c 58 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 59 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c 60 DEV_CAPS_16BIT, NULL, NULL},
b7c53d48 61 /* DreamSourceLab DSLogic (after FW upload) */
a7d7f93c 62 { 0x2a0e, 0x0001, "DreamSourceLab", "DSLogic", NULL,
8e2d6c9d 63 "dreamsourcelab-dslogic-fx2.fw",
a7d7f93c
BV
64 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
65
b7c53d48
DG
66 /* DreamSourceLab DSCope (before FW upload) */
67 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 68 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
69 DEV_CAPS_16BIT, NULL, NULL},
70 /* DreamSourceLab DSCope (after FW upload) */
71 { 0x2a0e, 0x0002, "DreamSourceLab", "DSCope", NULL,
8e2d6c9d 72 "dreamsourcelab-dscope-fx2.fw",
b7c53d48
DG
73 DEV_CAPS_16BIT, "DreamSourceLab", "DSCope"},
74
75 /* DreamSourceLab DSLogic Pro (before FW upload) */
76 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 77 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
78 DEV_CAPS_16BIT, NULL, NULL},
79 /* DreamSourceLab DSLogic Pro (after FW upload) */
80 { 0x2a0e, 0x0003, "DreamSourceLab", "DSLogic Pro", NULL,
8e2d6c9d 81 "dreamsourcelab-dslogic-pro-fx2.fw",
b7c53d48
DG
82 DEV_CAPS_16BIT, "DreamSourceLab", "DSLogic"},
83
7ae2f9d5
UH
84 /*
85 * Saleae Logic
93a9f3da
JH
86 * EE Electronics ESLA100
87 * Robomotic MiniLogic
1663e470 88 * Robomotic BugLogic 3
93a9f3da
JH
89 */
90 { 0x0925, 0x3881, "Saleae", "Logic", NULL,
8e2d6c9d 91 "fx2lafw-saleae-logic.fw",
e826239c 92 0, NULL, NULL},
93a9f3da 93
f488762a 94 /*
1663e470
UH
95 * Default Cypress FX2 without EEPROM, e.g.:
96 * Lcsoft Mini Board
97 * Braintechnology USB Interface V2.x
f488762a
JH
98 */
99 { 0x04B4, 0x8613, "Cypress", "FX2", NULL,
8e2d6c9d 100 "fx2lafw-cypress-fx2.fw",
e826239c 101 DEV_CAPS_16BIT, NULL, NULL },
f488762a 102
1663e470
UH
103 /*
104 * Braintechnology USB-LPS
105 */
106 { 0x16d0, 0x0498, "Braintechnology", "USB-LPS", NULL,
8e2d6c9d 107 "fx2lafw-braintechnology-usb-lps.fw",
e826239c 108 DEV_CAPS_16BIT, NULL, NULL },
1663e470 109
3e91de2b
UH
110 /*
111 * sigrok FX2 based 8-channel logic analyzer
112 */
113 { 0x1d50, 0x608c, "sigrok", "FX2 LA (8ch)", NULL,
087c4d59 114 "fx2lafw-sigrok-fx2-8ch.fw",
3e91de2b
UH
115 0, NULL, NULL},
116
117 /*
118 * sigrok FX2 based 16-channel logic analyzer
119 */
120 { 0x1d50, 0x608d, "sigrok", "FX2 LA (16ch)", NULL,
087c4d59 121 "fx2lafw-sigrok-fx2-16ch.fw",
3e91de2b
UH
122 DEV_CAPS_16BIT, NULL, NULL },
123
1b4aedc0 124 ALL_ZERO
187b3582
JH
125};
126
ff6b76a1
BV
127static const uint32_t drvopts[] = {
128 SR_CONF_LOGIC_ANALYZER,
129};
130
a0e0bb41 131static const uint32_t scanopts[] = {
89befd46
BV
132 SR_CONF_CONN,
133};
134
f254bc4b 135static const uint32_t devopts[] = {
e91bb0a6 136 SR_CONF_CONTINUOUS,
ff6b76a1 137 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
5827f61b
BV
138 SR_CONF_CONN | SR_CONF_GET,
139 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 140 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
7bfcb25c 141 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
8b35f474
JH
142};
143
3fc3fbe4 144static const uint32_t dslogic_devopts[] = {
41dc2547 145 SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET,
3fc3fbe4
DA
146 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
147 SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
148 SR_CONF_CONN | SR_CONF_GET,
149 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
150 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
151 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
ea3a77c7 152 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
9803346f 153 SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
3fc3fbe4
DA
154};
155
9615eeb5
BV
156static const int32_t soft_trigger_matches[] = {
157 SR_TRIGGER_ZERO,
158 SR_TRIGGER_ONE,
335122f0
BV
159 SR_TRIGGER_RISING,
160 SR_TRIGGER_FALLING,
161 SR_TRIGGER_EDGE,
9615eeb5
BV
162};
163
9803346f 164/* Names assigned to available edge slope choices. */
d9a58763
DA
165static const char *const signal_edge_names[] = {
166 [DS_EDGE_RISING] = "rising",
167 [DS_EDGE_FALLING] = "falling",
168};
169
3fc3fbe4
DA
170static const struct {
171 int range;
172 gdouble low;
173 gdouble high;
174} volt_thresholds[] = {
9803346f
UH
175 { DS_VOLTAGE_RANGE_18_33_V, 0.7, 1.4 },
176 { DS_VOLTAGE_RANGE_5_V, 1.4, 3.6 },
3fc3fbe4
DA
177};
178
d6836bf1 179static const uint64_t samplerates[] = {
79dc6498
JH
180 SR_KHZ(20),
181 SR_KHZ(25),
897c1a2e
JH
182 SR_KHZ(50),
183 SR_KHZ(100),
9304d576
JH
184 SR_KHZ(200),
185 SR_KHZ(250),
186 SR_KHZ(500),
8b35f474
JH
187 SR_MHZ(1),
188 SR_MHZ(2),
189 SR_MHZ(3),
190 SR_MHZ(4),
191 SR_MHZ(6),
192 SR_MHZ(8),
193 SR_MHZ(12),
194 SR_MHZ(16),
772a0e61 195 SR_MHZ(24),
8b35f474
JH
196};
197
a7d7f93c
BV
198static const uint64_t dslogic_samplerates[] = {
199 SR_KHZ(10),
200 SR_KHZ(20),
201 SR_KHZ(50),
202 SR_KHZ(100),
203 SR_KHZ(200),
204 SR_KHZ(500),
205 SR_MHZ(1),
206 SR_MHZ(2),
207 SR_MHZ(5),
208 SR_MHZ(10),
209 SR_MHZ(20),
210 SR_MHZ(25),
211 SR_MHZ(50),
212 SR_MHZ(100),
213 SR_MHZ(200),
214 SR_MHZ(400),
215};
216
4f840ce9 217static GSList *scan(struct sr_dev_driver *di, GSList *options)
f302a082 218{
dc9dbe94
BV
219 struct drv_context *drvc;
220 struct dev_context *devc;
754b5ff2
BV
221 struct sr_dev_inst *sdi;
222 struct sr_usb_dev_inst *usb;
7fb90f94
BL
223 struct sr_channel *ch;
224 struct sr_channel_group *cg;
754b5ff2
BV
225 struct sr_config *src;
226 const struct fx2lafw_profile *prof;
227 GSList *l, *devices, *conn_devices;
a7d7f93c 228 gboolean has_firmware;
754b5ff2 229 struct libusb_device_descriptor des;
187b3582 230 libusb_device **devlist;
e826239c 231 struct libusb_device_handle *hdl;
232a975f
JH
232 int ret, i, j;
233 int num_logic_channels = 0, num_analog_channels = 0;
754b5ff2 234 const char *conn;
5e2c86eb 235 char manufacturer[64], product[64], serial_num[64], connection_id[64];
7fb90f94 236 char channel_name[16];
3a7a22cb 237
41812aca 238 drvc = di->context;
187b3582 239
754b5ff2
BV
240 conn = NULL;
241 for (l = options; l; l = l->next) {
242 src = l->data;
243 switch (src->key) {
244 case SR_CONF_CONN:
245 conn = g_variant_get_string(src->data, NULL);
246 break;
247 }
248 }
249 if (conn)
250 conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
251 else
252 conn_devices = NULL;
253
921634ec 254 /* Find all fx2lafw compatible devices and upload firmware to them. */
3a7a22cb 255 devices = NULL;
d4abb463 256 libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
187b3582 257 for (i = 0; devlist[i]; i++) {
754b5ff2
BV
258 if (conn) {
259 usb = NULL;
260 for (l = conn_devices; l; l = l->next) {
261 usb = l->data;
262 if (usb->bus == libusb_get_bus_number(devlist[i])
263 && usb->address == libusb_get_device_address(devlist[i]))
264 break;
265 }
266 if (!l)
267 /* This device matched none of the ones that
268 * matched the conn specification. */
269 continue;
270 }
187b3582 271
2a8f2d41 272 libusb_get_device_descriptor( devlist[i], &des);
187b3582 273
e826239c
ML
274 if ((ret = libusb_open(devlist[i], &hdl)) < 0)
275 continue;
276
277 if (des.iManufacturer == 0) {
278 manufacturer[0] = '\0';
279 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
280 des.iManufacturer, (unsigned char *) manufacturer,
281 sizeof(manufacturer))) < 0) {
282 sr_warn("Failed to get manufacturer string descriptor: %s.",
283 libusb_error_name(ret));
284 continue;
285 }
286
287 if (des.iProduct == 0) {
288 product[0] = '\0';
289 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
290 des.iProduct, (unsigned char *) product,
291 sizeof(product))) < 0) {
292 sr_warn("Failed to get product string descriptor: %s.",
293 libusb_error_name(ret));
294 continue;
295 }
296
5e2c86eb
SA
297 if (des.iSerialNumber == 0) {
298 serial_num[0] = '\0';
299 } else if ((ret = libusb_get_string_descriptor_ascii(hdl,
300 des.iSerialNumber, (unsigned char *) serial_num,
301 sizeof(serial_num))) < 0) {
302 sr_warn("Failed to get serial number string descriptor: %s.",
303 libusb_error_name(ret));
304 continue;
305 }
306
307 usb_get_port_path(devlist[i], connection_id, sizeof(connection_id));
308
e826239c
ML
309 libusb_close(hdl);
310
da686568 311 prof = NULL;
187b3582
JH
312 for (j = 0; supported_fx2[j].vid; j++) {
313 if (des.idVendor == supported_fx2[j].vid &&
e826239c
ML
314 des.idProduct == supported_fx2[j].pid &&
315 (!supported_fx2[j].usb_manufacturer ||
316 !strcmp(manufacturer, supported_fx2[j].usb_manufacturer)) &&
317 (!supported_fx2[j].usb_manufacturer ||
318 !strcmp(product, supported_fx2[j].usb_product))) {
da686568 319 prof = &supported_fx2[j];
e826239c 320 break;
187b3582
JH
321 }
322 }
323
b99457f0 324 /* Skip if the device was not found. */
da686568 325 if (!prof)
187b3582
JH
326 continue;
327
aac29cc1 328 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
UH
329 sdi->status = SR_ST_INITIALIZING;
330 sdi->vendor = g_strdup(prof->vendor);
331 sdi->model = g_strdup(prof->model);
332 sdi->version = g_strdup(prof->model_version);
5e2c86eb
SA
333 sdi->serial_num = g_strdup(serial_num);
334 sdi->connection_id = g_strdup(connection_id);
187b3582 335
ba7dd8bb
UH
336 /* Fill in channellist according to this device's profile. */
337 num_logic_channels = prof->dev_caps & DEV_CAPS_16BIT ? 16 : 8;
232a975f
JH
338 num_analog_channels = prof->dev_caps & DEV_CAPS_AX_ANALOG ? 1 : 0;
339
7fb90f94
BL
340 /* Logic channels, all in one channel group. */
341 cg = g_malloc0(sizeof(struct sr_channel_group));
342 cg->name = g_strdup("Logic");
343 for (j = 0; j < num_logic_channels; j++) {
344 sprintf(channel_name, "D%d", j);
345 ch = sr_channel_new(sdi, j, SR_CHANNEL_LOGIC,
346 TRUE, channel_name);
347 cg->channels = g_slist_append(cg->channels, ch);
348 }
349 sdi->channel_groups = g_slist_append(NULL, cg);
350
351 for (j = 0; j < num_analog_channels; j++) {
352 snprintf(channel_name, 16, "A%d", j);
353 ch = sr_channel_new(sdi, j + num_logic_channels,
354 SR_CHANNEL_ANALOG, TRUE, channel_name);
355
356 /* Every analog channel gets its own channel group. */
357 cg = g_malloc0(sizeof(struct sr_channel_group));
358 cg->name = g_strdup(channel_name);
359 cg->channels = g_slist_append(NULL, ch);
360 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
361 }
232a975f 362
dc9dbe94
BV
363 devc = fx2lafw_dev_new();
364 devc->profile = prof;
7fb90f94
BL
365 if ((prof->dev_caps & DEV_CAPS_16BIT) || (prof->dev_caps & DEV_CAPS_AX_ANALOG))
366 devc->sample_wide = TRUE;
dc9dbe94 367 sdi->priv = devc;
a8cc8e44 368 devices = g_slist_append(devices, sdi);
187b3582 369
b7c53d48
DG
370 if (!strcmp(prof->model, "DSLogic")
371 || !strcmp(prof->model, "DSLogic Pro")
372 || !strcmp(prof->model, "DSCope")) {
373 devc->dslogic = TRUE;
374 devc->samplerates = dslogic_samplerates;
375 devc->num_samplerates = ARRAY_SIZE(dslogic_samplerates);
376 has_firmware = match_manuf_prod(devlist[i], "DreamSourceLab", "DSLogic")
377 || match_manuf_prod(devlist[i], "DreamSourceLab", "DSCope");
378 } else {
a7d7f93c
BV
379 devc->dslogic = FALSE;
380 devc->samplerates = samplerates;
381 devc->num_samplerates = ARRAY_SIZE(samplerates);
382 has_firmware = match_manuf_prod(devlist[i],
383 "sigrok", "fx2lafw");
a7d7f93c
BV
384 }
385
386 if (has_firmware) {
b1eeb67e 387 /* Already has the firmware, so fix the new address. */
f427daef 388 sr_dbg("Found an fx2lafw device.");
b1eeb67e 389 sdi->status = SR_ST_INACTIVE;
250a78c7
BV
390 sdi->inst_type = SR_INST_USB;
391 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
392 libusb_get_device_address(devlist[i]), NULL);
b1eeb67e 393 } else {
8e2d6c9d
DE
394 if (ezusb_upload_firmware(drvc->sr_ctx, devlist[i],
395 USB_CONFIGURATION, prof->firmware) == SR_OK)
b99457f0 396 /* Store when this device's FW was updated. */
dc9dbe94 397 devc->fw_updated = g_get_monotonic_time();
b1eeb67e 398 else
f427daef 399 sr_err("Firmware upload failed for "
5e2c86eb
SA
400 "device %d.%d (logical).",
401 libusb_get_bus_number(devlist[i]),
402 libusb_get_device_address(devlist[i]));
250a78c7 403 sdi->inst_type = SR_INST_USB;
87b545fb 404 sdi->conn = sr_usb_dev_inst_new(libusb_get_bus_number(devlist[i]),
250a78c7 405 0xff, NULL);
b1eeb67e 406 }
187b3582
JH
407 }
408 libusb_free_device_list(devlist, 1);
9dc7a75e 409 g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
187b3582 410
15a5bfe4 411 return std_scan_complete(di, devices);
f302a082
JH
412}
413
7fb90f94
BL
414static void clear_dev_context(void *priv)
415{
416 struct dev_context *devc;
417
418 devc = priv;
419 g_slist_free(devc->enabled_analog_channels);
420 g_free(devc);
421}
422
423static int dev_clear(const struct sr_dev_driver *di)
424{
425 return std_dev_clear(di, clear_dev_context);
426}
427
6078d2c9 428static int dev_open(struct sr_dev_inst *sdi)
f302a082 429{
4f840ce9 430 struct sr_dev_driver *di = sdi->driver;
250a78c7 431 struct sr_usb_dev_inst *usb;
dc9dbe94 432 struct dev_context *devc;
2c240774 433 const char *fpga_firmware = NULL;
e8bd58ff
UH
434 int ret;
435 int64_t timediff_us, timediff_ms;
43125c69 436
dc9dbe94 437 devc = sdi->priv;
250a78c7 438 usb = sdi->conn;
43125c69
JH
439
440 /*
f60fdf6e
UH
441 * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
442 * milliseconds for the FX2 to renumerate.
43125c69 443 */
3b6c1930 444 ret = SR_ERR;
dc9dbe94 445 if (devc->fw_updated > 0) {
f427daef 446 sr_info("Waiting for device to reset.");
b99457f0 447 /* Takes >= 300ms for the FX2 to be gone from the USB bus. */
43125c69 448 g_usleep(300 * 1000);
e8bd58ff 449 timediff_ms = 0;
f60fdf6e 450 while (timediff_ms < MAX_RENUM_DELAY_MS) {
2f937611 451 if ((ret = fx2lafw_dev_open(sdi, di)) == SR_OK)
43125c69
JH
452 break;
453 g_usleep(100 * 1000);
e8bd58ff 454
dc9dbe94 455 timediff_us = g_get_monotonic_time() - devc->fw_updated;
3b6c1930 456 timediff_ms = timediff_us / 1000;
b99457f0 457 sr_spew("Waited %" PRIi64 "ms.", timediff_ms);
43125c69 458 }
443a14d8
AG
459 if (ret != SR_OK) {
460 sr_err("Device failed to renumerate.");
461 return SR_ERR;
462 }
c0bf69c2 463 sr_info("Device came back after %" PRIi64 "ms.", timediff_ms);
43125c69 464 } else {
443a14d8 465 sr_info("Firmware upload was not needed.");
2f937611 466 ret = fx2lafw_dev_open(sdi, di);
43125c69
JH
467 }
468
ebc34738 469 if (ret != SR_OK) {
f427daef 470 sr_err("Unable to open device.");
43125c69
JH
471 return SR_ERR;
472 }
378abfea 473
250a78c7 474 ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
ebc34738 475 if (ret != 0) {
87b545fb 476 switch (ret) {
0c156e06 477 case LIBUSB_ERROR_BUSY:
f427daef 478 sr_err("Unable to claim USB interface. Another "
b99457f0 479 "program or driver has already claimed it.");
0c156e06 480 break;
0c156e06 481 case LIBUSB_ERROR_NO_DEVICE:
f427daef 482 sr_err("Device has been disconnected.");
0c156e06 483 break;
0c156e06 484 default:
f427daef 485 sr_err("Unable to claim interface: %s.",
d4928d71 486 libusb_error_name(ret));
0c156e06
JH
487 break;
488 }
489
43125c69
JH
490 return SR_ERR;
491 }
492
a7d7f93c 493 if (devc->dslogic) {
b7c53d48 494 if (!strcmp(devc->profile->model, "DSLogic")) {
3fc3fbe4
DA
495 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V)
496 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_3V3;
497 else
498 fpga_firmware = DSLOGIC_FPGA_FIRMWARE_5V;
499 } else if (!strcmp(devc->profile->model, "DSLogic Pro")){
b7c53d48
DG
500 fpga_firmware = DSLOGIC_PRO_FPGA_FIRMWARE;
501 } else if (!strcmp(devc->profile->model, "DSCope")) {
502 fpga_firmware = DSCOPE_FPGA_FIRMWARE;
503 }
504
3fc3fbe4 505 if ((ret = dslogic_fpga_firmware_upload(sdi, fpga_firmware)) != SR_OK)
a7d7f93c
BV
506 return ret;
507 }
dc9dbe94 508 if (devc->cur_samplerate == 0) {
f92994fd 509 /* Samplerate hasn't been set; default to the slowest one. */
a7d7f93c 510 devc->cur_samplerate = devc->samplerates[0];
f92994fd
JH
511 }
512
f302a082
JH
513 return SR_OK;
514}
515
6078d2c9 516static int dev_close(struct sr_dev_inst *sdi)
f302a082 517{
250a78c7 518 struct sr_usb_dev_inst *usb;
961009b0 519
250a78c7 520 usb = sdi->conn;
9803346f 521
98fec29e 522 if (!usb->devhdl)
25a0f108 523 return SR_ERR;
f1898235 524
5e2c86eb
SA
525 sr_info("fx2lafw: Closing device on %d.%d (logical) / %s (physical) interface %d.",
526 usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
250a78c7
BV
527 libusb_release_interface(usb->devhdl, USB_INTERFACE);
528 libusb_close(usb->devhdl);
529 usb->devhdl = NULL;
25a0f108 530 sdi->status = SR_ST_INACTIVE;
f1898235 531
f302a082
JH
532 return SR_OK;
533}
534
9803346f
UH
535static int config_get(uint32_t key, GVariant **data,
536 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 537{
dc9dbe94 538 struct dev_context *devc;
89befd46 539 struct sr_usb_dev_inst *usb;
3fc3fbe4
DA
540 GVariant *range[2];
541 unsigned int i;
89befd46 542 char str[128];
8b35f474 543
53b4680f 544 (void)cg;
8f996b89 545
a920a7d8
ML
546 if (!sdi)
547 return SR_ERR_ARG;
548
549 devc = sdi->priv;
550
584560f1 551 switch (key) {
89befd46 552 case SR_CONF_CONN:
a920a7d8 553 if (!sdi->conn)
38ab8dbe 554 return SR_ERR_ARG;
89befd46
BV
555 usb = sdi->conn;
556 if (usb->address == 255)
557 /* Device still needs to re-enumerate after firmware
558 * upload, so we don't know its (future) address. */
559 return SR_ERR;
560 snprintf(str, 128, "%d.%d", usb->bus, usb->address);
561 *data = g_variant_new_string(str);
562 break;
3fc3fbe4
DA
563 case SR_CONF_VOLTAGE_THRESHOLD:
564 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
565 if (volt_thresholds[i].range != devc->dslogic_voltage_threshold)
566 continue;
567 range[0] = g_variant_new_double(volt_thresholds[i].low);
568 range[1] = g_variant_new_double(volt_thresholds[i].high);
569 *data = g_variant_new_tuple(range, 2);
570 break;
571 }
572 break;
a920a7d8
ML
573 case SR_CONF_LIMIT_SAMPLES:
574 *data = g_variant_new_uint64(devc->limit_samples);
575 break;
123e1313 576 case SR_CONF_SAMPLERATE:
89befd46 577 *data = g_variant_new_uint64(devc->cur_samplerate);
6e9339aa 578 break;
7bfcb25c
AJ
579 case SR_CONF_CAPTURE_RATIO:
580 *data = g_variant_new_uint64(devc->capture_ratio);
581 break;
ea3a77c7
DA
582 case SR_CONF_EXTERNAL_CLOCK:
583 *data = g_variant_new_boolean(devc->dslogic_external_clock);
584 break;
41dc2547
DA
585 case SR_CONF_CONTINUOUS:
586 *data = g_variant_new_boolean(devc->dslogic_continuous_mode);
587 break;
d9a58763
DA
588 case SR_CONF_CLOCK_EDGE:
589 i = devc->dslogic_clock_edge;
590 if (i >= ARRAY_SIZE(signal_edge_names))
591 return SR_ERR_BUG;
9803346f 592 *data = g_variant_new_string(signal_edge_names[0]);
d9a58763 593 break;
6e9339aa 594 default:
bd6fbf62 595 return SR_ERR_NA;
8b35f474
JH
596 }
597
6e9339aa 598 return SR_OK;
f302a082
JH
599}
600
9803346f
UH
601/*
602 * Helper for mapping a string-typed configuration value to an index
d9a58763
DA
603 * within a table of possible values.
604 */
605static int lookup_index(GVariant *value, const char *const *table, int len)
606{
607 const char *entry;
608 int i;
609
610 entry = g_variant_get_string(value, NULL);
611 if (!entry)
612 return -1;
613
614 /* Linear search is fine for very small tables. */
615 for (i = 0; i < len; i++) {
616 if (strcmp(entry, table[i]) == 0)
617 return i;
618 }
619
620 return -1;
621}
622
9803346f
UH
623static int config_set(uint32_t key, GVariant *data,
624 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
f302a082 625{
dc9dbe94 626 struct dev_context *devc;
4d7b36a0 627 uint64_t arg;
65e00366 628 int i, ret;
3fc3fbe4 629 gdouble low, high;
7cb621d4 630
53b4680f 631 (void)cg;
8f996b89 632
1c48000d
ML
633 if (!sdi)
634 return SR_ERR_ARG;
635
e73ffd42
BV
636 if (sdi->status != SR_ST_ACTIVE)
637 return SR_ERR;
638
dc9dbe94 639 devc = sdi->priv;
7cb621d4 640
1c48000d
ML
641 ret = SR_OK;
642
584560f1 643 switch (key) {
93b118da
UH
644 case SR_CONF_SAMPLERATE:
645 arg = g_variant_get_uint64(data);
65e00366
CFS
646 for (i = 0; i < devc->num_samplerates; i++) {
647 if (devc->samplerates[i] == arg) {
93b118da
UH
648 devc->cur_samplerate = arg;
649 break;
4d7b36a0 650 }
93b118da 651 }
65e00366 652 if (i == devc->num_samplerates)
93b118da
UH
653 ret = SR_ERR_ARG;
654 break;
655 case SR_CONF_LIMIT_SAMPLES:
656 devc->limit_samples = g_variant_get_uint64(data);
657 break;
658 case SR_CONF_CAPTURE_RATIO:
659 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 660 ret = (devc->capture_ratio > 100) ? SR_ERR : SR_OK;
93b118da 661 break;
3fc3fbe4
DA
662 case SR_CONF_VOLTAGE_THRESHOLD:
663 g_variant_get(data, "(dd)", &low, &high);
664 ret = SR_ERR_ARG;
665 for (i = 0; (unsigned int)i < ARRAY_SIZE(volt_thresholds); i++) {
666 if (fabs(volt_thresholds[i].low - low) < 0.1 &&
667 fabs(volt_thresholds[i].high - high) < 0.1) {
668 devc->dslogic_voltage_threshold = volt_thresholds[i].range;
669 break;
670 }
671 }
672 if (!strcmp(devc->profile->model, "DSLogic")) {
673 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_5_V)
674 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_5V);
675 else
676 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_FPGA_FIRMWARE_3V3);
9803346f 677 } else if (!strcmp(devc->profile->model, "DSLogic Pro")) {
3fc3fbe4
DA
678 ret = dslogic_fpga_firmware_upload(sdi, DSLOGIC_PRO_FPGA_FIRMWARE);
679 }
680 break;
ea3a77c7
DA
681 case SR_CONF_EXTERNAL_CLOCK:
682 devc->dslogic_external_clock = g_variant_get_boolean(data);
683 break;
41dc2547
DA
684 case SR_CONF_CONTINUOUS:
685 devc->dslogic_continuous_mode = g_variant_get_boolean(data);
686 break;
d9a58763
DA
687 case SR_CONF_CLOCK_EDGE:
688 i = lookup_index(data, signal_edge_names,
689 ARRAY_SIZE(signal_edge_names));
690 if (i < 0)
691 return SR_ERR_ARG;
692 devc->dslogic_clock_edge = i;
693 break;
93b118da
UH
694 default:
695 ret = SR_ERR_NA;
7cb621d4
JH
696 }
697
698 return ret;
f302a082
JH
699}
700
9803346f
UH
701static int config_list(uint32_t key, GVariant **data,
702 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
a1c743fc 703{
a7d7f93c 704 struct dev_context *devc;
3fc3fbe4 705 GVariant *gvar, *range[2];
d6836bf1 706 GVariantBuilder gvb;
3fc3fbe4 707 unsigned int i;
a1c743fc 708
53b4680f 709 (void)cg;
a1c743fc
BV
710
711 switch (key) {
89befd46 712 case SR_CONF_SCAN_OPTIONS:
584560f1 713 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41 714 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
89befd46 715 break;
9a6517d1 716 case SR_CONF_DEVICE_OPTIONS:
9803346f 717 if (!sdi) {
ff6b76a1 718 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
9803346f
UH
719 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
720 } else {
3fc3fbe4
DA
721 devc = sdi->priv;
722 if (!devc->dslogic)
723 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
724 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
725 else
726 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
727 dslogic_devopts, ARRAY_SIZE(dslogic_devopts), sizeof(uint32_t));
728 }
729 break;
730 case SR_CONF_VOLTAGE_THRESHOLD:
9803346f
UH
731 if (!sdi->priv)
732 return SR_ERR_ARG;
3fc3fbe4 733 devc = sdi->priv;
9803346f
UH
734 if (!devc->dslogic)
735 return SR_ERR_NA;
3fc3fbe4
DA
736 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
737 for (i = 0; i < ARRAY_SIZE(volt_thresholds); i++) {
738 range[0] = g_variant_new_double(volt_thresholds[i].low);
739 range[1] = g_variant_new_double(volt_thresholds[i].high);
740 gvar = g_variant_new_tuple(range, 2);
741 g_variant_builder_add_value(&gvb, gvar);
742 }
743 *data = g_variant_builder_end(&gvb);
9a6517d1 744 break;
a1c743fc 745 case SR_CONF_SAMPLERATE:
a7d7f93c 746 devc = sdi->priv;
d6836bf1 747 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
a7d7f93c
BV
748 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), devc->samplerates,
749 devc->num_samplerates, sizeof(uint64_t));
d6836bf1
BV
750 g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
751 *data = g_variant_builder_end(&gvb);
a1c743fc 752 break;
9615eeb5
BV
753 case SR_CONF_TRIGGER_MATCH:
754 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
755 soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
756 sizeof(int32_t));
c50277a6 757 break;
d9a58763
DA
758 case SR_CONF_CLOCK_EDGE:
759 *data = g_variant_new_strv(signal_edge_names,
760 ARRAY_SIZE(signal_edge_names));
761 break;
a1c743fc 762 default:
bd6fbf62 763 return SR_ERR_NA;
a1c743fc
BV
764 }
765
766 return SR_OK;
767}
768
1f9813eb 769static int receive_data(int fd, int revents, void *cb_data)
610dbb70
JH
770{
771 struct timeval tv;
b99457f0 772 struct drv_context *drvc;
610dbb70 773
610dbb70
JH
774 (void)fd;
775 (void)revents;
610dbb70 776
1a863916 777 drvc = (struct drv_context *)cb_data;
b99457f0 778
610dbb70 779 tv.tv_sec = tv.tv_usec = 0;
d4abb463 780 libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
610dbb70
JH
781
782 return TRUE;
783}
784
b9d53092 785static int start_transfers(const struct sr_dev_inst *sdi)
f302a082 786{
dc9dbe94 787 struct dev_context *devc;
250a78c7 788 struct sr_usb_dev_inst *usb;
335122f0 789 struct sr_trigger *trigger;
610dbb70 790 struct libusb_transfer *transfer;
b9d53092
BV
791 unsigned int i, num_transfers;
792 int endpoint, timeout, ret;
610dbb70 793 unsigned char *buf;
b99457f0 794 size_t size;
610dbb70 795
dc9dbe94 796 devc = sdi->priv;
250a78c7 797 usb = sdi->conn;
b99457f0 798
b0ccd64d
BV
799 devc->sent_samples = 0;
800 devc->acq_aborted = FALSE;
dc9dbe94 801 devc->empty_transfer_count = 0;
610dbb70 802
4237fbca 803 if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
7bfcb25c
AJ
804 int pre_trigger_samples = 0;
805 if (devc->limit_samples > 0)
806 pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
807 devc->stl = soft_trigger_logic_new(sdi, trigger, pre_trigger_samples);
98fec29e 808 if (!devc->stl)
7bfcb25c 809 return SR_ERR_MALLOC;
9615eeb5 810 devc->trigger_fired = FALSE;
9615eeb5
BV
811 } else
812 devc->trigger_fired = TRUE;
813
2f937611 814 num_transfers = fx2lafw_get_number_of_transfers(devc);
a04b28ce
DA
815
816 //if (devc->dslogic)
817 // num_transfers = dslogic_get_number_of_transfers(devc);
818
9803346f
UH
819 if (devc->dslogic) {
820 if (devc->cur_samplerate == SR_MHZ(100))
a04b28ce
DA
821 num_transfers = 16;
822 else if (devc->cur_samplerate == SR_MHZ(200))
823 num_transfers = 8;
824 else if (devc->cur_samplerate == SR_MHZ(400))
825 num_transfers = 4;
826 }
827
2f937611 828 size = fx2lafw_get_buffer_size(devc);
2a67abfe 829 devc->submitted_transfers = 0;
5af666a9 830
dc9dbe94 831 devc->transfers = g_try_malloc0(sizeof(*devc->transfers) * num_transfers);
886a52b6 832 if (!devc->transfers) {
f427daef 833 sr_err("USB transfers malloc failed.");
886a52b6
UH
834 return SR_ERR_MALLOC;
835 }
0caa1ef0 836
b9d53092
BV
837 timeout = fx2lafw_get_timeout(devc);
838 endpoint = devc->dslogic ? 6 : 2;
dc9dbe94 839 devc->num_transfers = num_transfers;
5af666a9 840 for (i = 0; i < num_transfers; i++) {
610dbb70 841 if (!(buf = g_try_malloc(size))) {
b99457f0 842 sr_err("USB transfer buffer malloc failed.");
610dbb70
JH
843 return SR_ERR_MALLOC;
844 }
845 transfer = libusb_alloc_transfer(0);
250a78c7 846 libusb_fill_bulk_transfer(transfer, usb->devhdl,
b9d53092 847 endpoint | LIBUSB_ENDPOINT_IN, buf, size,
9615eeb5 848 fx2lafw_receive_transfer, (void *)sdi, timeout);
a04b28ce 849 sr_info("submitting transfer: %d", i);
d4928d71 850 if ((ret = libusb_submit_transfer(transfer)) != 0) {
b99457f0
UH
851 sr_err("Failed to submit transfer: %s.",
852 libusb_error_name(ret));
610dbb70
JH
853 libusb_free_transfer(transfer);
854 g_free(buf);
2f937611 855 fx2lafw_abort_acquisition(devc);
610dbb70
JH
856 return SR_ERR;
857 }
dc9dbe94
BV
858 devc->transfers[i] = transfer;
859 devc->submitted_transfers++;
610dbb70
JH
860 }
861
7e5ccff2
JH
862 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG)
863 devc->send_data_proc = mso_send_data_proc;
864 else
865 devc->send_data_proc = la_send_data_proc;
7b5d1c64 866
bee2b016 867 std_session_send_df_header(sdi);
610dbb70 868
b9d53092
BV
869 return SR_OK;
870}
871
55462b8b 872static void LIBUSB_CALL dslogic_trigger_receive(struct libusb_transfer *transfer)
b9d53092
BV
873{
874 const struct sr_dev_inst *sdi;
875 struct dslogic_trigger_pos *tpos;
40ebad35 876 struct dev_context *devc;
b9d53092
BV
877
878 sdi = transfer->user_data;
40ebad35
DA
879 devc = sdi->priv;
880 if (transfer->status == LIBUSB_TRANSFER_CANCELLED) {
881 sr_dbg("Trigger transfer canceled.");
882 /* Terminate session. */
bee2b016 883 std_session_send_df_end(sdi);
40ebad35
DA
884 usb_source_remove(sdi->session, devc->ctx);
885 devc->num_transfers = 0;
886 g_free(devc->transfers);
887 if (devc->stl) {
888 soft_trigger_logic_free(devc->stl);
889 devc->stl = NULL;
890 }
891 } else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
b9d53092
BV
892 && transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
893 tpos = (struct dslogic_trigger_pos *)transfer->buffer;
9803346f
UH
894 sr_info("tpos real_pos %d ram_saddr %d cnt %d", tpos->real_pos,
895 tpos->ram_saddr, tpos->remain_cnt);
896 devc->trigger_pos = tpos->real_pos;
b9d53092
BV
897 g_free(tpos);
898 start_transfers(sdi);
899 }
b9d53092 900 libusb_free_transfer(transfer);
b9d53092
BV
901}
902
903static int dslogic_trigger_request(const struct sr_dev_inst *sdi)
904{
905 struct sr_usb_dev_inst *usb;
906 struct libusb_transfer *transfer;
907 struct dslogic_trigger_pos *tpos;
40ebad35 908 struct dev_context *devc;
b9d53092
BV
909 int ret;
910
911 usb = sdi->conn;
40ebad35 912 devc = sdi->priv;
b9d53092
BV
913
914 if ((ret = dslogic_stop_acquisition(sdi)) != SR_OK)
915 return ret;
916
917 if ((ret = dslogic_fpga_configure(sdi)) != SR_OK)
918 return ret;
f366e86c 919
9803346f 920 /* If this is a DSLogic Pro, set the voltage threshold. */
3fc3fbe4 921 if (!strcmp(devc->profile->model, "DSLogic Pro")){
9803346f 922 if (devc->dslogic_voltage_threshold == DS_VOLTAGE_RANGE_18_33_V) {
3fc3fbe4 923 dslogic_set_vth(sdi, 1.4);
9803346f 924 } else {
3fc3fbe4
DA
925 dslogic_set_vth(sdi, 3.3);
926 }
927 }
928
b9d53092 929 if ((ret = dslogic_start_acquisition(sdi)) != SR_OK)
ebc34738 930 return ret;
b9d53092
BV
931
932 sr_dbg("Getting trigger.");
933 tpos = g_malloc(sizeof(struct dslogic_trigger_pos));
934 transfer = libusb_alloc_transfer(0);
935 libusb_fill_bulk_transfer(transfer, usb->devhdl, 6 | LIBUSB_ENDPOINT_IN,
936 (unsigned char *)tpos, sizeof(struct dslogic_trigger_pos),
937 dslogic_trigger_receive, (void *)sdi, 0);
938 if ((ret = libusb_submit_transfer(transfer)) < 0) {
939 sr_err("Failed to request trigger: %s.", libusb_error_name(ret));
940 libusb_free_transfer(transfer);
941 g_free(tpos);
942 return SR_ERR;
943 }
944
40ebad35
DA
945 devc->transfers = g_try_malloc0(sizeof(*devc->transfers));
946 if (!devc->transfers) {
947 sr_err("USB trigger_pos transfer malloc failed.");
948 return SR_ERR_MALLOC;
949 }
950 devc->num_transfers = 1;
951 devc->submitted_transfers++;
952 devc->transfers[0] = transfer;
953
b9d53092
BV
954 return ret;
955}
956
7fb90f94
BL
957static int configure_channels(const struct sr_dev_inst *sdi)
958{
959 struct dev_context *devc;
960 const GSList *l;
961 int p;
962 struct sr_channel *ch;
963
964 devc = sdi->priv;
965
966 g_slist_free(devc->enabled_analog_channels);
967 devc->enabled_analog_channels = NULL;
968 memset(devc->ch_enabled, 0, sizeof(devc->ch_enabled));
969
970 for (l = sdi->channels, p = 0; l; l = l->next, p++) {
971 ch = l->data;
972 if ((p <= NUM_CHANNELS) && (ch->type == SR_CHANNEL_ANALOG)) {
973 devc->ch_enabled[p] = ch->enabled;
974 devc->enabled_analog_channels =
975 g_slist_append(devc->enabled_analog_channels, ch);
976 }
977 }
978
979 return SR_OK;
980}
981
695dc859 982static int dev_acquisition_start(const struct sr_dev_inst *sdi)
b9d53092 983{
4f840ce9 984 struct sr_dev_driver *di;
b9d53092
BV
985 struct drv_context *drvc;
986 struct dev_context *devc;
987 int timeout, ret;
7e5ccff2 988 size_t size;
b9d53092
BV
989
990 if (sdi->status != SR_ST_ACTIVE)
991 return SR_ERR_DEV_CLOSED;
992
4f840ce9 993 di = sdi->driver;
41812aca 994 drvc = di->context;
b9d53092
BV
995 devc = sdi->priv;
996
b9d53092 997 devc->ctx = drvc->sr_ctx;
b9d53092
BV
998 devc->sent_samples = 0;
999 devc->empty_transfer_count = 0;
1000 devc->acq_aborted = FALSE;
1001
7fb90f94
BL
1002 if (configure_channels(sdi) != SR_OK) {
1003 sr_err("Failed to configure channels.");
1004 return SR_ERR;
1005 }
1006
b9d53092 1007 timeout = fx2lafw_get_timeout(devc);
4f840ce9 1008 usb_source_add(sdi->session, devc->ctx, timeout, receive_data, drvc);
b9d53092
BV
1009
1010 if (devc->dslogic) {
1011 dslogic_trigger_request(sdi);
c442ffda 1012 } else {
7e5ccff2
JH
1013 size = fx2lafw_get_buffer_size(devc);
1014 /* Prepare for analog sampling. */
1015 if (devc->profile->dev_caps & DEV_CAPS_AX_ANALOG) {
1016 /* We need a buffer half the size of a transfer. */
1017 devc->logic_buffer = g_try_malloc(size / 2);
1018 devc->analog_buffer = g_try_malloc(
1019 sizeof(float) * size / 2);
1020 }
b9d53092 1021 start_transfers(sdi);
815e3cb8
SA
1022 if ((ret = fx2lafw_command_start_acquisition(sdi)) != SR_OK) {
1023 fx2lafw_abort_acquisition(devc);
1024 return ret;
1025 }
017375d1
JH
1026 }
1027
f302a082
JH
1028 return SR_OK;
1029}
1030
695dc859 1031static int dev_acquisition_stop(struct sr_dev_inst *sdi)
f302a082 1032{
1a7ff3d0
UH
1033 struct dev_context *devc;
1034
1a7ff3d0
UH
1035 devc = sdi->priv;
1036
1037 if (devc->dslogic)
1038 dslogic_stop_acquisition(sdi);
1039
2f937611 1040 fx2lafw_abort_acquisition(sdi->priv);
5da93902 1041
f302a082
JH
1042 return SR_OK;
1043}
1044
dd5c48a6 1045static struct sr_dev_driver fx2lafw_driver_info = {
f302a082 1046 .name = "fx2lafw",
2e7cb004 1047 .longname = "fx2lafw (generic driver for FX2 based LAs)",
f302a082 1048 .api_version = 1,
c2fdcc25 1049 .init = std_init,
700d6b64 1050 .cleanup = std_cleanup,
6078d2c9 1051 .scan = scan,
c01bf34c 1052 .dev_list = std_dev_list,
7fb90f94 1053 .dev_clear = dev_clear,
035a1078
BV
1054 .config_get = config_get,
1055 .config_set = config_set,
a1c743fc 1056 .config_list = config_list,
6078d2c9
UH
1057 .dev_open = dev_open,
1058 .dev_close = dev_close,
1059 .dev_acquisition_start = dev_acquisition_start,
1060 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 1061 .context = NULL,
f302a082 1062};
dd5c48a6 1063SR_REGISTER_DEV_DRIVER(fx2lafw_driver_info);