]> sigrok.org Git - libsigrok.git/blame - src/hardware/atten-pps3xxx/api.c
Add sr_dev_acquisition_start(), factor out SR_ERR_DEV_CLOSED check.
[libsigrok.git] / src / hardware / atten-pps3xxx / api.c
CommitLineData
fa0d6afe
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
33c40990 21#include <string.h>
fa0d6afe
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22#include "protocol.h"
23
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24/*
25 * The default serial communication settings on the device are 9600
26 * baud, 9 data bits. The 9th bit isn't actually used, and the vendor
27 * software uses Mark parity to absorb the extra bit.
28 *
29 * Since 9 data bits is not a standard available in POSIX, we use two
30 * stop bits to skip over the extra bit instead.
31 */
32#define SERIALCOMM "9600/8n2"
33
584560f1 34static const uint32_t scanopts[] = {
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35 SR_CONF_CONN,
36 SR_CONF_SERIALCOMM,
37};
38
1f889afd 39static const uint32_t drvopts[] = {
33c40990 40 SR_CONF_POWER_SUPPLY,
d6fa8ace
BV
41};
42
1f889afd 43static const uint32_t devopts[] = {
e91bb0a6 44 SR_CONF_CONTINUOUS,
7a0b98b5 45 SR_CONF_CHANNEL_CONFIG | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
5827f61b 46 SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET,
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47};
48
584560f1 49static const uint32_t devopts_cg[] = {
7a0b98b5
AJ
50 SR_CONF_VOLTAGE | SR_CONF_GET,
51 SR_CONF_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_CURRENT | SR_CONF_GET,
53 SR_CONF_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
54 SR_CONF_ENABLED | SR_CONF_GET | SR_CONF_SET,
33c40990
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55};
56
57static const char *channel_modes[] = {
58 "Independent",
59 "Series",
60 "Parallel",
61};
62
329733d9 63static const struct pps_model models[] = {
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64 { PPS_3203T_3S, "PPS3203T-3S",
65 CHANMODE_INDEPENDENT | CHANMODE_SERIES | CHANMODE_PARALLEL,
66 3,
67 {
68 /* Channel 1 */
69 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
70 /* Channel 2 */
71 { { 0, 32, 0.01 }, { 0, 3, 0.001 } },
72 /* Channel 3 */
73 { { 0, 6, 0.01 }, { 0, 3, 0.001 } },
74 },
75 },
76};
77
4f840ce9 78static GSList *scan(struct sr_dev_driver *di, GSList *options, int modelid)
fa0d6afe 79{
33c40990 80 struct sr_dev_inst *sdi;
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81 struct dev_context *devc;
82 struct sr_config *src;
ba7dd8bb 83 struct sr_channel *ch;
40fd0264 84 struct sr_channel_group *cg;
33c40990 85 struct sr_serial_dev_inst *serial;
43376f33 86 GSList *l;
329733d9 87 const struct pps_model *model;
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88 uint8_t packet[PACKET_SIZE];
89 unsigned int i;
2eb1612d 90 int delay_ms, ret;
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91 const char *conn, *serialcomm;
92 char channel[10];
fa0d6afe 93
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94 conn = serialcomm = NULL;
95 for (l = options; l; l = l->next) {
96 src = l->data;
97 switch (src->key) {
98 case SR_CONF_CONN:
99 conn = g_variant_get_string(src->data, NULL);
100 break;
101 case SR_CONF_SERIALCOMM:
102 serialcomm = g_variant_get_string(src->data, NULL);
103 break;
104 }
105 }
106 if (!conn)
107 return NULL;
108 if (!serialcomm)
109 serialcomm = SERIALCOMM;
110
91219afc 111 serial = sr_serial_dev_inst_new(conn, serialcomm);
33c40990 112
5305266a 113 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
33c40990 114 return NULL;
91219afc 115
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116 serial_flush(serial);
117
945cfd4f 118 /* This is how the vendor software scans for hardware. */
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119 memset(packet, 0, PACKET_SIZE);
120 packet[0] = 0xaa;
121 packet[1] = 0xaa;
2eb1612d
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122 delay_ms = serial_timeout(serial, PACKET_SIZE);
123 if (serial_write_blocking(serial, packet, PACKET_SIZE, delay_ms) < PACKET_SIZE) {
081c214e 124 sr_err("Unable to write while probing for hardware.");
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125 return NULL;
126 }
127 /* The device responds with a 24-byte packet when it receives a packet.
128 * At 9600 baud, 300ms is long enough for it to have arrived. */
129 g_usleep(300 * 1000);
130 memset(packet, 0, PACKET_SIZE);
131 if ((ret = serial_read_nonblocking(serial, packet, PACKET_SIZE)) < 0) {
132 sr_err("Unable to read while probing for hardware: %s",
8d522801 133 sr_strerror(ret));
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134 return NULL;
135 }
136 if (ret != PACKET_SIZE || packet[0] != 0xaa || packet[1] != 0xaa) {
137 /* Doesn't look like an Atten PPS. */
138 return NULL;
139 }
140
141 model = NULL;
142 for (i = 0; i < ARRAY_SIZE(models); i++) {
143 if (models[i].modelid == modelid) {
144 model = &models[i];
145 break;
146 }
147 }
148 if (!model) {
149 sr_err("Unknown modelid %d", modelid);
150 return NULL;
151 }
152
aac29cc1 153 sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be
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154 sdi->status = SR_ST_INACTIVE;
155 sdi->vendor = g_strdup("Atten");
156 sdi->model = g_strdup(model->name);
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157 sdi->inst_type = SR_INST_SERIAL;
158 sdi->conn = serial;
159 for (i = 0; i < MAX_CHANNELS; i++) {
160 snprintf(channel, 10, "CH%d", i + 1);
5e23fcab 161 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel);
40fd0264
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162 cg = g_malloc(sizeof(struct sr_channel_group));
163 cg->name = g_strdup(channel);
ba7dd8bb 164 cg->channels = g_slist_append(NULL, ch);
40fd0264
UH
165 cg->priv = NULL;
166 sdi->channel_groups = g_slist_append(sdi->channel_groups, cg);
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167 }
168
169 devc = g_malloc0(sizeof(struct dev_context));
170 devc->model = model;
171 devc->config = g_malloc0(sizeof(struct per_channel_config) * model->num_channels);
2eb1612d 172 devc->delay_ms = delay_ms;
33c40990 173 sdi->priv = devc;
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174
175 serial_close(serial);
fa0d6afe 176
43376f33 177 return std_scan_complete(di, g_slist_append(NULL, sdi));
fa0d6afe
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178}
179
4f840ce9 180static GSList *scan_3203(struct sr_dev_driver *di, GSList *options)
33c40990 181{
4f840ce9 182 return scan(di, options, PPS_3203T_3S);
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183}
184
584560f1 185static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 186 const struct sr_channel_group *cg)
fa0d6afe 187{
33c40990 188 struct dev_context *devc;
ba7dd8bb 189 struct sr_channel *ch;
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190 int channel, ret;
191
192 if (!sdi)
193 return SR_ERR_ARG;
fa0d6afe 194
33c40990 195 devc = sdi->priv;
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196
197 ret = SR_OK;
53b4680f 198 if (!cg) {
660e398f 199 /* No channel group: global options. */
33c40990 200 switch (key) {
7a0b98b5 201 case SR_CONF_CHANNEL_CONFIG:
fe997353 202 *data = g_variant_new_string(channel_modes[devc->channel_mode]);
33c40990 203 break;
a1eaa9e0 204 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
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205 *data = g_variant_new_boolean(devc->over_current_protection);
206 break;
207 default:
208 return SR_ERR_NA;
209 }
210 } else {
660e398f 211 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
212 ch = cg->channels->data;
213 channel = ch->index;
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214
215 switch (key) {
7a0b98b5 216 case SR_CONF_VOLTAGE:
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217 *data = g_variant_new_double(devc->config[channel].output_voltage_last);
218 break;
7a0b98b5 219 case SR_CONF_VOLTAGE_TARGET:
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220 *data = g_variant_new_double(devc->config[channel].output_voltage_max);
221 break;
7a0b98b5 222 case SR_CONF_CURRENT:
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223 *data = g_variant_new_double(devc->config[channel].output_current_last);
224 break;
7a0b98b5 225 case SR_CONF_CURRENT_LIMIT:
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226 *data = g_variant_new_double(devc->config[channel].output_current_max);
227 break;
7a0b98b5 228 case SR_CONF_ENABLED:
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229 *data = g_variant_new_boolean(devc->config[channel].output_enabled);
230 break;
231 default:
232 return SR_ERR_NA;
233 }
fa0d6afe
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234 }
235
236 return ret;
237}
238
33c40990
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239static int find_str(const char *str, const char **strings, int array_size)
240{
241 int idx, i;
242
243 idx = -1;
244 for (i = 0; i < array_size; i++) {
245 if (!strcmp(str, strings[i])) {
246 idx = i;
247 break;
248 }
249 }
250
251 return idx;
252}
253
584560f1 254static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
53b4680f 255 const struct sr_channel_group *cg)
fa0d6afe 256{
33c40990 257 struct dev_context *devc;
ba7dd8bb 258 struct sr_channel *ch;
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259 gdouble dval;
260 int channel, ret, ival;
261 const char *sval;
262 gboolean bval;
fa0d6afe
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263
264 if (sdi->status != SR_ST_ACTIVE)
265 return SR_ERR_DEV_CLOSED;
266
267 ret = SR_OK;
33c40990 268 devc = sdi->priv;
53b4680f 269 if (!cg) {
660e398f 270 /* No channel group: global options. */
33c40990 271 switch (key) {
7a0b98b5 272 case SR_CONF_CHANNEL_CONFIG:
33c40990
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273 sval = g_variant_get_string(data, NULL);
274 if ((ival = find_str(sval, channel_modes,
275 ARRAY_SIZE(channel_modes))) == -1) {
276 ret = SR_ERR_ARG;
277 break;
278 }
279 if (devc->model->channel_modes && (1 << ival) == 0) {
280 /* Not supported on this model. */
281 ret = SR_ERR_ARG;
282 }
283 if (ival == devc->channel_mode_set)
284 /* Nothing to do. */
285 break;
286 devc->channel_mode_set = ival;
ab988ecb 287 devc->config_dirty = TRUE;
33c40990 288 break;
a1eaa9e0 289 case SR_CONF_OVER_CURRENT_PROTECTION_ENABLED:
33c40990
BV
290 bval = g_variant_get_boolean(data);
291 if (bval == devc->over_current_protection_set)
292 /* Nothing to do. */
293 break;
294 devc->over_current_protection_set = bval;
ab988ecb 295 devc->config_dirty = TRUE;
33c40990
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296 break;
297 default:
298 return SR_ERR_NA;
299 }
300 } else {
660e398f
UH
301 /* Channel group specified: per-channel options. */
302 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
303 ch = cg->channels->data;
304 channel = ch->index;
33c40990
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305
306 switch (key) {
7a0b98b5 307 case SR_CONF_VOLTAGE_TARGET:
33c40990
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308 dval = g_variant_get_double(data);
309 if (dval < 0 || dval > devc->model->channels[channel].voltage[1])
310 ret = SR_ERR_ARG;
311 devc->config[channel].output_voltage_max = dval;
ab988ecb 312 devc->config_dirty = TRUE;
33c40990 313 break;
7a0b98b5 314 case SR_CONF_CURRENT_LIMIT:
33c40990
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315 dval = g_variant_get_double(data);
316 if (dval < 0 || dval > devc->model->channels[channel].current[1])
317 ret = SR_ERR_ARG;
318 devc->config[channel].output_current_max = dval;
ab988ecb 319 devc->config_dirty = TRUE;
33c40990 320 break;
7a0b98b5 321 case SR_CONF_ENABLED:
33c40990
BV
322 bval = g_variant_get_boolean(data);
323 if (bval == devc->config[channel].output_enabled_set)
324 /* Nothing to do. */
325 break;
326 devc->config[channel].output_enabled_set = bval;
ab988ecb 327 devc->config_dirty = TRUE;
33c40990
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328 break;
329 default:
330 ret = SR_ERR_NA;
331 }
fa0d6afe
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332 }
333
334 return ret;
335}
336
584560f1 337static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
53b4680f 338 const struct sr_channel_group *cg)
fa0d6afe 339{
33c40990 340 struct dev_context *devc;
ba7dd8bb 341 struct sr_channel *ch;
33c40990
BV
342 GVariant *gvar;
343 GVariantBuilder gvb;
344 int channel, ret, i;
345
d6fa8ace 346 /* Always available. */
33c40990 347 if (key == SR_CONF_SCAN_OPTIONS) {
584560f1
BV
348 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
349 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
33c40990
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350 return SR_OK;
351 }
352
d6fa8ace
BV
353 if (key == SR_CONF_DEVICE_OPTIONS && !sdi) {
354 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
1f889afd 355 drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
d6fa8ace
BV
356 return SR_OK;
357 }
358
e22aa878
BV
359 if (!sdi)
360 return SR_ERR_ARG;
fa0d6afe 361
d6fa8ace 362 devc = sdi->priv;
fa0d6afe 363 ret = SR_OK;
53b4680f 364 if (!cg) {
660e398f 365 /* No channel group: global options. */
33c40990
BV
366 switch (key) {
367 case SR_CONF_DEVICE_OPTIONS:
584560f1 368 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
1f889afd 369 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
33c40990 370 break;
7a0b98b5 371 case SR_CONF_CHANNEL_CONFIG:
33c40990
BV
372 if (devc->model->channel_modes == CHANMODE_INDEPENDENT) {
373 /* The 1-channel models. */
374 *data = g_variant_new_strv(channel_modes, 1);
375 } else {
376 /* The other models support all modes. */
377 *data = g_variant_new_strv(channel_modes, ARRAY_SIZE(channel_modes));
378 }
379 break;
380 default:
381 return SR_ERR_NA;
382 }
383 } else {
660e398f 384 /* Channel group specified: per-channel options. */
33c40990
BV
385 if (!sdi)
386 return SR_ERR_ARG;
660e398f 387 /* We only ever have one channel per channel group in this driver. */
ba7dd8bb
UH
388 ch = cg->channels->data;
389 channel = ch->index;
33c40990
BV
390
391 switch (key) {
392 case SR_CONF_DEVICE_OPTIONS:
584560f1
BV
393 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
394 devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
33c40990 395 break;
7a0b98b5 396 case SR_CONF_VOLTAGE_TARGET:
33c40990
BV
397 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
398 /* Min, max, step. */
399 for (i = 0; i < 3; i++) {
400 gvar = g_variant_new_double(devc->model->channels[channel].voltage[i]);
401 g_variant_builder_add_value(&gvb, gvar);
402 }
403 *data = g_variant_builder_end(&gvb);
404 break;
7a0b98b5 405 case SR_CONF_CURRENT_LIMIT:
33c40990
BV
406 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
407 /* Min, max, step. */
408 for (i = 0; i < 3; i++) {
409 gvar = g_variant_new_double(devc->model->channels[channel].current[i]);
410 g_variant_builder_add_value(&gvb, gvar);
411 }
412 *data = g_variant_builder_end(&gvb);
413 break;
414 default:
415 return SR_ERR_NA;
416 }
fa0d6afe
BV
417 }
418
419 return ret;
420}
421
ab988ecb
BV
422static int dev_close(struct sr_dev_inst *sdi)
423{
424 struct dev_context *devc;
425
426 devc = sdi->priv;
427 if (devc->config_dirty)
428 /* Some configuration changes were queued up but didn't
429 * get sent to the device, likely because we were never
430 * in acquisition mode. Send them out now. */
431 send_config(sdi);
432
433 return std_serial_dev_close(sdi);
434}
435
695dc859 436static int dev_acquisition_start(const struct sr_dev_inst *sdi)
fa0d6afe 437{
33c40990
BV
438 struct dev_context *devc;
439 struct sr_serial_dev_inst *serial;
440 uint8_t packet[PACKET_SIZE];
441
33c40990
BV
442 devc = sdi->priv;
443 memset(devc->packet, 0x44, PACKET_SIZE);
444 devc->packet_size = 0;
445
446 devc->acquisition_running = TRUE;
447
448 serial = sdi->conn;
102f1239
BV
449 serial_source_add(sdi->session, serial, G_IO_IN, 50,
450 atten_pps3xxx_receive_data, (void *)sdi);
bee2b016 451 std_session_send_df_header(sdi);
33c40990 452
ba7dd8bb 453 /* Send a "channel" configuration packet now. */
33c40990
BV
454 memset(packet, 0, PACKET_SIZE);
455 packet[0] = 0xaa;
456 packet[1] = 0xaa;
457 send_packet(sdi, packet);
fa0d6afe
BV
458
459 return SR_OK;
460}
461
695dc859 462static int dev_acquisition_stop(struct sr_dev_inst *sdi)
fa0d6afe 463{
33c40990
BV
464 struct dev_context *devc;
465
33c40990
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466 devc = sdi->priv;
467 devc->acquisition_running = FALSE;
fa0d6afe
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468
469 return SR_OK;
470}
471
dd5c48a6 472static struct sr_dev_driver atten_pps3203_driver_info = {
33c40990
BV
473 .name = "atten-pps3203",
474 .longname = "Atten PPS3203T-3S",
fa0d6afe 475 .api_version = 1,
c2fdcc25 476 .init = std_init,
700d6b64 477 .cleanup = std_cleanup,
33c40990 478 .scan = scan_3203,
c01bf34c 479 .dev_list = std_dev_list,
a6630742 480 .dev_clear = NULL,
fa0d6afe
BV
481 .config_get = config_get,
482 .config_set = config_set,
483 .config_list = config_list,
33c40990 484 .dev_open = std_serial_dev_open,
ab988ecb 485 .dev_close = dev_close,
fa0d6afe
BV
486 .dev_acquisition_start = dev_acquisition_start,
487 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 488 .context = NULL,
fa0d6afe 489};
dd5c48a6 490SR_REGISTER_DEV_DRIVER(atten_pps3203_driver_info);