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3ba56876 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
3ba56876 | 22 | #include <config.h> |
23 | #include "protocol.h" | |
24 | ||
3ba56876 | 25 | /* |
26 | * Channel numbers seem to go from 1-16, according to this image: | |
27 | * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg | |
28 | * (the cable has two additional GND pins, and a TI and TO pin) | |
29 | */ | |
30 | static const char *channel_names[] = { | |
31 | "1", "2", "3", "4", "5", "6", "7", "8", | |
32 | "9", "10", "11", "12", "13", "14", "15", "16", | |
33 | }; | |
34 | ||
35 | static const uint32_t drvopts[] = { | |
36 | SR_CONF_LOGIC_ANALYZER, | |
37 | }; | |
38 | ||
39 | static const uint32_t devopts[] = { | |
40 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
2f7e529c | 41 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
3ba56876 | 42 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
de3f7acb | 43 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 44 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, |
45 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
de3f7acb | 46 | #endif |
3ba56876 | 47 | }; |
48 | ||
eac48b34 | 49 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 50 | static const int32_t trigger_matches[] = { |
51 | SR_TRIGGER_ZERO, | |
52 | SR_TRIGGER_ONE, | |
53 | SR_TRIGGER_RISING, | |
54 | SR_TRIGGER_FALLING, | |
55 | }; | |
eac48b34 | 56 | #endif |
3ba56876 | 57 | |
3553451f | 58 | static void clear_helper(struct dev_context *devc) |
53279f13 | 59 | { |
53279f13 UH |
60 | ftdi_deinit(&devc->ftdic); |
61 | } | |
62 | ||
3ba56876 | 63 | static int dev_clear(const struct sr_dev_driver *di) |
64 | { | |
3553451f | 65 | return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper); |
3ba56876 | 66 | } |
67 | ||
3ba56876 | 68 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
69 | { | |
70 | struct sr_dev_inst *sdi; | |
3ba56876 | 71 | struct dev_context *devc; |
3ba56876 | 72 | struct ftdi_device_list *devlist; |
73 | char serial_txt[10]; | |
74 | uint32_t serial; | |
75 | int ret; | |
76 | unsigned int i; | |
77 | ||
78 | (void)options; | |
79 | ||
3ba56876 | 80 | devc = g_malloc0(sizeof(struct dev_context)); |
81 | ||
82 | ftdi_init(&devc->ftdic); | |
83 | ||
3ba56876 | 84 | if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist, |
85 | USB_VENDOR, USB_PRODUCT)) <= 0) { | |
86 | if (ret < 0) | |
87 | sr_err("ftdi_usb_find_all(): %d", ret); | |
88 | goto free; | |
89 | } | |
90 | ||
91 | /* Make sure it's a version 1 or 2 SIGMA. */ | |
92 | ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0, | |
93 | serial_txt, sizeof(serial_txt)); | |
94 | sscanf(serial_txt, "%x", &serial); | |
95 | ||
96 | if (serial < 0xa6010000 || serial > 0xa602ffff) { | |
97 | sr_err("Only SIGMA and SIGMA2 are supported " | |
98 | "in this version of libsigrok."); | |
99 | goto free; | |
100 | } | |
101 | ||
102 | sr_info("Found ASIX SIGMA - Serial: %s", serial_txt); | |
103 | ||
104 | devc->cur_samplerate = samplerates[0]; | |
3ba56876 | 105 | devc->limit_msec = 0; |
2f7e529c | 106 | devc->limit_samples = 0; |
3ba56876 | 107 | devc->cur_firmware = -1; |
108 | devc->num_channels = 0; | |
109 | devc->samples_per_event = 0; | |
110 | devc->capture_ratio = 50; | |
111 | devc->use_triggers = 0; | |
112 | ||
3ba56876 | 113 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
114 | sdi->status = SR_ST_INITIALIZING; | |
b15ff1c9 UH |
115 | sdi->vendor = g_strdup("ASIX"); |
116 | sdi->model = g_strdup("SIGMA"); | |
3ba56876 | 117 | |
118 | for (i = 0; i < ARRAY_SIZE(channel_names); i++) | |
119 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]); | |
120 | ||
3ba56876 | 121 | sdi->priv = devc; |
122 | ||
3ba56876 | 123 | ftdi_list_free(&devlist); |
124 | ||
43376f33 | 125 | return std_scan_complete(di, g_slist_append(NULL, sdi)); |
3ba56876 | 126 | |
127 | free: | |
128 | ftdi_deinit(&devc->ftdic); | |
129 | g_free(devc); | |
130 | return NULL; | |
131 | } | |
132 | ||
3ba56876 | 133 | static int dev_open(struct sr_dev_inst *sdi) |
134 | { | |
135 | struct dev_context *devc; | |
136 | int ret; | |
137 | ||
138 | devc = sdi->priv; | |
139 | ||
3ba56876 | 140 | if ((ret = ftdi_usb_open_desc(&devc->ftdic, |
7e463623 UH |
141 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { |
142 | sr_err("Failed to open device (%d): %s.", | |
143 | ret, ftdi_get_error_string(&devc->ftdic)); | |
144 | return SR_ERR; | |
3ba56876 | 145 | } |
146 | ||
3ba56876 | 147 | return SR_OK; |
148 | } | |
149 | ||
150 | static int dev_close(struct sr_dev_inst *sdi) | |
151 | { | |
152 | struct dev_context *devc; | |
153 | ||
154 | devc = sdi->priv; | |
155 | ||
f1ba6b4b | 156 | return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR; |
3ba56876 | 157 | } |
158 | ||
3ba56876 | 159 | static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, |
160 | const struct sr_channel_group *cg) | |
161 | { | |
162 | struct dev_context *devc; | |
163 | ||
164 | (void)cg; | |
165 | ||
166 | if (!sdi) | |
167 | return SR_ERR; | |
168 | devc = sdi->priv; | |
169 | ||
170 | switch (key) { | |
171 | case SR_CONF_SAMPLERATE: | |
172 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
173 | break; | |
174 | case SR_CONF_LIMIT_MSEC: | |
175 | *data = g_variant_new_uint64(devc->limit_msec); | |
176 | break; | |
2f7e529c GS |
177 | case SR_CONF_LIMIT_SAMPLES: |
178 | *data = g_variant_new_uint64(devc->limit_samples); | |
179 | break; | |
de3f7acb | 180 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 181 | case SR_CONF_CAPTURE_RATIO: |
182 | *data = g_variant_new_uint64(devc->capture_ratio); | |
183 | break; | |
de3f7acb | 184 | #endif |
3ba56876 | 185 | default: |
186 | return SR_ERR_NA; | |
187 | } | |
188 | ||
189 | return SR_OK; | |
190 | } | |
191 | ||
192 | static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, | |
193 | const struct sr_channel_group *cg) | |
194 | { | |
195 | struct dev_context *devc; | |
196 | uint64_t tmp; | |
197 | int ret; | |
198 | ||
199 | (void)cg; | |
200 | ||
3ba56876 | 201 | devc = sdi->priv; |
202 | ||
203 | ret = SR_OK; | |
204 | switch (key) { | |
205 | case SR_CONF_SAMPLERATE: | |
206 | ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data)); | |
207 | break; | |
208 | case SR_CONF_LIMIT_MSEC: | |
209 | tmp = g_variant_get_uint64(data); | |
210 | if (tmp > 0) | |
211 | devc->limit_msec = g_variant_get_uint64(data); | |
212 | else | |
213 | ret = SR_ERR; | |
214 | break; | |
215 | case SR_CONF_LIMIT_SAMPLES: | |
216 | tmp = g_variant_get_uint64(data); | |
2f7e529c | 217 | devc->limit_samples = tmp; |
9a0a606a | 218 | devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp); |
3ba56876 | 219 | break; |
de3f7acb | 220 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 221 | case SR_CONF_CAPTURE_RATIO: |
222 | tmp = g_variant_get_uint64(data); | |
de3f7acb GS |
223 | if (tmp > 100) |
224 | return SR_ERR; | |
225 | devc->capture_ratio = tmp; | |
3ba56876 | 226 | break; |
de3f7acb | 227 | #endif |
3ba56876 | 228 | default: |
229 | ret = SR_ERR_NA; | |
230 | } | |
231 | ||
232 | return ret; | |
233 | } | |
234 | ||
235 | static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, | |
236 | const struct sr_channel_group *cg) | |
237 | { | |
3ba56876 | 238 | switch (key) { |
239 | case SR_CONF_DEVICE_OPTIONS: | |
e66d1892 | 240 | return STD_CONFIG_LIST(key, data, sdi, cg, NULL, drvopts, devopts); |
3ba56876 | 241 | case SR_CONF_SAMPLERATE: |
463160cb | 242 | *data = std_gvar_samplerates(samplerates, samplerates_count); |
3ba56876 | 243 | break; |
de3f7acb | 244 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 245 | case SR_CONF_TRIGGER_MATCH: |
53012da6 | 246 | *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches)); |
3ba56876 | 247 | break; |
de3f7acb | 248 | #endif |
3ba56876 | 249 | default: |
250 | return SR_ERR_NA; | |
251 | } | |
252 | ||
253 | return SR_OK; | |
254 | } | |
255 | ||
695dc859 | 256 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
3ba56876 | 257 | { |
258 | struct dev_context *devc; | |
259 | struct clockselect_50 clockselect; | |
8256ed15 | 260 | int triggerpin, ret; |
f06fb3e9 | 261 | uint8_t triggerselect; |
3ba56876 | 262 | struct triggerinout triggerinout_conf; |
263 | struct triggerlut lut; | |
22f64ed8 | 264 | uint8_t regval; |
8256ed15 GS |
265 | uint8_t clock_bytes[sizeof(clockselect)]; |
266 | size_t clock_idx; | |
3ba56876 | 267 | |
3ba56876 | 268 | devc = sdi->priv; |
269 | ||
270 | if (sigma_convert_trigger(sdi) != SR_OK) { | |
271 | sr_err("Failed to configure triggers."); | |
272 | return SR_ERR; | |
273 | } | |
274 | ||
275 | /* If the samplerate has not been set, default to 200 kHz. */ | |
276 | if (devc->cur_firmware == -1) { | |
277 | if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK) | |
278 | return ret; | |
279 | } | |
280 | ||
281 | /* Enter trigger programming mode. */ | |
282 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc); | |
283 | ||
f06fb3e9 | 284 | triggerselect = 0; |
3ba56876 | 285 | if (devc->cur_samplerate >= SR_MHZ(100)) { |
f06fb3e9 | 286 | /* 100 and 200 MHz mode. */ |
3ba56876 | 287 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc); |
288 | ||
289 | /* Find which pin to trigger on from mask. */ | |
0a1f7b09 | 290 | for (triggerpin = 0; triggerpin < 8; triggerpin++) |
3ba56876 | 291 | if ((devc->trigger.risingmask | devc->trigger.fallingmask) & |
292 | (1 << triggerpin)) | |
293 | break; | |
294 | ||
295 | /* Set trigger pin and light LED on trigger. */ | |
296 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
297 | ||
298 | /* Default rising edge. */ | |
299 | if (devc->trigger.fallingmask) | |
300 | triggerselect |= 1 << 3; | |
301 | ||
3ba56876 | 302 | } else if (devc->cur_samplerate <= SR_MHZ(50)) { |
f06fb3e9 | 303 | /* All other modes. */ |
3ba56876 | 304 | sigma_build_basic_trigger(&lut, devc); |
305 | ||
306 | sigma_write_trigger_lut(&lut, devc); | |
307 | ||
308 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
309 | } | |
310 | ||
311 | /* Setup trigger in and out pins to default values. */ | |
312 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
313 | triggerinout_conf.trgout_bytrigger = 1; | |
314 | triggerinout_conf.trgout_enable = 1; | |
315 | ||
316 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
317 | (uint8_t *) &triggerinout_conf, | |
318 | sizeof(struct triggerinout), devc); | |
319 | ||
320 | /* Go back to normal mode. */ | |
321 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc); | |
322 | ||
323 | /* Set clock select register. */ | |
8256ed15 GS |
324 | clockselect.async = 0; |
325 | clockselect.fraction = 1 - 1; /* Divider 1. */ | |
326 | clockselect.disabled_channels = 0x0000; /* All channels enabled. */ | |
327 | if (devc->cur_samplerate == SR_MHZ(200)) { | |
3ba56876 | 328 | /* Enable 4 channels. */ |
8256ed15 GS |
329 | clockselect.disabled_channels = 0xf0ff; |
330 | } else if (devc->cur_samplerate == SR_MHZ(100)) { | |
3ba56876 | 331 | /* Enable 8 channels. */ |
8256ed15 GS |
332 | clockselect.disabled_channels = 0x00ff; |
333 | } else { | |
3ba56876 | 334 | /* |
8256ed15 GS |
335 | * 50 MHz mode, or fraction thereof. The 50MHz reference |
336 | * can get divided by any integer in the range 1 to 256. | |
337 | * Divider minus 1 gets written to the hardware. | |
338 | * (The driver lists a discrete set of sample rates, but | |
339 | * all of them fit the above description.) | |
3ba56876 | 340 | */ |
8256ed15 | 341 | clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1; |
3ba56876 | 342 | } |
8256ed15 GS |
343 | clock_idx = 0; |
344 | clock_bytes[clock_idx++] = clockselect.async; | |
345 | clock_bytes[clock_idx++] = clockselect.fraction; | |
346 | clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff; | |
347 | clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8; | |
348 | sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc); | |
3ba56876 | 349 | |
350 | /* Setup maximum post trigger time. */ | |
351 | sigma_set_register(WRITE_POST_TRIGGER, | |
352 | (devc->capture_ratio * 255) / 100, devc); | |
353 | ||
354 | /* Start acqusition. */ | |
2f425a56 | 355 | devc->start_time = g_get_monotonic_time(); |
22f64ed8 GS |
356 | regval = WMR_TRGRES | WMR_SDRAMWRITEEN; |
357 | #if ASIX_SIGMA_WITH_TRIGGER | |
358 | regval |= WMR_TRGEN; | |
359 | #endif | |
360 | sigma_set_register(WRITE_MODE, regval, devc); | |
3ba56876 | 361 | |
bee2b016 | 362 | std_session_send_df_header(sdi); |
3ba56876 | 363 | |
364 | /* Add capture source. */ | |
365 | sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi); | |
366 | ||
367 | devc->state.state = SIGMA_CAPTURE; | |
368 | ||
369 | return SR_OK; | |
370 | } | |
371 | ||
695dc859 | 372 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
3ba56876 | 373 | { |
374 | struct dev_context *devc; | |
375 | ||
3ba56876 | 376 | devc = sdi->priv; |
377 | devc->state.state = SIGMA_IDLE; | |
378 | ||
379 | sr_session_source_remove(sdi->session, -1); | |
380 | ||
381 | return SR_OK; | |
382 | } | |
383 | ||
dd5c48a6 | 384 | static struct sr_dev_driver asix_sigma_driver_info = { |
3ba56876 | 385 | .name = "asix-sigma", |
386 | .longname = "ASIX SIGMA/SIGMA2", | |
387 | .api_version = 1, | |
c2fdcc25 | 388 | .init = std_init, |
700d6b64 | 389 | .cleanup = std_cleanup, |
3ba56876 | 390 | .scan = scan, |
c01bf34c | 391 | .dev_list = std_dev_list, |
3ba56876 | 392 | .dev_clear = dev_clear, |
393 | .config_get = config_get, | |
394 | .config_set = config_set, | |
395 | .config_list = config_list, | |
396 | .dev_open = dev_open, | |
397 | .dev_close = dev_close, | |
398 | .dev_acquisition_start = dev_acquisition_start, | |
399 | .dev_acquisition_stop = dev_acquisition_stop, | |
400 | .context = NULL, | |
401 | }; | |
dd5c48a6 | 402 | SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info); |