[libsigrok.git] / src / hardware / asix-sigma / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/*
 * ASIX SIGMA/SIGMA2 logic analyzer driver
 */

#include <config.h>
#include "protocol.h"

/*
 * Channel numbers seem to go from 1-16, according to this image:
 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
 * (the cable has two additional GND pins, and a TI and TO pin)
 */
static const char *channel_names[] = {
	"1", "2", "3", "4", "5", "6", "7", "8",
	"9", "10", "11", "12", "13", "14", "15", "16",
};

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t devopts[] = {
	SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
#if ASIX_SIGMA_WITH_TRIGGER
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
#endif
};

#if ASIX_SIGMA_WITH_TRIGGER
static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
	SR_TRIGGER_RISING,
	SR_TRIGGER_FALLING,
};
#endif

static void clear_helper(void *priv)
{
	struct dev_context *devc;

	devc = priv;

	ftdi_deinit(&devc->ftdic);
}

static int dev_clear(const struct sr_dev_driver *di)
{
	return std_dev_clear_with_callback(di, clear_helper);
}

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	struct ftdi_device_list *devlist;
	char serial_txt[10];
	uint32_t serial;
	int ret;
	unsigned int i;

	(void)options;

	devc = g_malloc0(sizeof(struct dev_context));

	ftdi_init(&devc->ftdic);

	/* Look for SIGMAs. */

	if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
	    USB_VENDOR, USB_PRODUCT)) <= 0) {
		if (ret < 0)
			sr_err("ftdi_usb_find_all(): %d", ret);
		goto free;
	}

	/* Make sure it's a version 1 or 2 SIGMA. */
	ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
			     serial_txt, sizeof(serial_txt));
	sscanf(serial_txt, "%x", &serial);

	if (serial < 0xa6010000 || serial > 0xa602ffff) {
		sr_err("Only SIGMA and SIGMA2 are supported "
		       "in this version of libsigrok.");
		goto free;
	}

	sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);

	devc->cur_samplerate = samplerates[0];
	devc->limit_msec = 0;
	devc->limit_samples = 0;
	devc->cur_firmware = -1;
	devc->num_channels = 0;
	devc->samples_per_event = 0;
	devc->capture_ratio = 50;
	devc->use_triggers = 0;

	/* Register SIGMA device. */
	sdi = g_malloc0(sizeof(struct sr_dev_inst));
	sdi->status = SR_ST_INITIALIZING;
	sdi->vendor = g_strdup(USB_VENDOR_NAME);
	sdi->model = g_strdup(USB_MODEL_NAME);

	for (i = 0; i < ARRAY_SIZE(channel_names); i++)
		sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);

	sdi->priv = devc;

	/* We will open the device again when we need it. */
	ftdi_list_free(&devlist);

	return std_scan_complete(di, g_slist_append(NULL, sdi));

free:
	ftdi_deinit(&devc->ftdic);
	g_free(devc);
	return NULL;
}

static int dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int ret;

	devc = sdi->priv;

	if ((ret = ftdi_usb_open_desc(&devc->ftdic,
			USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
		sr_err("Failed to open device (%d): %s.",
		       ret, ftdi_get_error_string(&devc->ftdic));
		return SR_ERR;
	}

	return SR_OK;
}

static int dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR;
}

static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR;
	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_LIMIT_MSEC:
		*data = g_variant_new_uint64(devc->limit_msec);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	uint64_t tmp;
	int ret;

	(void)cg;

	devc = sdi->priv;

	ret = SR_OK;
	switch (key) {
	case SR_CONF_SAMPLERATE:
		ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_MSEC:
		tmp = g_variant_get_uint64(data);
		if (tmp > 0)
			devc->limit_msec = g_variant_get_uint64(data);
		else
			ret = SR_ERR;
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp = g_variant_get_uint64(data);
		devc->limit_samples = tmp;
		devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		tmp = g_variant_get_uint64(data);
		if (tmp > 100)
			return SR_ERR;
		devc->capture_ratio = tmp;
		break;
#endif
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	GVariant *gvar;
	GVariantBuilder gvb;

	(void)cg;

	switch (key) {
	case SR_CONF_DEVICE_OPTIONS:
		if (!sdi)
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
		else
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				samplerates_count, sizeof(samplerates[0]));
		g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_TRIGGER_MATCH:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				trigger_matches, ARRAY_SIZE(trigger_matches),
				sizeof(int32_t));
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct clockselect_50 clockselect;
	int triggerpin, ret;
	uint8_t triggerselect;
	struct triggerinout triggerinout_conf;
	struct triggerlut lut;
	uint8_t regval;
	uint8_t clock_bytes[sizeof(clockselect)];
	size_t clock_idx;

	devc = sdi->priv;

	if (sigma_convert_trigger(sdi) != SR_OK) {
		sr_err("Failed to configure triggers.");
		return SR_ERR;
	}

	/* If the samplerate has not been set, default to 200 kHz. */
	if (devc->cur_firmware == -1) {
		if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
			return ret;
	}

	/* Enter trigger programming mode. */
	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);

	triggerselect = 0;
	if (devc->cur_samplerate >= SR_MHZ(100)) {
		/* 100 and 200 MHz mode. */
		sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);

		/* Find which pin to trigger on from mask. */
		for (triggerpin = 0; triggerpin < 8; triggerpin++)
			if ((devc->trigger.risingmask | devc->trigger.fallingmask) &
			    (1 << triggerpin))
				break;

		/* Set trigger pin and light LED on trigger. */
		triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7);

		/* Default rising edge. */
		if (devc->trigger.fallingmask)
			triggerselect |= 1 << 3;

	} else if (devc->cur_samplerate <= SR_MHZ(50)) {
		/* All other modes. */
		sigma_build_basic_trigger(&lut, devc);

		sigma_write_trigger_lut(&lut, devc);

		triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0);
	}

	/* Setup trigger in and out pins to default values. */
	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	triggerinout_conf.trgout_bytrigger = 1;
	triggerinout_conf.trgout_enable = 1;

	sigma_write_register(WRITE_TRIGGER_OPTION,
			     (uint8_t *) &triggerinout_conf,
			     sizeof(struct triggerinout), devc);

	/* Go back to normal mode. */
	sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);

	/* Set clock select register. */
	clockselect.async = 0;
	clockselect.fraction = 1 - 1;		/* Divider 1. */
	clockselect.disabled_channels = 0x0000;	/* All channels enabled. */
	if (devc->cur_samplerate == SR_MHZ(200)) {
		/* Enable 4 channels. */
		clockselect.disabled_channels = 0xf0ff;
	} else if (devc->cur_samplerate == SR_MHZ(100)) {
		/* Enable 8 channels. */
		clockselect.disabled_channels = 0x00ff;
	} else {
		/*
		 * 50 MHz mode, or fraction thereof. The 50MHz reference
		 * can get divided by any integer in the range 1 to 256.
		 * Divider minus 1 gets written to the hardware.
		 * (The driver lists a discrete set of sample rates, but
		 * all of them fit the above description.)
		 */
		clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
	}
	clock_idx = 0;
	clock_bytes[clock_idx++] = clockselect.async;
	clock_bytes[clock_idx++] = clockselect.fraction;
	clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
	clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
	sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);

	/* Setup maximum post trigger time. */
	sigma_set_register(WRITE_POST_TRIGGER,
			   (devc->capture_ratio * 255) / 100, devc);

	/* Start acqusition. */
	devc->start_time = g_get_monotonic_time();
	regval =  WMR_TRGRES | WMR_SDRAMWRITEEN;
#if ASIX_SIGMA_WITH_TRIGGER
	regval |= WMR_TRGEN;
#endif
	sigma_set_register(WRITE_MODE, regval, devc);

	std_session_send_df_header(sdi);

	/* Add capture source. */
	sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);

	devc->state.state = SIGMA_CAPTURE;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;
	devc->state.state = SIGMA_IDLE;

	sr_session_source_remove(sdi->session, -1);

	return SR_OK;
}

static struct sr_dev_driver asix_sigma_driver_info = {
	.name = "asix-sigma",
	.longname = "ASIX SIGMA/SIGMA2",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = dev_open,
	.dev_close = dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);
Commit	Line	Data
3ba56876	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
	5	* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
	6	* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	/*
	23	* ASIX SIGMA/SIGMA2 logic analyzer driver
	24	*/
	25
	26	#include <config.h>
	27	#include "protocol.h"
	28
3ba56876	29	/*
	30	* Channel numbers seem to go from 1-16, according to this image:
	31	* http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
	32	* (the cable has two additional GND pins, and a TI and TO pin)
	33	*/
	34	static const char *channel_names[] = {
	35	"1", "2", "3", "4", "5", "6", "7", "8",
	36	"9", "10", "11", "12", "13", "14", "15", "16",
	37	};
	38
	39	static const uint32_t drvopts[] = {
	40	SR_CONF_LOGIC_ANALYZER,
	41	};
	42
	43	static const uint32_t devopts[] = {
	44	SR_CONF_LIMIT_MSEC \| SR_CONF_GET \| SR_CONF_SET,
2f7e529c	45	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET,
3ba56876	46	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
de3f7acb	47	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	48	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
3ba56876	49	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
de3f7acb	50	#endif
3ba56876	51	};
3ba56876	52
eac48b34	53	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	54	static const int32_t trigger_matches[] = {
	55	SR_TRIGGER_ZERO,
	56	SR_TRIGGER_ONE,
	57	SR_TRIGGER_RISING,
	58	SR_TRIGGER_FALLING,
	59	};
eac48b34	60	#endif
3ba56876	61
53279f13 UH	62	static void clear_helper(void *priv)
	63	{
	64	struct dev_context *devc;
	65
	66	devc = priv;
	67
	68	ftdi_deinit(&devc->ftdic);
	69	}
	70
3ba56876	71	static int dev_clear(const struct sr_dev_driver *di)
3ba56876	72	{
53279f13	73	return std_dev_clear_with_callback(di, clear_helper);
3ba56876	74	}
3ba56876	75
3ba56876	76	static GSList scan(struct sr_dev_driver di, GSList *options)
	77	{
	78	struct sr_dev_inst *sdi;
3ba56876	79	struct dev_context *devc;
3ba56876	80	struct ftdi_device_list *devlist;
	81	char serial_txt[10];
	82	uint32_t serial;
	83	int ret;
	84	unsigned int i;
	85
	86	(void)options;
	87
3ba56876	88	devc = g_malloc0(sizeof(struct dev_context));
	89
	90	ftdi_init(&devc->ftdic);
	91
	92	/* Look for SIGMAs. */
	93
	94	if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist,
	95	USB_VENDOR, USB_PRODUCT)) <= 0) {
	96	if (ret < 0)
	97	sr_err("ftdi_usb_find_all(): %d", ret);
	98	goto free;
	99	}
	100
	101	/* Make sure it's a version 1 or 2 SIGMA. */
	102	ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0,
	103	serial_txt, sizeof(serial_txt));
	104	sscanf(serial_txt, "%x", &serial);
	105
	106	if (serial < 0xa6010000 \|\| serial > 0xa602ffff) {
	107	sr_err("Only SIGMA and SIGMA2 are supported "
	108	"in this version of libsigrok.");
	109	goto free;
	110	}
	111
	112	sr_info("Found ASIX SIGMA - Serial: %s", serial_txt);
	113
	114	devc->cur_samplerate = samplerates[0];
3ba56876	115	devc->limit_msec = 0;
2f7e529c	116	devc->limit_samples = 0;
3ba56876	117	devc->cur_firmware = -1;
	118	devc->num_channels = 0;
	119	devc->samples_per_event = 0;
	120	devc->capture_ratio = 50;
	121	devc->use_triggers = 0;
	122
	123	/* Register SIGMA device. */
	124	sdi = g_malloc0(sizeof(struct sr_dev_inst));
	125	sdi->status = SR_ST_INITIALIZING;
	126	sdi->vendor = g_strdup(USB_VENDOR_NAME);
	127	sdi->model = g_strdup(USB_MODEL_NAME);
3ba56876	128
	129	for (i = 0; i < ARRAY_SIZE(channel_names); i++)
	130	sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]);
	131
3ba56876	132	sdi->priv = devc;
	133
	134	/* We will open the device again when we need it. */
	135	ftdi_list_free(&devlist);
	136
43376f33	137	return std_scan_complete(di, g_slist_append(NULL, sdi));
3ba56876	138
	139	free:
	140	ftdi_deinit(&devc->ftdic);
	141	g_free(devc);
	142	return NULL;
	143	}
	144
3ba56876	145	static int dev_open(struct sr_dev_inst *sdi)
	146	{
	147	struct dev_context *devc;
	148	int ret;
	149
	150	devc = sdi->priv;
	151
3ba56876	152	if ((ret = ftdi_usb_open_desc(&devc->ftdic,
7e463623 UH	153	USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
	154	sr_err("Failed to open device (%d): %s.",
	155	ret, ftdi_get_error_string(&devc->ftdic));
	156	return SR_ERR;
3ba56876	157	}
3ba56876	158
3ba56876	159	return SR_OK;
	160	}
	161
	162	static int dev_close(struct sr_dev_inst *sdi)
	163	{
	164	struct dev_context *devc;
	165
	166	devc = sdi->priv;
	167
f1ba6b4b	168	return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR;
3ba56876	169	}
3ba56876	170
3ba56876	171	static int config_get(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
	172	const struct sr_channel_group *cg)
	173	{
	174	struct dev_context *devc;
	175
	176	(void)cg;
	177
	178	if (!sdi)
	179	return SR_ERR;
	180	devc = sdi->priv;
	181
	182	switch (key) {
	183	case SR_CONF_SAMPLERATE:
	184	*data = g_variant_new_uint64(devc->cur_samplerate);
	185	break;
	186	case SR_CONF_LIMIT_MSEC:
	187	*data = g_variant_new_uint64(devc->limit_msec);
	188	break;
2f7e529c GS	189	case SR_CONF_LIMIT_SAMPLES:
	190	*data = g_variant_new_uint64(devc->limit_samples);
	191	break;
de3f7acb	192	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	193	case SR_CONF_CAPTURE_RATIO:
	194	*data = g_variant_new_uint64(devc->capture_ratio);
	195	break;
de3f7acb	196	#endif
3ba56876	197	default:
	198	return SR_ERR_NA;
	199	}
	200
	201	return SR_OK;
	202	}
	203
	204	static int config_set(uint32_t key, GVariant data, const struct sr_dev_inst sdi,
	205	const struct sr_channel_group *cg)
	206	{
	207	struct dev_context *devc;
	208	uint64_t tmp;
	209	int ret;
	210
	211	(void)cg;
	212
3ba56876	213	devc = sdi->priv;
	214
	215	ret = SR_OK;
	216	switch (key) {
	217	case SR_CONF_SAMPLERATE:
	218	ret = sigma_set_samplerate(sdi, g_variant_get_uint64(data));
	219	break;
	220	case SR_CONF_LIMIT_MSEC:
	221	tmp = g_variant_get_uint64(data);
	222	if (tmp > 0)
	223	devc->limit_msec = g_variant_get_uint64(data);
	224	else
	225	ret = SR_ERR;
	226	break;
	227	case SR_CONF_LIMIT_SAMPLES:
	228	tmp = g_variant_get_uint64(data);
2f7e529c	229	devc->limit_samples = tmp;
9a0a606a	230	devc->limit_msec = sigma_limit_samples_to_msec(devc, tmp);
3ba56876	231	break;
de3f7acb	232	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	233	case SR_CONF_CAPTURE_RATIO:
3ba56876	234	tmp = g_variant_get_uint64(data);
de3f7acb GS	235	if (tmp > 100)
	236	return SR_ERR;
	237	devc->capture_ratio = tmp;
3ba56876	238	break;
de3f7acb	239	#endif
3ba56876	240	default:
	241	ret = SR_ERR_NA;
	242	}
	243
	244	return ret;
	245	}
	246
	247	static int config_list(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
	248	const struct sr_channel_group *cg)
	249	{
	250	GVariant *gvar;
	251	GVariantBuilder gvb;
	252
	253	(void)cg;
	254
	255	switch (key) {
	256	case SR_CONF_DEVICE_OPTIONS:
	257	if (!sdi)
	258	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	259	drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
	260	else
	261	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	262	devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
	263	break;
	264	case SR_CONF_SAMPLERATE:
	265	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	266	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
4154a516	267	samplerates_count, sizeof(samplerates[0]));
3ba56876	268	g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
	269	*data = g_variant_builder_end(&gvb);
	270	break;
de3f7acb	271	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	272	case SR_CONF_TRIGGER_MATCH:
	273	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
	274	trigger_matches, ARRAY_SIZE(trigger_matches),
	275	sizeof(int32_t));
	276	break;
de3f7acb	277	#endif
3ba56876	278	default:
	279	return SR_ERR_NA;
	280	}
	281
	282	return SR_OK;
	283	}
	284
695dc859	285	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3ba56876	286	{
	287	struct dev_context *devc;
	288	struct clockselect_50 clockselect;
8256ed15	289	int triggerpin, ret;
f06fb3e9	290	uint8_t triggerselect;
3ba56876	291	struct triggerinout triggerinout_conf;
3ba56876	292	struct triggerlut lut;
22f64ed8	293	uint8_t regval;
8256ed15 GS	294	uint8_t clock_bytes[sizeof(clockselect)];
8256ed15 GS	295	size_t clock_idx;
3ba56876	296
3ba56876	297	devc = sdi->priv;
	298
	299	if (sigma_convert_trigger(sdi) != SR_OK) {
	300	sr_err("Failed to configure triggers.");
	301	return SR_ERR;
	302	}
	303
	304	/* If the samplerate has not been set, default to 200 kHz. */
	305	if (devc->cur_firmware == -1) {
	306	if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK)
	307	return ret;
	308	}
	309
	310	/* Enter trigger programming mode. */
	311	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
	312
f06fb3e9	313	triggerselect = 0;
3ba56876	314	if (devc->cur_samplerate >= SR_MHZ(100)) {
f06fb3e9	315	/* 100 and 200 MHz mode. */
3ba56876	316	sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
	317
	318	/* Find which pin to trigger on from mask. */
0a1f7b09	319	for (triggerpin = 0; triggerpin < 8; triggerpin++)
3ba56876	320	if ((devc->trigger.risingmask \| devc->trigger.fallingmask) &
	321	(1 << triggerpin))
	322	break;
	323
	324	/* Set trigger pin and light LED on trigger. */
	325	triggerselect = (1 << LEDSEL1) \| (triggerpin & 0x7);
	326
	327	/* Default rising edge. */
	328	if (devc->trigger.fallingmask)
	329	triggerselect \|= 1 << 3;
	330
3ba56876	331	} else if (devc->cur_samplerate <= SR_MHZ(50)) {
f06fb3e9	332	/* All other modes. */
3ba56876	333	sigma_build_basic_trigger(&lut, devc);
	334
	335	sigma_write_trigger_lut(&lut, devc);
	336
	337	triggerselect = (1 << LEDSEL1) \| (1 << LEDSEL0);
	338	}
	339
	340	/* Setup trigger in and out pins to default values. */
	341	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	342	triggerinout_conf.trgout_bytrigger = 1;
	343	triggerinout_conf.trgout_enable = 1;
	344
	345	sigma_write_register(WRITE_TRIGGER_OPTION,
	346	(uint8_t *) &triggerinout_conf,
	347	sizeof(struct triggerinout), devc);
	348
	349	/* Go back to normal mode. */
	350	sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
	351
	352	/* Set clock select register. */
8256ed15 GS	353	clockselect.async = 0;
	354	clockselect.fraction = 1 - 1; /* Divider 1. */
	355	clockselect.disabled_channels = 0x0000; /* All channels enabled. */
	356	if (devc->cur_samplerate == SR_MHZ(200)) {
3ba56876	357	/* Enable 4 channels. */
8256ed15 GS	358	clockselect.disabled_channels = 0xf0ff;
8256ed15 GS	359	} else if (devc->cur_samplerate == SR_MHZ(100)) {
3ba56876	360	/* Enable 8 channels. */
8256ed15 GS	361	clockselect.disabled_channels = 0x00ff;
8256ed15 GS	362	} else {
3ba56876	363	/*
8256ed15 GS	364	* 50 MHz mode, or fraction thereof. The 50MHz reference
	365	* can get divided by any integer in the range 1 to 256.
	366	* Divider minus 1 gets written to the hardware.
	367	* (The driver lists a discrete set of sample rates, but
	368	* all of them fit the above description.)
3ba56876	369	*/
8256ed15	370	clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1;
3ba56876	371	}
8256ed15 GS	372	clock_idx = 0;
	373	clock_bytes[clock_idx++] = clockselect.async;
	374	clock_bytes[clock_idx++] = clockselect.fraction;
	375	clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff;
	376	clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8;
	377	sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc);
3ba56876	378
	379	/* Setup maximum post trigger time. */
	380	sigma_set_register(WRITE_POST_TRIGGER,
	381	(devc->capture_ratio * 255) / 100, devc);
	382
	383	/* Start acqusition. */
2f425a56	384	devc->start_time = g_get_monotonic_time();
22f64ed8 GS	385	regval = WMR_TRGRES \| WMR_SDRAMWRITEEN;
	386	#if ASIX_SIGMA_WITH_TRIGGER
	387	regval \|= WMR_TRGEN;
	388	#endif
	389	sigma_set_register(WRITE_MODE, regval, devc);
3ba56876	390
bee2b016	391	std_session_send_df_header(sdi);
3ba56876	392
	393	/* Add capture source. */
	394	sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi);
	395
	396	devc->state.state = SIGMA_CAPTURE;
	397
	398	return SR_OK;
	399	}
	400
695dc859	401	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3ba56876	402	{
	403	struct dev_context *devc;
	404
3ba56876	405	devc = sdi->priv;
	406	devc->state.state = SIGMA_IDLE;
	407
	408	sr_session_source_remove(sdi->session, -1);
	409
	410	return SR_OK;
	411	}
	412
dd5c48a6	413	static struct sr_dev_driver asix_sigma_driver_info = {
3ba56876	414	.name = "asix-sigma",
	415	.longname = "ASIX SIGMA/SIGMA2",
	416	.api_version = 1,
c2fdcc25	417	.init = std_init,
700d6b64	418	.cleanup = std_cleanup,
3ba56876	419	.scan = scan,
c01bf34c	420	.dev_list = std_dev_list,
3ba56876	421	.dev_clear = dev_clear,
	422	.config_get = config_get,
	423	.config_set = config_set,
	424	.config_list = config_list,
	425	.dev_open = dev_open,
	426	.dev_close = dev_close,
	427	.dev_acquisition_start = dev_acquisition_start,
	428	.dev_acquisition_stop = dev_acquisition_stop,
	429	.context = NULL,
	430	};
dd5c48a6	431	SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);