[libsigrok.git] / hardware / rigol-ds / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H

#include <stdint.h>
#include <stdbool.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"

#define LOG_PREFIX "rigol-ds"

/* Analog waveform block sizes */
#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
#define DSO1000_ANALOG_LIVE_WAVEFORM_SIZE 600
#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000

/* Digital waveform block size */
#define DS1000_DIGITAL_WAVEFORM_SIZE 1200
#define VS5000_DIGITAL_WAVEFORM_SIZE 4096

/* Size of acquisition buffers */
#define ACQ_BUFFER_SIZE 32768

#define MAX_ANALOG_PROBES 4
#define MAX_DIGITAL_PROBES 16

enum rigol_ds_series {
	RIGOL_VS5000,
	RIGOL_DS1000,
	RIGOL_DS1000Z,
	RIGOL_DS2000,
	RIGOL_DS4000,
	RIGOL_DS6000,
	AGILENT_DSO1000,
};

enum rigol_protocol_flavor {
	/* Used by DS1000 and VS5000 series */
	PROTOCOL_LEGACY,
	/* Used by DS2000, DS4000, DS6000, ... series */
	PROTOCOL_IEEE488_2,
};

enum data_source {
	DATA_SOURCE_LIVE,
	DATA_SOURCE_MEMORY,
	DATA_SOURCE_SEGMENTED,
};

struct rigol_ds_model {
	char *vendor;
	char *name;
	enum rigol_ds_series series;
	enum rigol_protocol_flavor protocol;
	uint64_t min_timebase[2];
	uint64_t max_timebase[2];
	uint64_t min_vdiv[2];
	unsigned int analog_channels;
	bool has_digital;
	int num_horizontal_divs;
};

enum wait_events {
	WAIT_NONE,    /* Don't wait */
	WAIT_TRIGGER, /* Wait for trigger (only live capture) */
	WAIT_BLOCK,   /* Wait for block data (only when reading sample mem) */
	WAIT_STOP,    /* Wait for scope stopping (only single shots) */
};

/** Private, per-device-instance driver context. */
struct dev_context {
	/* Device model */
	const struct rigol_ds_model *model;
	enum rigol_protocol_flavor protocol;

	/* Device properties */
	const uint64_t (*timebases)[2];
	uint64_t num_timebases;
	const uint64_t (*vdivs)[2];
	uint64_t num_vdivs;

	/* Probe groups */
	struct sr_probe_group analog_groups[MAX_ANALOG_PROBES];
	struct sr_probe_group digital_group;

	/* Acquisition settings */
	GSList *enabled_analog_probes;
	GSList *enabled_digital_probes;
	uint64_t limit_frames;
	void *cb_data;
	enum data_source data_source;
	uint64_t analog_frame_size;
	uint64_t digital_frame_size;

	/* Device settings */
	gboolean analog_channels[MAX_ANALOG_PROBES];
	gboolean digital_channels[MAX_DIGITAL_PROBES];
	gboolean la_enabled;
	float timebase;
	float vdiv[MAX_ANALOG_PROBES];
	int vert_reference[MAX_ANALOG_PROBES];
	float vert_offset[MAX_ANALOG_PROBES];
	char *trigger_source;
	float horiz_triggerpos;
	char *trigger_slope;
	char *coupling[MAX_ANALOG_PROBES];

	/* Operational state */

	/* Number of frames received in total. */
	uint64_t num_frames;
	/* GSList entry for the current channel. */
	GSList *channel_entry;
	/* Number of bytes received for current channel. */
	uint64_t num_channel_bytes;
	/* Number of bytes in current data block, if 0 block header expected */
	uint64_t num_block_bytes;
	/* Number of data block bytes already read */
	uint64_t num_block_read;
	/* What to wait for in *_receive */
	enum wait_events wait_event;
	/* Trigger/block copying/stop waiting status */
	int wait_status;
	/* Acq buffers used for reading from the scope and sending data to app */
	unsigned char *buffer;
	float *data;
};

SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...);
SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);

#endif
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9	5	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6 ML	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, either version 3 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
3086efdd ML	21	#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
3086efdd ML	22	#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
f4816ac6 ML	23
f4816ac6 ML	24	#include <stdint.h>
bafd4890	25	#include <stdbool.h>
f4816ac6 ML	26	#include "libsigrok.h"
	27	#include "libsigrok-internal.h"
	28
3544f848	29	#define LOG_PREFIX "rigol-ds"
f4816ac6	30
d22250a9	31	/* Analog waveform block sizes */
babab622 ML	32	#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
babab622 ML	33	#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
962af1a3	34	#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
0d9f5a12	35	#define DSO1000_ANALOG_LIVE_WAVEFORM_SIZE 600
babab622 ML	36	#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
babab622 ML	37	#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000
d22250a9 ML	38
	39	/* Digital waveform block size */
	40	#define DS1000_DIGITAL_WAVEFORM_SIZE 1200
	41	#define VS5000_DIGITAL_WAVEFORM_SIZE 4096
	42
babab622 ML	43	/* Size of acquisition buffers */
	44	#define ACQ_BUFFER_SIZE 32768
	45
821fbcad ML	46	#define MAX_ANALOG_PROBES 4
	47	#define MAX_DIGITAL_PROBES 16
	48
babab622	49	enum rigol_ds_series {
470140fc	50	RIGOL_VS5000,
babab622 ML	51	RIGOL_DS1000,
	52	RIGOL_DS1000Z,
	53	RIGOL_DS2000,
	54	RIGOL_DS4000,
	55	RIGOL_DS6000,
10afee13	56	AGILENT_DSO1000,
babab622 ML	57	};
	58
	59	enum rigol_protocol_flavor {
962af1a3	60	/* Used by DS1000 and VS5000 series */
babab622 ML	61	PROTOCOL_LEGACY,
	62	/* Used by DS2000, DS4000, DS6000, ... series */
	63	PROTOCOL_IEEE488_2,
	64	};
	65
	66	enum data_source {
	67	DATA_SOURCE_LIVE,
	68	DATA_SOURCE_MEMORY,
	69	DATA_SOURCE_SEGMENTED,
	70	};
e0b7d23c	71
bafd4890	72	struct rigol_ds_model {
10afee13	73	char *vendor;
bafd4890	74	char *name;
babab622 ML	75	enum rigol_ds_series series;
babab622 ML	76	enum rigol_protocol_flavor protocol;
bafd4890 ML	77	uint64_t min_timebase[2];
	78	uint64_t max_timebase[2];
	79	uint64_t min_vdiv[2];
821fbcad	80	unsigned int analog_channels;
bafd4890	81	bool has_digital;
babab622 ML	82	int num_horizontal_divs;
	83	};
	84
	85	enum wait_events {
	86	WAIT_NONE, /* Don't wait */
	87	WAIT_TRIGGER, /* Wait for trigger (only live capture) */
	88	WAIT_BLOCK, /* Wait for block data (only when reading sample mem) */
	89	WAIT_STOP, /* Wait for scope stopping (only single shots) */
bafd4890 ML	90	};
bafd4890 ML	91
f4816ac6 ML	92	/** Private, per-device-instance driver context. */
f4816ac6 ML	93	struct dev_context {
bafd4890 ML	94	/* Device model */
bafd4890 ML	95	const struct rigol_ds_model *model;
8dd0b290	96	enum rigol_protocol_flavor protocol;
bafd4890 ML	97
	98	/* Device properties */
	99	const uint64_t (*timebases)[2];
	100	uint64_t num_timebases;
	101	const uint64_t (*vdivs)[2];
	102	uint64_t num_vdivs;
6bb192bc	103
3d3a601e	104	/* Probe groups */
821fbcad	105	struct sr_probe_group analog_groups[MAX_ANALOG_PROBES];
3d3a601e ML	106	struct sr_probe_group digital_group;
3d3a601e ML	107
254dd102	108	/* Acquisition settings */
6bb192bc ML	109	GSList *enabled_analog_probes;
6bb192bc ML	110	GSList *enabled_digital_probes;
e0b7d23c	111	uint64_t limit_frames;
f4816ac6	112	void *cb_data;
babab622 ML	113	enum data_source data_source;
babab622 ML	114	uint64_t analog_frame_size;
d22250a9	115	uint64_t digital_frame_size;
f4816ac6	116
254dd102	117	/* Device settings */
821fbcad ML	118	gboolean analog_channels[MAX_ANALOG_PROBES];
821fbcad ML	119	gboolean digital_channels[MAX_DIGITAL_PROBES];
04e8e01e	120	gboolean la_enabled;
254dd102	121	float timebase;
821fbcad ML	122	float vdiv[MAX_ANALOG_PROBES];
	123	int vert_reference[MAX_ANALOG_PROBES];
	124	float vert_offset[MAX_ANALOG_PROBES];
254dd102 BV	125	char *trigger_source;
	126	float horiz_triggerpos;
	127	char *trigger_slope;
821fbcad	128	char *coupling[MAX_ANALOG_PROBES];
254dd102 BV	129
254dd102 BV	130	/* Operational state */
0d87bd93 ML	131
0d87bd93 ML	132	/* Number of frames received in total. */
254dd102	133	uint64_t num_frames;
821fbcad ML	134	/* GSList entry for the current channel. */
821fbcad ML	135	GSList *channel_entry;
f76c24f6 ML	136	/* Number of bytes received for current channel. */
f76c24f6 ML	137	uint64_t num_channel_bytes;
bafd4890 ML	138	/* Number of bytes in current data block, if 0 block header expected */
	139	uint64_t num_block_bytes;
	140	/* Number of data block bytes already read */
	141	uint64_t num_block_read;
babab622 ML	142	/* What to wait for in _receive /
	143	enum wait_events wait_event;
	144	/* Trigger/block copying/stop waiting status */
	145	int wait_status;
	146	/* Acq buffers used for reading from the scope and sending data to app */
	147	unsigned char *buffer;
	148	float *data;
f4816ac6 ML	149	};
f4816ac6 ML	150
38354d9d	151	SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst sdi, const char format, ...);
babab622	152	SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
677f85d0	153	SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
3086efdd	154	SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
3086efdd	155	SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
e0b7d23c	156
f4816ac6	157	#endif