[libsigrok.git] / hardware / rigol-ds / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H

#include <stdint.h>
#include <stdbool.h>
#include "libsigrok.h"
#include "libsigrok-internal.h"

#define LOG_PREFIX "rigol-ds"

#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
/* Needs to be made configurable later */
#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000
#define DIGITAL_WAVEFORM_SIZE 1210
/* Size of acquisition buffers */
#define ACQ_BUFFER_SIZE 32768

enum rigol_ds_series {
	RIGOL_DS1000,
	RIGOL_DS1000Z,
	RIGOL_DS2000,
	RIGOL_DS4000,
	RIGOL_DS6000,
	RIGOL_VS5000,
	AGILENT_DSO1000,
};

enum rigol_protocol_flavor {
	/* Used by DS1000 and VS5000 series */
	PROTOCOL_LEGACY,
	/* Used by DS2000, DS4000, DS6000, ... series */
	PROTOCOL_IEEE488_2,
};

enum data_source {
	DATA_SOURCE_LIVE,
	DATA_SOURCE_MEMORY,
	DATA_SOURCE_SEGMENTED,
};

struct rigol_ds_model {
	char *vendor;
	char *name;
	enum rigol_ds_series series;
	enum rigol_protocol_flavor protocol;
	uint64_t min_timebase[2];
	uint64_t max_timebase[2];
	uint64_t min_vdiv[2];
	bool has_digital;
	int num_horizontal_divs;
};

enum wait_events {
	WAIT_NONE,    /* Don't wait */
	WAIT_TRIGGER, /* Wait for trigger (only live capture) */
	WAIT_BLOCK,   /* Wait for block data (only when reading sample mem) */
	WAIT_STOP,    /* Wait for scope stopping (only single shots) */
};

/** Private, per-device-instance driver context. */
struct dev_context {
	/* Device model */
	const struct rigol_ds_model *model;

	/* Device properties */
	const uint64_t (*timebases)[2];
	uint64_t num_timebases;
	const uint64_t (*vdivs)[2];
	uint64_t num_vdivs;

	/* Probe groups */
	struct sr_probe_group analog_groups[2];
	struct sr_probe_group digital_group;

	/* Acquisition settings */
	GSList *enabled_analog_probes;
	GSList *enabled_digital_probes;
	uint64_t limit_frames;
	void *cb_data;
	enum data_source data_source;
	uint64_t analog_frame_size;

	/* Device settings */
	gboolean analog_channels[2];
	gboolean digital_channels[16];
	float timebase;
	float vdiv[2];
	int vert_reference[2];
	float vert_offset[2];
	char *trigger_source;
	float horiz_triggerpos;
	char *trigger_slope;
	char *coupling[2];

	/* Operational state */

	/* Number of frames received in total. */
	uint64_t num_frames;
	/* The channel we are currently receiving data for. */
	struct sr_probe *channel;
	/* Number of samples received in current frame. */
	uint64_t num_frame_samples;
	/* Number of bytes in current data block, if 0 block header expected */
	uint64_t num_block_bytes;
	/* Number of data block bytes already read */
	uint64_t num_block_read;
	/* What to wait for in *_receive */
	enum wait_events wait_event;
	/* Trigger/block copying/stop waiting status */
	int wait_status;
	/* Acq buffers used for reading from the scope and sending data to app */
	unsigned char *buffer;
	float *data;
};

SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);

#endif
Commit	Line	Data
f4816ac6 ML	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9	5	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6 ML	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, either version 3 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	19	*/
	20
3086efdd ML	21	#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
3086efdd ML	22	#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
f4816ac6 ML	23
f4816ac6 ML	24	#include <stdint.h>
bafd4890	25	#include <stdbool.h>
f4816ac6 ML	26	#include "libsigrok.h"
	27	#include "libsigrok-internal.h"
	28
3544f848	29	#define LOG_PREFIX "rigol-ds"
f4816ac6	30
babab622 ML	31	#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
babab622 ML	32	#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
962af1a3	33	#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
babab622 ML	34	/* Needs to be made configurable later */
	35	#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
	36	#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000
6bb192bc	37	#define DIGITAL_WAVEFORM_SIZE 1210
babab622 ML	38	/* Size of acquisition buffers */
	39	#define ACQ_BUFFER_SIZE 32768
	40
	41	enum rigol_ds_series {
	42	RIGOL_DS1000,
	43	RIGOL_DS1000Z,
	44	RIGOL_DS2000,
	45	RIGOL_DS4000,
	46	RIGOL_DS6000,
962af1a3	47	RIGOL_VS5000,
10afee13	48	AGILENT_DSO1000,
babab622 ML	49	};
	50
	51	enum rigol_protocol_flavor {
962af1a3	52	/* Used by DS1000 and VS5000 series */
babab622 ML	53	PROTOCOL_LEGACY,
	54	/* Used by DS2000, DS4000, DS6000, ... series */
	55	PROTOCOL_IEEE488_2,
	56	};
	57
	58	enum data_source {
	59	DATA_SOURCE_LIVE,
	60	DATA_SOURCE_MEMORY,
	61	DATA_SOURCE_SEGMENTED,
	62	};
e0b7d23c	63
bafd4890	64	struct rigol_ds_model {
10afee13	65	char *vendor;
bafd4890	66	char *name;
babab622 ML	67	enum rigol_ds_series series;
babab622 ML	68	enum rigol_protocol_flavor protocol;
bafd4890 ML	69	uint64_t min_timebase[2];
	70	uint64_t max_timebase[2];
	71	uint64_t min_vdiv[2];
	72	bool has_digital;
babab622 ML	73	int num_horizontal_divs;
	74	};
	75
	76	enum wait_events {
	77	WAIT_NONE, /* Don't wait */
	78	WAIT_TRIGGER, /* Wait for trigger (only live capture) */
	79	WAIT_BLOCK, /* Wait for block data (only when reading sample mem) */
	80	WAIT_STOP, /* Wait for scope stopping (only single shots) */
bafd4890 ML	81	};
bafd4890 ML	82
f4816ac6 ML	83	/** Private, per-device-instance driver context. */
f4816ac6 ML	84	struct dev_context {
bafd4890 ML	85	/* Device model */
	86	const struct rigol_ds_model *model;
	87
	88	/* Device properties */
	89	const uint64_t (*timebases)[2];
	90	uint64_t num_timebases;
	91	const uint64_t (*vdivs)[2];
	92	uint64_t num_vdivs;
6bb192bc	93
3d3a601e ML	94	/* Probe groups */
	95	struct sr_probe_group analog_groups[2];
	96	struct sr_probe_group digital_group;
	97
254dd102	98	/* Acquisition settings */
6bb192bc ML	99	GSList *enabled_analog_probes;
6bb192bc ML	100	GSList *enabled_digital_probes;
e0b7d23c	101	uint64_t limit_frames;
f4816ac6	102	void *cb_data;
babab622 ML	103	enum data_source data_source;
babab622 ML	104	uint64_t analog_frame_size;
f4816ac6	105
254dd102	106	/* Device settings */
6bb192bc ML	107	gboolean analog_channels[2];
6bb192bc ML	108	gboolean digital_channels[16];
254dd102 BV	109	float timebase;
254dd102 BV	110	float vdiv[2];
bafd4890	111	int vert_reference[2];
254dd102 BV	112	float vert_offset[2];
	113	char *trigger_source;
	114	float horiz_triggerpos;
	115	char *trigger_slope;
	116	char *coupling[2];
	117
	118	/* Operational state */
0d87bd93 ML	119
0d87bd93 ML	120	/* Number of frames received in total. */
254dd102	121	uint64_t num_frames;
0d87bd93 ML	122	/* The channel we are currently receiving data for. */
	123	struct sr_probe *channel;
	124	/* Number of samples received in current frame. */
	125	uint64_t num_frame_samples;
bafd4890 ML	126	/* Number of bytes in current data block, if 0 block header expected */
	127	uint64_t num_block_bytes;
	128	/* Number of data block bytes already read */
	129	uint64_t num_block_read;
babab622 ML	130	/* What to wait for in _receive /
	131	enum wait_events wait_event;
	132	/* Trigger/block copying/stop waiting status */
	133	int wait_status;
	134	/* Acq buffers used for reading from the scope and sending data to app */
	135	unsigned char *buffer;
	136	float *data;
f4816ac6 ML	137	};
f4816ac6 ML	138
babab622	139	SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
677f85d0	140	SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
3086efdd	141	SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
3086efdd	142	SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
e0b7d23c	143
f4816ac6	144	#endif