]> sigrok.org Git - libsigrok.git/blame - hardware/rigol-ds/protocol.h
Replace 'probe' with 'channel' in most places.
[libsigrok.git] / hardware / rigol-ds / protocol.h
CommitLineData
f4816ac6
ML
1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
88e429c9 5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
f4816ac6
ML
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
3086efdd
ML
21#ifndef LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
22#define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
f4816ac6
ML
23
24#include <stdint.h>
bafd4890 25#include <stdbool.h>
f4816ac6
ML
26#include "libsigrok.h"
27#include "libsigrok-internal.h"
28
3544f848 29#define LOG_PREFIX "rigol-ds"
f4816ac6 30
babab622
ML
31/* Size of acquisition buffers */
32#define ACQ_BUFFER_SIZE 32768
33
821fbcad
ML
34#define MAX_ANALOG_PROBES 4
35#define MAX_DIGITAL_PROBES 16
36
569d4dbd
ML
37enum protocol_version {
38 PROTOCOL_V1, /* VS5000 */
39 PROTOCOL_V2, /* DS1000 */
40 PROTOCOL_V3, /* DS2000, DSO1000 */
babab622
ML
41};
42
569d4dbd
ML
43enum data_format {
44 /* Used by DS1000 versions up to 2.02, and VS5000 series */
45 FORMAT_RAW,
46 /* Used by DS1000 versions from 2.04 onwards and all later series */
47 FORMAT_IEEE488_2,
babab622
ML
48};
49
50enum data_source {
51 DATA_SOURCE_LIVE,
52 DATA_SOURCE_MEMORY,
53 DATA_SOURCE_SEGMENTED,
54};
e0b7d23c 55
569d4dbd
ML
56struct rigol_ds_vendor {
57 const char *name;
58 const char *full_name;
59};
60
61struct rigol_ds_series {
62 const struct rigol_ds_vendor *vendor;
63 const char *name;
64 enum protocol_version protocol;
65 enum data_format format;
bafd4890
ML
66 uint64_t max_timebase[2];
67 uint64_t min_vdiv[2];
569d4dbd
ML
68 int num_horizontal_divs;
69 int live_samples;
70 int buffer_samples;
71};
72
73struct rigol_ds_model {
74 const struct rigol_ds_series *series;
75 const char *name;
76 uint64_t min_timebase[2];
821fbcad 77 unsigned int analog_channels;
bafd4890 78 bool has_digital;
babab622
ML
79};
80
81enum wait_events {
82 WAIT_NONE, /* Don't wait */
83 WAIT_TRIGGER, /* Wait for trigger (only live capture) */
84 WAIT_BLOCK, /* Wait for block data (only when reading sample mem) */
85 WAIT_STOP, /* Wait for scope stopping (only single shots) */
bafd4890
ML
86};
87
f4816ac6
ML
88/** Private, per-device-instance driver context. */
89struct dev_context {
bafd4890
ML
90 /* Device model */
91 const struct rigol_ds_model *model;
569d4dbd 92 enum data_format format;
bafd4890
ML
93
94 /* Device properties */
95 const uint64_t (*timebases)[2];
96 uint64_t num_timebases;
97 const uint64_t (*vdivs)[2];
98 uint64_t num_vdivs;
6bb192bc 99
660e398f
UH
100 /* Channel groups */
101 struct sr_channel_group analog_groups[MAX_ANALOG_PROBES];
102 struct sr_channel_group digital_group;
3d3a601e 103
254dd102 104 /* Acquisition settings */
ba7dd8bb
UH
105 GSList *enabled_analog_channels;
106 GSList *enabled_digital_channels;
e0b7d23c 107 uint64_t limit_frames;
f4816ac6 108 void *cb_data;
babab622
ML
109 enum data_source data_source;
110 uint64_t analog_frame_size;
d22250a9 111 uint64_t digital_frame_size;
f4816ac6 112
254dd102 113 /* Device settings */
821fbcad
ML
114 gboolean analog_channels[MAX_ANALOG_PROBES];
115 gboolean digital_channels[MAX_DIGITAL_PROBES];
04e8e01e 116 gboolean la_enabled;
254dd102 117 float timebase;
821fbcad
ML
118 float vdiv[MAX_ANALOG_PROBES];
119 int vert_reference[MAX_ANALOG_PROBES];
120 float vert_offset[MAX_ANALOG_PROBES];
254dd102
BV
121 char *trigger_source;
122 float horiz_triggerpos;
123 char *trigger_slope;
821fbcad 124 char *coupling[MAX_ANALOG_PROBES];
254dd102
BV
125
126 /* Operational state */
0d87bd93
ML
127
128 /* Number of frames received in total. */
254dd102 129 uint64_t num_frames;
821fbcad
ML
130 /* GSList entry for the current channel. */
131 GSList *channel_entry;
f76c24f6
ML
132 /* Number of bytes received for current channel. */
133 uint64_t num_channel_bytes;
aff00e40
ML
134 /* Number of bytes of block header read */
135 uint64_t num_header_bytes;
bafd4890
ML
136 /* Number of bytes in current data block, if 0 block header expected */
137 uint64_t num_block_bytes;
138 /* Number of data block bytes already read */
139 uint64_t num_block_read;
babab622
ML
140 /* What to wait for in *_receive */
141 enum wait_events wait_event;
142 /* Trigger/block copying/stop waiting status */
143 int wait_status;
144 /* Acq buffers used for reading from the scope and sending data to app */
145 unsigned char *buffer;
146 float *data;
f4816ac6
ML
147};
148
38354d9d 149SR_PRIV int rigol_ds_config_set(const struct sr_dev_inst *sdi, const char *format, ...);
babab622 150SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
677f85d0 151SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi);
3086efdd 152SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
3086efdd 153SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
e0b7d23c 154
f4816ac6 155#endif