input/vcd: fix a divide by zero bug in the analog-only case

[libsigrok.git] / src / input / binary.c

diff --git a/src/input/binary.c b/src/input/binary.c
index 995c47d78fe5fcaf32826d7c771a2a3087d4f28d..631d6d38c10d85d8fa620d354da60305873e9392 100644 (file)
--- a/src/input/binary.c
+++ b/src/input/binary.c
@@ -69,9 +69,7 @@ static int init(struct sr_input *in, GHashTable *options)
 static int process_buffer(struct sr_input *in)
 {
        struct sr_datafeed_packet packet;
-       struct sr_datafeed_meta meta;
        struct sr_datafeed_logic logic;
-       struct sr_config *src;
        struct context *inc;
        gsize chunk_size, i;
        int chunk;
@@ -81,13 +79,8 @@ static int process_buffer(struct sr_input *in)
                std_session_send_df_header(in->sdi);
 
                if (inc->samplerate) {
-                       packet.type = SR_DF_META;
-                       packet.payload = &meta;
-                       src = sr_config_new(SR_CONF_SAMPLERATE, g_variant_new_uint64(inc->samplerate));
-                       meta.config = g_slist_append(NULL, src);
-                       sr_session_send(in->sdi, &packet);
-                       g_slist_free(meta.config);
-                       sr_config_free(src);
+                       (void)sr_session_send_meta(in->sdi, SR_CONF_SAMPLERATE,
+                               g_variant_new_uint64(inc->samplerate));
                }
 
                inc->started = TRUE;
@@ -103,6 +96,8 @@ static int process_buffer(struct sr_input *in)
        for (i = 0; i < chunk_size; i += chunk) {
                logic.data = in->buf->str + i;
                chunk = MIN(CHUNK_SIZE, chunk_size - i);
+               chunk /= logic.unitsize;
+               chunk *= logic.unitsize;
                logic.length = chunk;
                sr_session_send(in->sdi, &packet);
        }
@@ -174,7 +169,7 @@ static const struct sr_option *get_options(void)
 SR_PRIV struct sr_input_module input_binary = {
        .id = "binary",
        .name = "Binary",
-       .desc = "Raw binary",
+       .desc = "Raw binary logic data",
        .exts = NULL,
        .options = get_options,
        .init = init,