Add SPI flash example exports from various vendor software.

[sigrok-dumps.git] / spi / nrf24l01 / gen-testfiles.py

diff --git a/spi/nrf24l01/gen-testfiles.py b/spi/nrf24l01/gen-testfiles.py
index 5b14e438a6b7a5fd5533b57d5f9a4f4934f7deff..0e19603de7c05fd9a244ec3dc7054629e69c2ab5 100755 (executable)
--- a/spi/nrf24l01/gen-testfiles.py
+++ b/spi/nrf24l01/gen-testfiles.py
@@ -40,8 +40,8 @@ class SPI:
 
     def add(self, mosi, miso):
         for _ in range(8):
-            mo = mosi & 0x80
-            mi = miso & 0x80
+            mo = (mosi & 0x80) >> 7
+            mi = (miso & 0x80) >> 7
             mosi <<= 1
             miso <<= 1
             self._data.append([0, 0, mo, mi])
@@ -57,7 +57,7 @@ class SPI:
                 w.writerows(self._data)
 
             fn = '{}.sr'.format(self._filename)
-            I = 'csv:header=true:samplerate=1k'
+            I = 'csv:header=true:samplerate=1000'
             subprocess.check_call(['sigrok-cli', '-I', I, '-i', tf.name, '-o', fn])
 
 spi = SPI('nrf24l01-test-activate')
@@ -187,3 +187,12 @@ for i in range(5):
     spi.add(i, 0x00)
 spi.CShigh()
 spi.write()
+
+spi = SPI('nrf24l01-test-incomplete-cmd')
+spi.add(0xff, 0xff) # some bytes from a command
+spi.add(0xff, 0xff) # that was captured incompletely
+spi.CShigh()
+spi.CSlow()
+spi.add(0xe1, 0x00) # FLUSH_TX
+spi.CShigh()
+spi.write()