ssi32: rename reset() helper method

[libsigrokdecode.git] / decoders / parallel / pd.py

diff --git a/decoders/parallel/pd.py b/decoders/parallel/pd.py
index 34676019211c444d958155498bcad5cf06d4d023..c8ac2b0f74d2211b86f9a3b88c8f031a23e91223 100644 (file)
--- a/decoders/parallel/pd.py
+++ b/decoders/parallel/pd.py
@@ -14,8 +14,7 @@
 ## GNU General Public License for more details.
 ##
 ## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+## along with this program; if not, see <http://www.gnu.org/licenses/>.
 ##
 
 import sigrokdecode as srd
@@ -100,9 +99,6 @@ class Decoder(srd.Decoder):
         self.out_python = self.register(srd.OUTPUT_PYTHON)
         self.out_ann = self.register(srd.OUTPUT_ANN)
 
-        # Assume that the initial pin state of all pins is logic 1.
-        self.initial_pins = [1] * (NUM_CHANNELS + 1)
-
     def putpb(self, data):
         self.put(self.ss_item, self.es_item, self.out_python, data)
 
@@ -178,7 +174,7 @@ class Decoder(srd.Decoder):
                 if self.has_channel(i):
                     conds.append({i: 'e'})
             while True:
-                self.handle_bits(self.wait(conds[:])[1:])
+                self.handle_bits(self.wait(conds)[1:])
         else:
             # Sample on the rising or falling CLK edge (depends on config).
             while True: