2 ## This file is part of the libsigrokdecode project.
4 ## Copyright (C) 2013-2016 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 import sigrokdecode as srd
30 - 'ITEM', [<item>, <itembitsize>]
31 - 'WORD', [<word>, <wordbitsize>, <worditemcount>]
34 - A single item (a number). It can be of arbitrary size. The max. number
35 of bits in this item is specified in <itembitsize>.
38 - The size of an item (in bits). For a 4-bit parallel bus this is 4,
39 for a 16-bit parallel bus this is 16, and so on.
42 - A single word (a number). It can be of arbitrary size. The max. number
43 of bits in this word is specified in <wordbitsize>. The (exact) number
44 of items in this word is specified in <worditemcount>.
47 - The size of a word (in bits). For a 2-item word with 8-bit items
48 <wordbitsize> is 16, for a 3-item word with 4-bit items <wordbitsize>
52 - The size of a word (in number of items). For a 4-item word (no matter
53 how many bits each item consists of) <worditemcount> is 4, for a 7-item
54 word <worditemcount> is 7, and so on.
57 def channel_list(num_channels):
58 l = [{'id': 'clk', 'name': 'CLK', 'desc': 'Clock line'}]
59 for i in range(num_channels):
60 d = {'id': 'd%d' % i, 'name': 'D%d' % i, 'desc': 'Data line %d' % i}
64 class ChannelError(Exception):
69 class Decoder(srd.Decoder):
73 longname = 'Parallel sync bus'
74 desc = 'Generic parallel synchronous bus.'
77 outputs = ['parallel']
78 optional_channels = channel_list(NUM_CHANNELS)
80 {'id': 'clock_edge', 'desc': 'Clock edge to sample on',
81 'default': 'rising', 'values': ('rising', 'falling')},
82 {'id': 'wordsize', 'desc': 'Data wordsize', 'default': 1},
83 {'id': 'endianness', 'desc': 'Data endianness',
84 'default': 'little', 'values': ('little', 'big')},
94 self.saved_item = None
95 self.ss_item = self.es_item = None
100 self.out_python = self.register(srd.OUTPUT_PYTHON)
101 self.out_ann = self.register(srd.OUTPUT_ANN)
103 # Assume that the initial pin state of all pins is logic 1.
104 self.initial_pins = [1] * (NUM_CHANNELS + 1)
106 def putpb(self, data):
107 self.put(self.ss_item, self.es_item, self.out_python, data)
109 def putb(self, data):
110 self.put(self.ss_item, self.es_item, self.out_ann, data)
112 def putpw(self, data):
113 self.put(self.ss_word, self.es_word, self.out_python, data)
115 def putw(self, data):
116 self.put(self.ss_word, self.es_word, self.out_ann, data)
118 def handle_bits(self, datapins):
119 # If this is the first item in a word, save its sample number.
120 if self.itemcount == 0:
121 self.ss_word = self.samplenum
123 # Get the bits for this item.
124 item, used_pins = 0, datapins.count(1) + datapins.count(0)
125 for i in range(used_pins):
126 item |= datapins[i] << i
128 self.items.append(item)
132 # Save the start sample and item for later (no output yet).
133 self.ss_item = self.samplenum
135 self.saved_item = item
137 # Output the saved item (from the last CLK edge to the current).
138 self.es_item = self.samplenum
139 self.putpb(['ITEM', self.saved_item])
140 self.putb([0, ['%X' % self.saved_item]])
141 self.ss_item = self.samplenum
142 self.saved_item = item
144 endian, ws = self.options['endianness'], self.options['wordsize']
146 # Get as many items as the configured wordsize says.
147 if self.itemcount < ws:
150 # Output annotations/python for a word (a collection of items).
153 if endian == 'little':
154 word |= self.items[i] << ((ws - 1 - i) * used_pins)
155 elif endian == 'big':
156 word |= self.items[i] << (i * used_pins)
158 self.es_word = self.samplenum
159 # self.putpw(['WORD', word])
160 # self.putw([1, ['%X' % word]])
161 self.ss_word = self.samplenum
163 self.itemcount, self.items = 0, []
166 for i in range(len(self.optional_channels)):
167 if self.has_channel(i):
168 self.num_channels += 1
170 if self.num_channels == 0:
171 raise ChannelError('At least one channel has to be supplied.')
173 if not self.has_channel(0):
174 # CLK was not supplied, sample on ANY edge of ANY of the pins
175 # (but only of those pins that were actually supplied).
177 for i in range(1, len(self.optional_channels)):
178 if self.has_channel(i):
179 conds.append({i: 'e'})
181 self.handle_bits(self.wait(conds[:])[1:])
183 # Sample on the rising or falling CLK edge (depends on config).
185 pins = self.wait({0: self.options['clock_edge'][0]})
186 self.handle_bits(pins[1:])