+#define CLKSEL_CLKSEL8 BIT(0)
+#define CLKSEL_PINMASK BITS_MASK(4)
+#define CLKSEL_RISING BIT(4)
+#define CLKSEL_FALLING BIT(5)
+
+#define TRGSEL_SELINC_MASK BITS_MASK(2)
+#define TRGSEL_SELINC_SHIFT 0
+#define TRGSEL_SELRES_MASK BITS_MASK(2)
+#define TRGSEL_SELRES_SHIFT 2
+#define TRGSEL_SELA_MASK BITS_MASK(2)
+#define TRGSEL_SELA_SHIFT 4
+#define TRGSEL_SELB_MASK BITS_MASK(2)
+#define TRGSEL_SELB_SHIFT 6
+#define TRGSEL_SELC_MASK BITS_MASK(2)
+#define TRGSEL_SELC_SHIFT 8
+#define TRGSEL_SELPRESC_MASK BITS_MASK(4)
+#define TRGSEL_SELPRESC_SHIFT 12
+
+enum trgsel_selcode_t {
+ TRGSEL_SELCODE_LEVEL = 0,
+ TRGSEL_SELCODE_FALL = 1,
+ TRGSEL_SELCODE_RISE = 2,
+ TRGSEL_SELCODE_EVENT = 3,
+ TRGSEL_SELCODE_NEVER = 3,
+};
+
+#define TRGSEL2_PINS_MASK BITS_MASK(3)
+#define TRGSEL2_PINPOL_RISE BIT(3)
+#define TRGSEL2_LUT_ADDR_MASK BITS_MASK(4)
+#define TRGSEL2_LUT_WRITE BIT(4)
+#define TRGSEL2_RESET BIT(5)
+#define TRGSEL2_LEDSEL0 BIT(6)
+#define TRGSEL2_LEDSEL1 BIT(7)