1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is a capture of data output to a MAX6921 high voltage shift register that
6 was outputting data for a VFD clock.
8 The signals were grabbed on a 28-pin PLCC chip (MAX6921) which outputs 20-bits
9 that is crafted as a design for VFD applications.
14 The logic analyzer used was Open Bench Logic Sniffer (at 10Mhz):
17 --------------------------
21 3 BLANK (PWM Brightness Control)
26 The data contain various values for the VFD being driven, as reference at the
27 prototype Nixie Cape for the Beaglebone.
30 --------------------------
43 ---------------------------
57 * BeagleBoard.org Vendor Tree (https://github.com/beagleboard/kernel)
58 * Beagle Nixie GitHub (https://github.com/mranostay/beagle-nixie/)
59 * MAX6921 Datasheet (http://datasheets.maximintegrated.com/en/ds/MAX6921-MAX6931.pdf)
61 The sigrok command line used was:
63 sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=10mhz \
64 -samples=24576 -p 0=LOAD,1=DATA,2=CLK,3=BLANK -o max6921_data_10mhz.sr