2 * This file is part of the libsigrok project.
4 * Copyright (C) 2019 Vitaliy Vorobyov
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef LIBSIGROK_HARDWARE_SYSCLK_SLA5032_PROTOCOL_H
21 #define LIBSIGROK_HARDWARE_SYSCLK_SLA5032_PROTOCOL_H
26 #include <libsigrok/libsigrok.h>
27 #include <libsigrok-internal.h>
29 #define LOG_PREFIX "sysclk-sla5032"
31 /* Maximum configurable sample count limit. */
32 #define MAX_LIMIT_SAMPLES (64 * 1024 * 1024)
33 #define MIN_LIMIT_SAMPLES 512
35 /* USB vendor and product IDs. */
37 USB_VID_SYSCLK = 0x2961,
38 USB_PID_SLA5032 = 0x66B0,
41 /* USB device characteristics. */
45 USB_CMD_TIMEOUT_MS = 5000,
46 USB_REPLY_TIMEOUT_MS = 500000,
47 USB_DATA_TIMEOUT_MS = 2000,
50 /* USB device end points. */
52 EP_COMMAND = 4 | LIBUSB_ENDPOINT_OUT,
53 EP_REPLY = 8 | LIBUSB_ENDPOINT_IN,
54 EP_DATA = 6 | LIBUSB_ENDPOINT_IN,
58 /* Common indicator for no or unknown FPGA config. */
64 /** Acquisition protocol states. */
69 /* device command states */
74 /* command followed by response */
75 STATE_EXPECT_RESPONSE = 1 << 3,
76 STATE_STATUS_REQUEST = STATE_EXPECT_RESPONSE,
81 /** SLA5032 protocol command ID codes. */
83 CMD_INIT_FW_UPLOAD = 1,
84 CMD_UPLOAD_FW_CHUNK = 2,
92 uint64_t samplerate; /* requested samplerate */
93 uint64_t limit_samples; /* requested capture length (samples) */
94 uint64_t capture_ratio;
96 uint64_t channel_mask; /* bit mask of enabled channels */
97 uint64_t trigger_mask; /* trigger enable mask */
98 uint64_t trigger_edge_mask; /* trigger type mask */
99 uint64_t trigger_values; /* trigger level/slope bits */
101 struct soft_trigger_logic *stl;
102 gboolean trigger_fired;
104 int active_fpga_config; /* FPGA configuration index */
106 enum protocol_state state; /* async protocol state */
109 SR_PRIV int sla5032_start_acquisition(const struct sr_dev_inst *sdi);
110 SR_PRIV int sla5032_apply_fpga_config(const struct sr_dev_inst *sdi);