2 * This file is part of the libsigrok project.
4 * Copyright (C) 2018 James Churchill <pelrun@gmail.com>
5 * Copyright (C) 2019 Frank Stettner <frank-stettner@gmx.net>
6 * Copyright (C) 2021 Gerhard Sittig <gerhard.sittig@gmx.net>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
28 enum rdtech_dps_register {
29 REG_DPS_USET = 0x00, /* Mirror of 0x50 */
30 REG_DPS_ISET = 0x01, /* Mirror of 0x51 */
36 REG_DPS_PROTECT = 0x07,
38 REG_DPS_ENABLE = 0x09,
39 REG_DPS_BACKLIGHT = 0x0A, /* Mirror of 0x55 */
41 REG_DPS_VERSION = 0x0C,
43 REG_DPS_PRESET = 0x23, /* Loads a preset into preset 0. */
46 * Add (preset * 0x10) to each of the following, for preset 1-9.
47 * Preset 0 regs below are the active output settings.
51 PRE_DPS_OVPSET = 0x52,
52 PRE_DPS_OCPSET = 0x53,
53 PRE_DPS_OPPSET = 0x54,
54 PRE_DPS_BACKLIGHT = 0x55,
55 PRE_DPS_DISABLE = 0x56, /* Disable output if 0 is copied here from a preset (1 is no change). */
56 PRE_DPS_BOOT = 0x57, /* Enable output at boot if 1. */
58 #define PRE_DPS_STRIDE 0x10
60 enum rdtech_dps_protect_state {
67 enum rdtech_dps_regulation_mode {
72 enum rdtech_rd_register {
73 REG_RD_MODEL = 0, /* u16 */
74 REG_RD_SERIAL = 1, /* u32 */
75 REG_RD_FIRMWARE = 3, /* u16 */
76 REG_RD_TEMP_INT = 4, /* 2x u16 */
77 REG_RD_TEMP_INT_F = 6, /* 2x u16 */
78 REG_RD_VOLT_TGT = 8, /* u16 */
79 REG_RD_CURR_LIM = 9, /* u16 */
80 REG_RD_VOLTAGE = 10, /* u16 */
81 REG_RD_CURRENT = 11, /* u16 */
82 REG_RD_ENERGY = 12, /* u16 */
83 REG_RD_POWER = 13, /* u16 */
84 REG_RD_VOLT_IN = 14, /* u16 */
85 REG_RD_PROTECT = 16, /* u16 */
86 REG_RD_REGULATION = 17, /* u16 */
87 REG_RD_ENABLE = 18, /* u16 */
89 * Battery at 32 == 0x20 pp:
90 * Mode, voltage, temperature, capacity, energy.
93 * Date/time at 48 == 0x30 pp:
94 * Year, month, day, hour, minute, second.
96 /* Backlight at 72 == 0x48. */
97 REG_RD_OVP_THR = 82, /* 0x52 */
98 REG_RD_OCP_THR = 83, /* 0x53 */
99 /* One "live" slot and 9 "memory" positions. */
100 REG_RD_START_MEM = 84, /* 0x54 */
103 /* Retries failed modbus read attempts for improved reliability. */
104 static int rdtech_dps_read_holding_registers(struct sr_modbus_dev_inst *modbus,
105 int address, int nb_registers, uint16_t *registers)
112 ret = sr_modbus_read_holding_registers(modbus,
113 address, nb_registers, registers);
121 /* Set one 16bit register. LE format for DPS devices. */
122 static int rdtech_dps_set_reg(const struct sr_dev_inst *sdi,
123 uint16_t address, uint16_t value)
125 struct dev_context *devc;
126 struct sr_modbus_dev_inst *modbus;
127 uint16_t registers[1];
134 wrptr = (void *)registers;
135 write_u16le(wrptr, value);
137 g_mutex_lock(&devc->rw_mutex);
138 ret = sr_modbus_write_multiple_registers(modbus, address,
139 ARRAY_SIZE(registers), registers);
140 g_mutex_unlock(&devc->rw_mutex);
145 /* Set one 16bit register. BE format for RD devices. */
146 static int rdtech_rd_set_reg(const struct sr_dev_inst *sdi,
147 uint16_t address, uint16_t value)
149 struct dev_context *devc;
150 struct sr_modbus_dev_inst *modbus;
151 uint16_t registers[1];
158 wrptr = (void *)registers;
159 write_u16be(wrptr, value);
161 g_mutex_lock(&devc->rw_mutex);
162 ret = sr_modbus_write_multiple_registers(modbus, address,
163 ARRAY_SIZE(registers), registers);
164 g_mutex_unlock(&devc->rw_mutex);
169 /* Get DPS model number and firmware version from a connected device. */
170 SR_PRIV int rdtech_dps_get_model_version(struct sr_modbus_dev_inst *modbus,
171 enum rdtech_dps_model_type model_type,
172 uint16_t *model, uint16_t *version, uint32_t *serno)
174 uint16_t registers[4];
176 const uint8_t *rdptr;
179 * No mutex here because when the routine executes then the
180 * device instance was not created yet (probe phase).
182 switch (model_type) {
184 /* Get the MODEL and VERSION registers. */
185 ret = rdtech_dps_read_holding_registers(modbus,
186 REG_DPS_MODEL, 2, registers);
189 rdptr = (void *)registers;
190 *model = read_u16le_inc(&rdptr);
191 *version = read_u16le_inc(&rdptr);
193 sr_info("RDTech DPS/DPH model: %u version: %u",
197 /* Get the MODEL, SERIAL, and FIRMWARE registers. */
198 ret = rdtech_dps_read_holding_registers(modbus,
199 REG_RD_MODEL, 4, registers);
202 rdptr = (void *)registers;
203 *model = read_u16be_inc(&rdptr) / 10;
204 *serno = read_u32be_inc(&rdptr);
205 *version = read_u16be_inc(&rdptr);
206 sr_info("RDTech RD model: %u version: %u, serno %u",
207 *model, *version, *serno);
210 sr_err("Unexpected RDTech PSU device type. Programming error?");
216 /* Send a measured value to the session feed. */
217 static int send_value(const struct sr_dev_inst *sdi,
218 struct sr_channel *ch, float value,
219 enum sr_mq mq, enum sr_mqflag mqflags,
220 enum sr_unit unit, int digits)
222 struct sr_datafeed_packet packet;
223 struct sr_datafeed_analog analog;
224 struct sr_analog_encoding encoding;
225 struct sr_analog_meaning meaning;
226 struct sr_analog_spec spec;
229 sr_analog_init(&analog, &encoding, &meaning, &spec, digits);
230 analog.meaning->channels = g_slist_append(NULL, ch);
231 analog.num_samples = 1;
232 analog.data = &value;
233 analog.meaning->mq = mq;
234 analog.meaning->mqflags = mqflags;
235 analog.meaning->unit = unit;
237 packet.type = SR_DF_ANALOG;
238 packet.payload = &analog;
239 ret = sr_session_send(sdi, &packet);
241 g_slist_free(analog.meaning->channels);
247 * Get the device's current state. Exhaustively, relentlessly.
248 * Concentrate all details of communication in the physical transport,
249 * register layout interpretation, and potential model dependency in
250 * this central spot, to simplify maintenance.
252 * TODO Optionally limit the transfer volume depending on caller's spec
253 * which detail level is desired? Is 10 registers each 16bits an issue
254 * when the UART bitrate is only 9600bps?
256 SR_PRIV int rdtech_dps_get_state(const struct sr_dev_inst *sdi,
257 struct rdtech_dps_state *state, enum rdtech_dps_state_context reason)
259 struct dev_context *devc;
260 struct sr_modbus_dev_inst *modbus;
261 gboolean get_config, get_init_state, get_curr_meas;
262 uint16_t registers[12];
264 const uint8_t *rdptr;
265 uint16_t uset_raw, iset_raw, uout_raw, iout_raw, power_raw;
266 uint16_t reg_val, reg_state, out_state, ovpset_raw, ocpset_raw;
267 gboolean is_lock, is_out_enabled, is_reg_cc;
268 gboolean uses_ovp, uses_ocp;
269 float volt_target, curr_limit;
270 float ovp_threshold, ocp_threshold;
271 float curr_voltage, curr_current, curr_power;
273 if (!sdi || !sdi->priv || !sdi->conn)
280 /* Determine the requested level of response detail. */
282 get_init_state = FALSE;
283 get_curr_meas = FALSE;
287 get_init_state = TRUE;
288 get_curr_meas = TRUE;
291 get_init_state = TRUE;
292 get_curr_meas = TRUE;
295 get_curr_meas = TRUE;
302 * TODO Make use of this information to reduce the transfer
303 * volume, especially on low bitrate serial connections. Though
304 * the device firmware's samplerate is probably more limiting
305 * than communication bandwidth is.
308 (void)get_init_state;
311 switch (devc->model->model_type) {
314 * Transfer a chunk of registers in a single call. It's
315 * unfortunate that the model dependency and the sparse
316 * register map force us to open code addresses, sizes,
317 * and the sequence of the registers and how to interpret
318 * their bit fields. But then this is not too unusual for
319 * a hardware specific device driver ...
321 g_mutex_lock(&devc->rw_mutex);
322 ret = rdtech_dps_read_holding_registers(modbus,
323 REG_DPS_USET, 10, registers);
324 g_mutex_unlock(&devc->rw_mutex);
328 /* Interpret the registers' values. */
329 rdptr = (const void *)registers;
330 uset_raw = read_u16le_inc(&rdptr);
331 volt_target = uset_raw / devc->voltage_multiplier;
332 iset_raw = read_u16le_inc(&rdptr);
333 curr_limit = iset_raw / devc->current_multiplier;
334 uout_raw = read_u16le_inc(&rdptr);
335 curr_voltage = uout_raw / devc->voltage_multiplier;
336 iout_raw = read_u16le_inc(&rdptr);
337 curr_current = iout_raw / devc->current_multiplier;
338 power_raw = read_u16le_inc(&rdptr);
339 curr_power = power_raw / 100.0f;
340 (void)read_u16le_inc(&rdptr); /* UIN */
341 reg_val = read_u16le_inc(&rdptr); /* LOCK */
342 is_lock = reg_val != 0;
343 reg_val = read_u16le_inc(&rdptr); /* PROTECT */
344 uses_ovp = reg_val == STATE_OVP;
345 uses_ocp = reg_val == STATE_OCP;
346 reg_state = read_u16le_inc(&rdptr); /* CV_CC */
347 is_reg_cc = reg_state == MODE_CC;
348 out_state = read_u16le_inc(&rdptr); /* ENABLE */
349 is_out_enabled = out_state != 0;
351 /* Transfer another chunk of registers in a single call. */
352 g_mutex_lock(&devc->rw_mutex);
353 ret = rdtech_dps_read_holding_registers(modbus,
354 PRE_DPS_OVPSET, 2, registers);
355 g_mutex_unlock(&devc->rw_mutex);
359 /* Interpret the second registers chunk's values. */
360 rdptr = (const void *)registers;
361 ovpset_raw = read_u16le_inc(&rdptr); /* PRE OVPSET */
362 ovp_threshold = ovpset_raw * devc->voltage_multiplier;
363 ocpset_raw = read_u16le_inc(&rdptr); /* PRE OCPSET */
364 ocp_threshold = ocpset_raw * devc->current_multiplier;
369 /* Retrieve a set of adjacent registers. */
370 g_mutex_lock(&devc->rw_mutex);
371 ret = rdtech_dps_read_holding_registers(modbus,
372 REG_RD_VOLT_TGT, 11, registers);
373 g_mutex_unlock(&devc->rw_mutex);
377 /* Interpret the registers' raw content. */
378 rdptr = (const void *)registers;
379 uset_raw = read_u16be_inc(&rdptr); /* USET */
380 volt_target = uset_raw / devc->voltage_multiplier;
381 iset_raw = read_u16be_inc(&rdptr); /* ISET */
382 curr_limit = iset_raw / devc->current_multiplier;
383 uout_raw = read_u16be_inc(&rdptr); /* UOUT */
384 curr_voltage = uout_raw / devc->voltage_multiplier;
385 iout_raw = read_u16be_inc(&rdptr); /* IOUT */
386 curr_current = iout_raw / devc->current_multiplier;
387 (void)read_u16be_inc(&rdptr); /* ENERGY */
388 power_raw = read_u16be_inc(&rdptr); /* POWER */
389 curr_power = power_raw / 100.0f;
390 (void)read_u16be_inc(&rdptr); /* VOLT_IN */
391 (void)read_u16be_inc(&rdptr);
392 reg_val = read_u16be_inc(&rdptr); /* PROTECT */
393 uses_ovp = reg_val == STATE_OVP;
394 uses_ocp = reg_val == STATE_OCP;
395 reg_state = read_u16be_inc(&rdptr); /* REGULATION */
396 is_reg_cc = reg_state == MODE_CC;
397 out_state = read_u16be_inc(&rdptr); /* ENABLE */
398 is_out_enabled = out_state != 0;
400 /* Retrieve a set of adjacent registers. */
401 g_mutex_lock(&devc->rw_mutex);
402 ret = rdtech_dps_read_holding_registers(modbus,
403 REG_RD_OVP_THR, 2, registers);
404 g_mutex_unlock(&devc->rw_mutex);
408 /* Interpret the registers' raw content. */
409 rdptr = (const void *)registers;
410 ovpset_raw = read_u16be_inc(&rdptr); /* OVP THR */
411 ovp_threshold = ovpset_raw / devc->voltage_multiplier;
412 ocpset_raw = read_u16be_inc(&rdptr); /* OCP THR */
413 ocp_threshold = ocpset_raw / devc->current_multiplier;
415 /* Details which we cannot query from the device. */
421 /* ShouldNotHappen(TM). Probe should have failed. */
426 * Store gathered details in the high level container.
428 * TODO Make use of the caller's context. The register access
429 * code path above need not have gathered every detail in every
432 memset(state, 0, sizeof(*state));
433 state->lock = is_lock;
434 state->mask |= STATE_LOCK;
435 state->output_enabled = is_out_enabled;
436 state->mask |= STATE_OUTPUT_ENABLED;
437 state->regulation_cc = is_reg_cc;
438 state->mask |= STATE_REGULATION_CC;
439 state->protect_ovp = uses_ovp;
440 state->mask |= STATE_PROTECT_OVP;
441 state->protect_ocp = uses_ocp;
442 state->mask |= STATE_PROTECT_OCP;
443 state->protect_enabled = TRUE;
444 state->mask |= STATE_PROTECT_ENABLED;
445 state->voltage_target = volt_target;
446 state->mask |= STATE_VOLTAGE_TARGET;
447 state->current_limit = curr_limit;
448 state->mask |= STATE_CURRENT_LIMIT;
449 state->ovp_threshold = ovp_threshold;
450 state->mask |= STATE_OVP_THRESHOLD;
451 state->ocp_threshold = ocp_threshold;
452 state->mask |= STATE_OCP_THRESHOLD;
453 state->voltage = curr_voltage;
454 state->mask |= STATE_VOLTAGE;
455 state->current = curr_current;
456 state->mask |= STATE_CURRENT;
457 state->power = curr_power;
458 state->mask |= STATE_POWER;
463 /* Setup device's parameters. Selectively, from caller specs. */
464 SR_PRIV int rdtech_dps_set_state(const struct sr_dev_inst *sdi,
465 struct rdtech_dps_state *state)
467 struct dev_context *devc;
471 if (!sdi || !sdi->priv || !sdi->conn)
477 /* Only a subset of known values is settable. */
478 if (state->mask & STATE_OUTPUT_ENABLED) {
479 reg_value = state->output_enabled ? 1 : 0;
480 switch (devc->model->model_type) {
482 ret = rdtech_dps_set_reg(sdi, REG_DPS_ENABLE, reg_value);
487 ret = rdtech_rd_set_reg(sdi, REG_RD_ENABLE, reg_value);
495 if (state->mask & STATE_VOLTAGE_TARGET) {
496 reg_value = state->voltage_target * devc->voltage_multiplier;
497 switch (devc->model->model_type) {
499 ret = rdtech_dps_set_reg(sdi, REG_DPS_USET, reg_value);
504 ret = rdtech_rd_set_reg(sdi, REG_RD_VOLT_TGT, reg_value);
512 if (state->mask & STATE_CURRENT_LIMIT) {
513 reg_value = state->current_limit * devc->current_multiplier;
514 switch (devc->model->model_type) {
516 ret = rdtech_dps_set_reg(sdi, REG_DPS_ISET, reg_value);
521 ret = rdtech_rd_set_reg(sdi, REG_RD_CURR_LIM, reg_value);
529 if (state->mask & STATE_OVP_THRESHOLD) {
530 reg_value = state->ovp_threshold * devc->voltage_multiplier;
531 switch (devc->model->model_type) {
533 ret = rdtech_dps_set_reg(sdi, PRE_DPS_OVPSET, reg_value);
538 ret = rdtech_rd_set_reg(sdi, REG_RD_OVP_THR, reg_value);
546 if (state->mask & STATE_OCP_THRESHOLD) {
547 reg_value = state->ocp_threshold * devc->current_multiplier;
548 switch (devc->model->model_type) {
550 ret = rdtech_dps_set_reg(sdi, PRE_DPS_OCPSET, reg_value);
555 ret = rdtech_rd_set_reg(sdi, REG_RD_OCP_THR, reg_value);
563 if (state->mask & STATE_LOCK) {
564 switch (devc->model->model_type) {
566 reg_value = state->lock ? 1 : 0;
567 ret = rdtech_dps_set_reg(sdi, REG_DPS_LOCK, reg_value);
572 /* Do nothing, _and_ silently succeed. */
582 /* Get the current state when acquisition starts. */
583 SR_PRIV int rdtech_dps_seed_receive(const struct sr_dev_inst *sdi)
585 struct dev_context *devc;
586 struct rdtech_dps_state state;
589 if (!sdi || !sdi->priv)
593 ret = rdtech_dps_get_state(sdi, &state, ST_CTX_PRE_ACQ);
597 if (state.mask & STATE_PROTECT_OVP)
598 devc->curr_ovp_state = state.protect_ovp;
599 if (state.mask & STATE_PROTECT_OCP)
600 devc->curr_ocp_state = state.protect_ocp;
601 if (state.mask & STATE_REGULATION_CC)
602 devc->curr_cc_state = state.regulation_cc;
603 if (state.mask & STATE_OUTPUT_ENABLED)
604 devc->curr_out_state = state.output_enabled;
609 /* Get measurements, track state changes during acquisition. */
610 SR_PRIV int rdtech_dps_receive_data(int fd, int revents, void *cb_data)
612 struct sr_dev_inst *sdi;
613 struct dev_context *devc;
614 struct rdtech_dps_state state;
616 struct sr_channel *ch;
617 const char *regulation_text;
627 /* Get the device's current state. */
628 ret = rdtech_dps_get_state(sdi, &state, ST_CTX_IN_ACQ);
633 /* Submit measurement data to the session feed. */
634 std_session_send_df_frame_begin(sdi);
635 ch = g_slist_nth_data(sdi->channels, 0);
636 send_value(sdi, ch, state.voltage,
637 SR_MQ_VOLTAGE, SR_MQFLAG_DC, SR_UNIT_VOLT,
638 devc->model->voltage_digits);
639 ch = g_slist_nth_data(sdi->channels, 1);
640 send_value(sdi, ch, state.current,
641 SR_MQ_CURRENT, SR_MQFLAG_DC, SR_UNIT_AMPERE,
642 devc->model->current_digits);
643 ch = g_slist_nth_data(sdi->channels, 2);
644 send_value(sdi, ch, state.power,
645 SR_MQ_POWER, 0, SR_UNIT_WATT, 2);
646 std_session_send_df_frame_end(sdi);
648 /* Check for state changes. */
649 if (devc->curr_ovp_state != state.protect_ovp) {
650 (void)sr_session_send_meta(sdi,
651 SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE,
652 g_variant_new_boolean(state.protect_ovp));
653 devc->curr_ovp_state = state.protect_ovp;
655 if (devc->curr_ocp_state != state.protect_ocp) {
656 (void)sr_session_send_meta(sdi,
657 SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE,
658 g_variant_new_boolean(state.protect_ocp));
659 devc->curr_ocp_state = state.protect_ocp;
661 if (devc->curr_cc_state != state.regulation_cc) {
662 regulation_text = state.regulation_cc ? "CC" : "CV";
663 (void)sr_session_send_meta(sdi, SR_CONF_REGULATION,
664 g_variant_new_string(regulation_text));
665 devc->curr_cc_state = state.regulation_cc;
667 if (devc->curr_out_state != state.output_enabled) {
668 (void)sr_session_send_meta(sdi, SR_CONF_ENABLED,
669 g_variant_new_boolean(state.output_enabled));
670 devc->curr_out_state = state.output_enabled;
673 /* Check optional acquisition limits. */
674 sr_sw_limits_update_samples_read(&devc->limits, 1);
675 if (sr_sw_limits_check(&devc->limits)) {
676 sr_dev_acquisition_stop(sdi);