1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is an example capture of the Microchip ENC28J60 SPI Ethernet chip.
8 http://ww1.microchip.com/downloads/en/DeviceDoc/39662e.pdf
11 enc28j60-init-and-ping.sr
12 -------------------------
14 Capture contains the following 3 stages:
16 1) Initialization phase where control registers are written.
17 2) Polling phase that waits for the Ethernet link to be up.
18 3) Two round-trips of ping packets (each consists of 1 RX of ICMP Echo Request
19 packet and 1 TX of ICMP Echo Reply packet).
21 The chip was driven by a custom STM32F446 board running custom bare-metal
28 The logic analyzer used was a DSLogic Plus (at 50MHz, with SPI clock at 16MHz):