1 -------------------------------------------------------------------------------
3 -------------------------------------------------------------------------------
5 This is a set of example captures of JTAG communication to an Olimex
6 STM32-H103 eval board with an ST STM32 (ARM Cortex-M3) microcontroller.
8 The JTAG adapter used was the FTDI FT2232H based Floss-JTAG (V0.2).
10 The firmware flashed to the board is a simple LED-blinking libopencm3
11 example named 'fancyblink'. The respective fancyblink.bin file is
12 available as a reference in the same directory as this README.
13 The file's MD5 sum is aa6980d55b9ced84fc0c64bfe9e5ff98. The binary is licensed
14 under the GPL, version 3 or later (see URL below for the source code).
17 http://olimex.com/dev/stm32-h103.html
18 http://randomprojects.org/wiki/Floss-JTAG
20 http://libopencm3.git.sourceforge.net/git/gitweb.cgi?p=libopencm3/libopencm3;a=tree;f=examples/stm32/f1/stm32-h103/fancyblink
26 The logic analyzer used was a Saleae Logic (at 4MHz):
28 Probe STM32-H103 JTAG connector
29 -------------------------------------
38 olimex_stm32-h103_flash_fancyblink.sr
39 -------------------------------------
41 The OpenOCD used was "0.5.0 (2011-08-09-08:45)" (Debian version 0.5.0-1):
43 openocd -f interface/flossjtag-noeeprom.cfg \
44 -f board/olimex_stm32_h107.cfg \
45 -c "init" -c "reset init" \
46 -c "stm32f1x mass_erase 0" \
47 -c "flash write_image fancyblink.bin" \
51 The sigrok command line used was:
53 sigrok-cli -d 0:samplerate=4mhz --time 20s \
54 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' \
55 -o olimex_stm32-h103_flash_fancyblink.sr
58 olimex_stm32-h103_init_10s.sr
59 -----------------------------
61 The following OpenOCD command was used:
63 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
66 The sigrok command line used was:
68 sigrok-cli -d 0:samplerate=4mhz --time 10s \
69 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>
72 olimex_stm32-h103_init_reset_init_10s.sr
73 ----------------------------------------
75 The following OpenOCD command was used:
77 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
78 -c "init" -c "reset init"
80 The sigrok command line used was:
82 sigrok-cli -d 0:samplerate=4mhz --time 10s \
83 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>
86 Specific OpenOCD commands
87 -------------------------
89 For the following tests/files, OpenOCD was already running/connected, and the
90 following commands were entered via the OpenOCD telnet interface:
92 - olimex_stm32-h103_cmd_reg_10s.sr:
95 ===== arm v7m registers
96 (0) r0 (/32): 0x40011000
97 (1) r1 (/32): 0x00000000
98 (2) r2 (/32): 0x00000040
99 (3) r3 (/32): 0x000B5CF4
100 (4) r4 (/32): 0x40022000
101 (5) r5 (/32): 0xFFD7EFB4
102 (6) r6 (/32): 0x3A30084E
103 (7) r7 (/32): 0xF5309C2C
104 (8) r8 (/32): 0xFFFF55D4
105 (9) r9 (/32): 0xDFFFCFFD
106 (10) r10 (/32): 0xF9CAF759
107 (11) r11 (/32): 0xC7092295
108 (12) r12 (/32): 0x44444444
109 (13) sp (/32): 0x20000800
110 (14) lr (/32): 0xFFFFFFFF
111 (15) pc (/32): 0x080001A4
112 (16) xPSR (/32): 0x01000000
113 (17) msp (/32): 0x20000800
114 (18) psp (/32): 0x0748A880
115 (19) primask (/1): 0x00
116 (20) basepri (/8): 0x00
117 (21) faultmask (/1): 0x00
118 (22) control (/2): 0x00
119 ===== cortex-m3 dwt registers
121 (24) dwt_cyccnt (/32)
122 (25) dwt_0_comp (/32)
124 (27) dwt_0_function (/32)
125 (28) dwt_1_comp (/32)
127 (30) dwt_1_function (/32)
128 (31) dwt_2_comp (/32)
130 (33) dwt_2_function (/32)
131 (34) dwt_3_comp (/32)
133 (36) dwt_3_function (/32)
135 - olimex_stm32-h103_cmd_reset_10s.sr:
138 JTAG tap: stm32.cpu tap/device found: 0x3ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x3)
139 JTAG tap: stm32.bs tap/device found: 0x16410041 (mfg: 0x020, part: 0x6410, ver: 0x1)
141 - olimex_stm32-h103_cmd_stm32f1x_options_read_0_10s.sr:
143 > stm32f1x options_read 0
144 device id = 0x20036410
145 flash size = 128kbytes
146 Option Byte: 0x3fffffc
147 Readout Protection Off
149 Stop: No reset generated
150 Standby: No reset generated
152 - olimex_stm32-h103_cmd_stm32f1x_mdw_10s.sr:
155 0x20000000: 02255100 044aa200 3b02f830 3b02f821 f01368e3 d0fb0f01 0f14f013 3a01d101
156 0x20000020: be00d1f0 40022000 20000800 080001a5 080001ef 080001ed 080001ed 080001ed
158 olimex_stm32-h103_idle.sr
159 -------------------------
161 The following OpenOCD command was used:
163 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
164 -c "init" -c "reset halt"
166 The sigrok command line used was:
168 sigrok-cli -d 0:samplerate=4mhz --time 3s \
169 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>
171 sigrok-cli was only started a few seconds after the OpenOCD init/connection
172 to capture what happens when the user doesn't actively use OpenOCD commands.
175 olimex_stm32-h103_irscan_drscan.sr
176 ----------------------------------
178 The following OpenOCD command was used:
180 openocd -f interface/flossjtag-noeeprom.cfg -f board/olimex_stm32_h107.cfg \
181 -c "init" -c "halt" -c "poll off" -c "sleep 4000" \
182 -c "irscan stm32f1x.cpu 0xe" -c "drscan stm32f1x.cpu 32 0"
184 This gets the 32bit contents of the IDCODE register (0b1110), which is
185 0x3ba00477, the ID for ARM Cortex-M3 r1p1-01rel0.
187 The sigrok command line used was:
189 sigrok-cli -d 0:samplerate=4mhz --time 5s \
190 -p '1=TRST,2=TDI,3=TMS,4=TCK,5=TDO,6=RST' -o <filename>