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ols: Provide sample count in RLE mode
[libsigrok.git] / src / hardware / openbench-logic-sniffer / protocol.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <config.h>
21#include "protocol.h"
22
23struct ols_basic_trigger_desc {
24 uint32_t trigger_mask[NUM_BASIC_TRIGGER_STAGES];
25 uint32_t trigger_value[NUM_BASIC_TRIGGER_STAGES];
26 int num_stages;
27};
28
29SR_PRIV int send_shortcommand(struct sr_serial_dev_inst *serial,
30 uint8_t command)
31{
32 char buf[1];
33
34 sr_dbg("Sending cmd 0x%.2x.", command);
35 buf[0] = command;
36 if (serial_write_blocking(serial, buf, 1, serial_timeout(serial, 1)) != 1)
37 return SR_ERR;
38
39 if (serial_drain(serial) != SR_OK)
40 return SR_ERR;
41
42 return SR_OK;
43}
44
45SR_PRIV int send_longcommand(struct sr_serial_dev_inst *serial, uint8_t command,
46 uint8_t *data)
47{
48 char buf[5];
49
50 sr_dbg("Sending cmd 0x%.2x data 0x%.2x%.2x%.2x%.2x.", command, data[0],
51 data[1], data[2], data[3]);
52 buf[0] = command;
53 buf[1] = data[0];
54 buf[2] = data[1];
55 buf[3] = data[2];
56 buf[4] = data[3];
57 if (serial_write_blocking(serial, buf, 5, serial_timeout(serial, 1)) != 5)
58 return SR_ERR;
59
60 if (serial_drain(serial) != SR_OK)
61 return SR_ERR;
62
63 return SR_OK;
64}
65
66static int ols_send_longdata(struct sr_serial_dev_inst *serial, uint8_t command,
67 uint32_t value)
68{
69 uint8_t data[4];
70 WL32(data, value);
71 return send_longcommand(serial, command, data);
72}
73
74SR_PRIV int ols_send_reset(struct sr_serial_dev_inst *serial)
75{
76 unsigned int i;
77
78 for (i = 0; i < 5; i++) {
79 if (send_shortcommand(serial, CMD_RESET) != SR_OK)
80 return SR_ERR;
81 }
82
83 return SR_OK;
84}
85
86/* Configures the channel mask based on which channels are enabled. */
87SR_PRIV uint32_t ols_channel_mask(const struct sr_dev_inst *sdi)
88{
89 uint32_t channel_mask = 0;
90 for (const GSList *l = sdi->channels; l; l = l->next) {
91 struct sr_channel *channel = l->data;
92 if (channel->enabled)
93 channel_mask |= 1 << channel->index;
94 }
95
96 return channel_mask;
97}
98
99static int convert_trigger(const struct sr_dev_inst *sdi,
100 struct ols_basic_trigger_desc *ols_trigger)
101{
102 struct sr_trigger *trigger;
103 struct sr_trigger_stage *stage;
104 struct sr_trigger_match *match;
105 const GSList *l, *m;
106 int i;
107
108 ols_trigger->num_stages = 0;
109 for (i = 0; i < NUM_BASIC_TRIGGER_STAGES; i++) {
110 ols_trigger->trigger_mask[i] = 0;
111 ols_trigger->trigger_value[i] = 0;
112 }
113
114 if (!(trigger = sr_session_trigger_get(sdi->session)))
115 return SR_OK;
116
117 ols_trigger->num_stages = g_slist_length(trigger->stages);
118 if (ols_trigger->num_stages > NUM_BASIC_TRIGGER_STAGES) {
119 sr_err("This device only supports %d trigger stages.",
120 NUM_BASIC_TRIGGER_STAGES);
121 return SR_ERR;
122 }
123
124 for (l = trigger->stages; l; l = l->next) {
125 stage = l->data;
126 for (m = stage->matches; m; m = m->next) {
127 match = m->data;
128 if (!match->channel->enabled)
129 /* Ignore disabled channels with a trigger. */
130 continue;
131 ols_trigger->trigger_mask[stage->stage] |=
132 1 << match->channel->index;
133 if (match->match == SR_TRIGGER_ONE)
134 ols_trigger->trigger_value[stage->stage] |=
135 1 << match->channel->index;
136 }
137 }
138
139 return SR_OK;
140}
141
142SR_PRIV struct dev_context *ols_dev_new(void)
143{
144 struct dev_context *devc;
145
146 devc = g_malloc0(sizeof(struct dev_context));
147 devc->trigger_at_smpl = OLS_NO_TRIGGER;
148
149 return devc;
150}
151
152static void ols_channel_new(struct sr_dev_inst *sdi, int num_chan)
153{
154 struct dev_context *devc = sdi->priv;
155 int i;
156
157 for (i = 0; i < num_chan; i++)
158 sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
159 ols_channel_names[i]);
160
161 devc->max_channels = num_chan;
162}
163
164static void ols_metadata_quirks(struct sr_dev_inst *sdi)
165{
166 struct dev_context *devc;
167 gboolean is_shrimp;
168
169 if (!sdi)
170 return;
171 devc = sdi->priv;
172 if (!devc)
173 return;
174
175 is_shrimp = sdi->model && strcmp(sdi->model, "Shrimp1.0") == 0;
176 if (is_shrimp) {
177 if (!devc->max_channels)
178 ols_channel_new(sdi, 4);
179 if (!devc->max_samples)
180 devc->max_samples = 256 * 1024;
181 if (!devc->max_samplerate)
182 devc->max_samplerate = SR_MHZ(20);
183 }
184
185 if (sdi->version && strstr(sdi->version, "FPGA version 3.07"))
186 devc->device_flags |= DEVICE_FLAG_IS_DEMON_CORE;
187}
188
189SR_PRIV struct sr_dev_inst *get_metadata(struct sr_serial_dev_inst *serial)
190{
191 struct sr_dev_inst *sdi;
192 struct dev_context *devc;
193 uint32_t tmp_int;
194 uint8_t key, type;
195 int delay_ms;
196 GString *tmp_str, *devname, *version;
197 guchar tmp_c;
198
199 sdi = g_malloc0(sizeof(struct sr_dev_inst));
200 sdi->status = SR_ST_INACTIVE;
201 devc = ols_dev_new();
202 sdi->priv = devc;
203
204 devname = g_string_new("");
205 version = g_string_new("");
206
207 key = 0xff;
208 while (key) {
209 delay_ms = serial_timeout(serial, 1);
210 if (serial_read_blocking(serial, &key, 1, delay_ms) != 1)
211 break;
212 if (key == METADATA_TOKEN_END) {
213 sr_dbg("Got metadata key 0x00, metadata ends.");
214 break;
215 }
216 type = key >> 5;
217 switch (type) {
218 case 0:
219 /* NULL-terminated string */
220 tmp_str = g_string_new("");
221 delay_ms = serial_timeout(serial, 1);
222 while (serial_read_blocking(serial, &tmp_c, 1,
223 delay_ms) == 1 &&
224 tmp_c != '\0')
225 g_string_append_c(tmp_str, tmp_c);
226 sr_dbg("Got metadata token 0x%.2x value '%s'.", key,
227 tmp_str->str);
228 switch (key) {
229 case METADATA_TOKEN_DEVICE_NAME:
230 /* Device name */
231 devname =
232 g_string_append(devname, tmp_str->str);
233 break;
234 case METADATA_TOKEN_FPGA_VERSION:
235 /* FPGA firmware version */
236 if (version->len)
237 g_string_append(version, ", ");
238 g_string_append(version, "FPGA version ");
239 g_string_append(version, tmp_str->str);
240 break;
241 case METADATA_TOKEN_ANCILLARY_VERSION:
242 /* Ancillary version */
243 if (version->len)
244 g_string_append(version, ", ");
245 g_string_append(version, "Ancillary version ");
246 g_string_append(version, tmp_str->str);
247 break;
248 default:
249 sr_info("ols: unknown token 0x%.2x: '%s'", key,
250 tmp_str->str);
251 break;
252 }
253 g_string_free(tmp_str, TRUE);
254 break;
255 case 1:
256 /* 32-bit unsigned integer */
257 delay_ms = serial_timeout(serial, 4);
258 if (serial_read_blocking(serial, &tmp_int, 4,
259 delay_ms) != 4)
260 break;
261 tmp_int = RB32(&tmp_int);
262 sr_dbg("Got metadata token 0x%.2x value 0x%.8x.", key,
263 tmp_int);
264 switch (key) {
265 case METADATA_TOKEN_NUM_PROBES_LONG:
266 /* Number of usable channels */
267 ols_channel_new(sdi, tmp_int);
268 break;
269 case METADATA_TOKEN_SAMPLE_MEMORY_BYTES:
270 /* Amount of sample memory available (bytes) */
271 devc->max_samples = tmp_int;
272 break;
273 case METADATA_TOKEN_DYNAMIC_MEMORY_BYTES:
274 /* Amount of dynamic memory available (bytes) */
275 /* what is this for? */
276 break;
277 case METADATA_TOKEN_MAX_SAMPLE_RATE_HZ:
278 /* Maximum sample rate (Hz) */
279 devc->max_samplerate = tmp_int;
280 break;
281 case METADATA_TOKEN_PROTOCOL_VERSION_LONG:
282 /* protocol version */
283 devc->protocol_version = tmp_int;
284 break;
285 default:
286 sr_info("Unknown token 0x%.2x: 0x%.8x.", key,
287 tmp_int);
288 break;
289 }
290 break;
291 case 2:
292 /* 8-bit unsigned integer */
293 delay_ms = serial_timeout(serial, 1);
294 if (serial_read_blocking(serial, &tmp_c, 1, delay_ms) != 1)
295 break;
296 sr_dbg("Got metadata token 0x%.2x value 0x%.2x.", key,
297 tmp_c);
298 switch (key) {
299 case METADATA_TOKEN_NUM_PROBES_SHORT:
300 /* Number of usable channels */
301 ols_channel_new(sdi, tmp_c);
302 break;
303 case METADATA_TOKEN_PROTOCOL_VERSION_SHORT:
304 /* protocol version */
305 devc->protocol_version = tmp_c;
306 break;
307 default:
308 sr_info("Unknown token 0x%.2x: 0x%.2x.", key,
309 tmp_c);
310 break;
311 }
312 break;
313 default:
314 /* unknown type */
315 break;
316 }
317 }
318
319 sdi->model = devname->str;
320 sdi->version = version->str;
321 g_string_free(devname, FALSE);
322 g_string_free(version, FALSE);
323
324 /* Optionally amend received metadata, model specific quirks. */
325 ols_metadata_quirks(sdi);
326
327 return sdi;
328}
329
330SR_PRIV int ols_set_samplerate(const struct sr_dev_inst *sdi,
331 const uint64_t samplerate)
332{
333 struct dev_context *devc;
334
335 devc = sdi->priv;
336 if (devc->max_samplerate && samplerate > devc->max_samplerate)
337 return SR_ERR_SAMPLERATE;
338
339 if (samplerate > CLOCK_RATE) {
340 sr_info("Enabling demux mode.");
341 devc->capture_flags |= CAPTURE_FLAG_DEMUX;
342 devc->capture_flags &= ~CAPTURE_FLAG_NOISE_FILTER;
343 devc->cur_samplerate_divider =
344 (CLOCK_RATE * 2 / samplerate) - 1;
345 } else {
346 sr_info("Disabling demux mode.");
347 devc->capture_flags &= ~CAPTURE_FLAG_DEMUX;
348 devc->capture_flags |= CAPTURE_FLAG_NOISE_FILTER;
349 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
350 }
351
352 /* Calculate actual samplerate used and complain if it is different
353 * from the requested.
354 */
355 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
356 if (devc->capture_flags & CAPTURE_FLAG_DEMUX)
357 devc->cur_samplerate *= 2;
358 if (devc->cur_samplerate != samplerate)
359 sr_info("Can't match samplerate %" PRIu64 ", using %" PRIu64
360 ".",
361 samplerate, devc->cur_samplerate);
362
363 return SR_OK;
364}
365
366SR_PRIV void abort_acquisition(const struct sr_dev_inst *sdi)
367{
368 struct sr_serial_dev_inst *serial;
369
370 serial = sdi->conn;
371 ols_send_reset(serial);
372
373 serial_source_remove(sdi->session, serial);
374
375 std_session_send_df_end(sdi);
376}
377
378SR_PRIV int ols_receive_data(int fd, int revents, void *cb_data)
379{
380 struct dev_context *devc;
381 struct sr_dev_inst *sdi;
382 struct sr_serial_dev_inst *serial;
383 struct sr_datafeed_packet packet;
384 struct sr_datafeed_logic logic;
385 uint32_t sample;
386 int num_changroups, offset, j;
387 unsigned int i;
388 unsigned char byte;
389
390 (void)fd;
391
392 sdi = cb_data;
393 serial = sdi->conn;
394 devc = sdi->priv;
395
396 if (devc->num_transfers == 0 && revents == 0) {
397 /* Ignore timeouts as long as we haven't received anything */
398 return TRUE;
399 }
400
401 if (devc->num_transfers++ == 0) {
402 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
403 if (!devc->raw_sample_buf) {
404 sr_err("Sample buffer malloc failed.");
405 return FALSE;
406 }
407 /* fill with 1010... for debugging */
408 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
409 }
410
411 num_changroups = 0;
412 for (i = 0x20; i > 0x02; i >>= 1) {
413 if ((devc->capture_flags & i) == 0) {
414 num_changroups++;
415 }
416 }
417
418 if (revents == G_IO_IN && devc->num_samples < devc->limit_samples) {
419 if (serial_read_nonblocking(serial, &byte, 1) != 1)
420 return FALSE;
421 devc->cnt_bytes++;
422
423 /* Ignore it if we've read enough. */
424 if (devc->num_samples >= devc->limit_samples)
425 return TRUE;
426
427 devc->sample[devc->num_bytes++] = byte;
428 sr_spew("Received byte 0x%.2x.", byte);
429 if (devc->num_bytes == num_changroups) {
430 devc->cnt_samples++;
431 devc->cnt_samples_rle++;
432 /*
433 * Got a full sample. Convert from the OLS's little-endian
434 * sample to the local format.
435 */
436 sample = devc->sample[0] | (devc->sample[1] << 8) |
437 (devc->sample[2] << 16) |
438 (devc->sample[3] << 24);
439 sr_dbg("Received sample 0x%.*x.", devc->num_bytes * 2,
440 sample);
441 if (devc->capture_flags & CAPTURE_FLAG_RLE) {
442 /*
443 * In RLE mode the high bit of the sample is the
444 * "count" flag, meaning this sample is the number
445 * of times the previous sample occurred.
446 */
447 if (devc->sample[devc->num_bytes - 1] & 0x80) {
448 /* Clear the high bit. */
449 sample &= ~(0x80 << (devc->num_bytes -
450 1) * 8);
451 devc->rle_count = sample;
452 devc->cnt_samples_rle +=
453 devc->rle_count;
454 sr_dbg("RLE count: %u.",
455 devc->rle_count);
456 devc->num_bytes = 0;
457 return TRUE;
458 }
459 }
460 devc->num_samples += devc->rle_count + 1;
461 if (devc->num_samples > devc->limit_samples) {
462 /* Save us from overrunning the buffer. */
463 devc->rle_count -=
464 devc->num_samples - devc->limit_samples;
465 devc->num_samples = devc->limit_samples;
466 }
467
468 if (num_changroups < 4) {
469 /*
470 * Some channel groups may have been turned
471 * off, to speed up transfer between the
472 * hardware and the PC. Expand that here before
473 * submitting it over the session bus --
474 * whatever is listening on the bus will be
475 * expecting a full 32-bit sample, based on
476 * the number of channels.
477 */
478 j = 0;
479 memset(devc->tmp_sample, 0, 4);
480 for (i = 0; i < 4; i++) {
481 if (((devc->capture_flags >> 2) &
482 (1 << i)) == 0) {
483 /*
484 * This channel group was
485 * enabled, copy from received
486 * sample.
487 */
488 devc->tmp_sample[i] =
489 devc->sample[j++];
490 } else if (devc->capture_flags &
491 CAPTURE_FLAG_DEMUX &&
492 (i > 2)) {
493 /* group 2 & 3 get added to 0 & 1 */
494 devc->tmp_sample[i - 2] =
495 devc->sample[j++];
496 }
497 }
498 memcpy(devc->sample, devc->tmp_sample, 4);
499 sr_spew("Expanded sample: 0x%.2hhx%.2hhx%.2hhx%.2hhx ",
500 devc->sample[3], devc->sample[2],
501 devc->sample[1], devc->sample[0]);
502 }
503
504 /*
505 * the OLS sends its sample buffer backwards.
506 * store it in reverse order here, so we can dump
507 * this on the session bus later.
508 */
509 offset = (devc->limit_samples - devc->num_samples) * 4;
510 for (i = 0; i <= devc->rle_count; i++) {
511 memcpy(devc->raw_sample_buf + offset + (i * 4),
512 devc->sample, 4);
513 }
514 memset(devc->sample, 0, 4);
515 devc->num_bytes = 0;
516 devc->rle_count = 0;
517 }
518 } else {
519 /*
520 * This is the main loop telling us a timeout was reached, or
521 * we've acquired all the samples we asked for -- we're done.
522 * Send the (properly-ordered) buffer to the frontend.
523 */
524 sr_dbg("Received %d bytes, %d samples, %d decompressed samples.",
525 devc->cnt_bytes, devc->cnt_samples,
526 devc->cnt_samples_rle);
527 if (devc->trigger_at_smpl != OLS_NO_TRIGGER) {
528 /*
529 * A trigger was set up, so we need to tell the frontend
530 * about it.
531 */
532 if (devc->trigger_at_smpl > 0) {
533 /* There are pre-trigger samples, send those first. */
534 packet.type = SR_DF_LOGIC;
535 packet.payload = &logic;
536 logic.length = devc->trigger_at_smpl * 4;
537 logic.unitsize = 4;
538 logic.data = devc->raw_sample_buf +
539 (devc->limit_samples -
540 devc->num_samples) *
541 4;
542 sr_session_send(sdi, &packet);
543 }
544
545 /* Send the trigger. */
546 std_session_send_df_trigger(sdi);
547 }
548
549 /* Send post-trigger / all captured samples. */
550 int num_pre_trigger_samples = devc->trigger_at_smpl ==
551 OLS_NO_TRIGGER ?
552 0 :
553 devc->trigger_at_smpl;
554 packet.type = SR_DF_LOGIC;
555 packet.payload = &logic;
556 logic.length =
557 (devc->num_samples - num_pre_trigger_samples) * 4;
558 logic.unitsize = 4;
559 logic.data = devc->raw_sample_buf +
560 (num_pre_trigger_samples + devc->limit_samples -
561 devc->num_samples) *
562 4;
563 sr_session_send(sdi, &packet);
564
565 g_free(devc->raw_sample_buf);
566
567 serial_flush(serial);
568 abort_acquisition(sdi);
569 }
570
571 return TRUE;
572}
573
574static int
575ols_set_basic_trigger_stage(const struct ols_basic_trigger_desc *trigger_desc,
576 struct sr_serial_dev_inst *serial, int stage)
577{
578 uint8_t cmd, arg[4];
579
580 cmd = CMD_SET_BASIC_TRIGGER_MASK0 + stage * 4;
581 if (ols_send_longdata(serial, cmd, trigger_desc->trigger_mask[stage]) != SR_OK)
582 return SR_ERR;
583
584 cmd = CMD_SET_BASIC_TRIGGER_VALUE0 + stage * 4;
585 if (ols_send_longdata(serial, cmd, trigger_desc->trigger_value[stage]) != SR_OK)
586 return SR_ERR;
587
588 cmd = CMD_SET_BASIC_TRIGGER_CONFIG0 + stage * 4;
589 arg[0] = arg[1] = arg[3] = 0x00;
590 arg[2] = stage;
591 if (stage == trigger_desc->num_stages)
592 /* Last stage, fire when this one matches. */
593 arg[3] |= TRIGGER_START;
594 if (send_longcommand(serial, cmd, arg) != SR_OK)
595 return SR_ERR;
596
597 return SR_OK;
598}
599
600SR_PRIV int ols_prepare_acquisition(const struct sr_dev_inst *sdi)
601{
602 int ret;
603
604 struct dev_context *devc = sdi->priv;
605 struct sr_serial_dev_inst *serial = sdi->conn;
606
607 int num_changroups = 0;
608 uint8_t changroup_mask = 0;
609 uint32_t channel_mask = ols_channel_mask(sdi);
610 for (unsigned int i = 0; i < 4; i++) {
611 if (channel_mask & (0xff << (i * 8))) {
612 changroup_mask |= (1 << i);
613 num_changroups++;
614 }
615 }
616
617 /*
618 * Limit readcount to prevent reading past the end of the hardware
619 * buffer. Rather read too many samples than too few.
620 */
621 uint32_t samplecount =
622 MIN(devc->max_samples / num_changroups, devc->limit_samples);
623 uint32_t readcount = (samplecount + 3) / 4;
624 uint32_t delaycount;
625
626 /* Basic triggers. */
627 struct ols_basic_trigger_desc basic_trigger_desc;
628 if (convert_trigger(sdi, &basic_trigger_desc) != SR_OK) {
629 sr_err("Failed to configure channels.");
630 return SR_ERR;
631 }
632 if (basic_trigger_desc.num_stages > 0) {
633 /*
634 * According to http://mygizmos.org/ols/Logic-Sniffer-FPGA-Spec.pdf
635 * reset command must be send prior each arm command
636 */
637 sr_dbg("Send reset command before trigger configure");
638 if (ols_send_reset(serial) != SR_OK)
639 return SR_ERR;
640
641 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
642 devc->trigger_at_smpl = (readcount - delaycount) * 4 -
643 basic_trigger_desc.num_stages;
644 for (int i = 0; i <= basic_trigger_desc.num_stages; i++) {
645 sr_dbg("Setting OLS stage %d trigger.", i);
646 if ((ret = ols_set_basic_trigger_stage(
647 &basic_trigger_desc, serial, i)) != SR_OK)
648 return ret;
649 }
650 } else {
651 /* No triggers configured, force trigger on first stage. */
652 sr_dbg("Forcing trigger at stage 0.");
653 if ((ret = ols_set_basic_trigger_stage(&basic_trigger_desc,
654 serial, 0)) != SR_OK)
655 return ret;
656 delaycount = readcount;
657 }
658
659 /* Samplerate. */
660 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
661 devc->cur_samplerate, devc->cur_samplerate_divider);
662 if (ols_send_longdata(serial, CMD_SET_DIVIDER,
663 devc->cur_samplerate_divider & 0x00FFFFFF) != SR_OK)
664 return SR_ERR;
665
666 /* Send sample limit and pre/post-trigger capture ratio. */
667 sr_dbg("Setting sample limit %d, trigger point at %d",
668 (readcount - 1) * 4, (delaycount - 1) * 4);
669
670 if (devc->max_samples > 256 * 1024) {
671 if (ols_send_longdata(serial, CMD_CAPTURE_READCOUNT,
672 readcount - 1) != SR_OK)
673 return SR_ERR;
674 if (ols_send_longdata(serial, CMD_CAPTURE_DELAYCOUNT,
675 delaycount - 1) != SR_OK)
676 return SR_ERR;
677 } else {
678 uint8_t arg[4];
679 WL16(&arg[0], readcount - 1);
680 WL16(&arg[2], delaycount - 1);
681 if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
682 return SR_ERR;
683 }
684
685 /* Flag register. */
686 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s, "
687 "%s clock%s",
688 devc->capture_flags & CAPTURE_FLAG_INTERNAL_TEST_MODE ? "on" :
689 "off",
690 devc->capture_flags & CAPTURE_FLAG_EXTERNAL_TEST_MODE ? "on" :
691 "off",
692 devc->capture_flags & CAPTURE_FLAG_RLE ? "on" : "off",
693 devc->capture_flags & CAPTURE_FLAG_NOISE_FILTER ? "on" : "off",
694 devc->capture_flags & CAPTURE_FLAG_DEMUX ? "on" : "off",
695 devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ? "external" :
696 "internal",
697 devc->capture_flags & CAPTURE_FLAG_CLOCK_EXTERNAL ?
698 (devc->capture_flags & CAPTURE_FLAG_INVERT_EXT_CLOCK ?
699 " on falling edge" :
700 "on rising edge") :
701 "");
702
703 /*
704 * Enable/disable OLS channel groups in the flag register according
705 * to the channel mask. 1 means "disable channel".
706 */
707 devc->capture_flags &= ~0x3c;
708 devc->capture_flags |= ~(changroup_mask << 2) & 0x3c;
709
710 /* RLE mode is always zero, for now. */
711
712 if (ols_send_longdata(serial, CMD_SET_FLAGS, devc->capture_flags) != SR_OK)
713 return SR_ERR;
714
715 return SR_OK;
716}