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Commit | Line | Data |
---|---|---|
1 | ------------------------------------------------------------------------------- | |
2 | SPI / Atmel ATMEGA32 | |
3 | ------------------------------------------------------------------------------- | |
4 | ||
5 | This is a set of SPI captures from an Atmel ATMEGA32 device. The main loop of | |
6 | the C program outputs an 8-bit value which is increased by one between | |
7 | subsequent transmissions: | |
8 | ||
9 | unsigned char c = 0; | |
10 | for (;;) { | |
11 | _delay_us(250); | |
12 | cbi(PORTB, DD_SS); | |
13 | SPDR = c; | |
14 | c++; | |
15 | while (!(SPSR & (1 << SPIF))); | |
16 | sbi(PORTB, DD_SS); | |
17 | } | |
18 | ||
19 | ||
20 | Logic analyzer setup | |
21 | -------------------- | |
22 | ||
23 | The logic analyzer used was a Saleae Logic (at 500kHz). | |
24 | ||
25 | Probe ATMEGA32 pins (PDIP-40) | |
26 | --------------------------------- | |
27 | 0 (CS) SS/PB4 (Pin 5) | |
28 | 1 (MOSI) MOSI/PB5 (Pin 6) | |
29 | 2 (SCK) SCK/PB7 (Pin 8) | |
30 | ||
31 | ||
32 | Probing | |
33 | ------- | |
34 | ||
35 | The sigrok command line used was: | |
36 | ||
37 | sigrok-cli --driver fx2lafw --samples=1m --config samplerate=500k -o <file> | |
38 | ||
39 | ||
40 | SPI setup | |
41 | --------- | |
42 | ||
43 | There are 4 different SPI setups each captured in a separate capture file | |
44 | (see the ATMEGA datasheet for the meaning of the CPOL & CPHA flags). | |
45 | ||
46 | ||
47 | spi_atmega32_00.sr | |
48 | ------------------ | |
49 | ||
50 | SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1); | |
51 | ||
52 | ||
53 | spi_atmega32_11.sr | |
54 | ------------------ | |
55 | ||
56 | SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPOL) | (1<<CPHA); | |
57 | ||
58 | ||
59 | spi_atmega32_01.sr | |
60 | ------------------ | |
61 | ||
62 | SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPHA); | |
63 | ||
64 | ||
65 | spi_atmega32_10.sr | |
66 | ------------------ | |
67 | ||
68 | SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(1<<SPR1) | (1<<CPOL); | |
69 |