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1 | #!/usr/bin/env python3 | |
2 | ## | |
3 | ## This file is part of the sigrok-dumps project. | |
4 | ## | |
5 | ## Copyright (C) 2014 Jens Steinhauser <jens.steinhauser@gmail.com> | |
6 | ## | |
7 | ## This program is free software; you can redistribute it and/or modify | |
8 | ## it under the terms of the GNU General Public License as published by | |
9 | ## the Free Software Foundation; either version 2 of the License, or | |
10 | ## (at your option) any later version. | |
11 | ## | |
12 | ## This program is distributed in the hope that it will be useful, | |
13 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | ## GNU General Public License for more details. | |
16 | ## | |
17 | ## You should have received a copy of the GNU General Public License | |
18 | ## along with this program; if not, write to the Free Software | |
19 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
20 | ## | |
21 | ||
22 | ## This script generates test cases for the nrf24l01 protocol decoder. | |
23 | ||
24 | import csv | |
25 | import subprocess | |
26 | import tempfile | |
27 | ||
28 | class SPI: | |
29 | def __init__(self, filename): | |
30 | self._filename = filename | |
31 | self._data = [] | |
32 | ||
33 | def CSlow(self): | |
34 | self._data.append([1, 0, 0, 0]) | |
35 | self._data.append([0, 0, 0, 0]) | |
36 | ||
37 | def CShigh(self): | |
38 | self._data.append([0, 0, 0, 0]) | |
39 | self._data.append([1, 0, 0, 0]) | |
40 | ||
41 | def add(self, mosi, miso): | |
42 | for _ in range(8): | |
43 | mo = mosi & 0x80 | |
44 | mi = miso & 0x80 | |
45 | mosi <<= 1 | |
46 | miso <<= 1 | |
47 | self._data.append([0, 0, mo, mi]) | |
48 | self._data.append([0, 1, mo, mi]) | |
49 | ||
50 | self._data.append([0, 0, 0, 0]) | |
51 | ||
52 | def write(self): | |
53 | with tempfile.NamedTemporaryFile() as tf: | |
54 | with open(tf.name, 'w') as tff: | |
55 | w = csv.writer(tff) | |
56 | w.writerow(['CS', 'CLK', 'MOSI', 'MISO']) | |
57 | w.writerows(self._data) | |
58 | ||
59 | fn = '{}.sr'.format(self._filename) | |
60 | I = 'csv:header=true:samplerate=1k' | |
61 | subprocess.check_call(['sigrok-cli', '-I', I, '-i', tf.name, '-o', fn]) | |
62 | ||
63 | spi = SPI('nrf24l01-test-activate') | |
64 | spi.CSlow() | |
65 | spi.add(0x50, 0x00) # ACTIVATE | |
66 | spi.add(0x73, 0x00) # correct payload | |
67 | spi.CShigh() | |
68 | spi.CSlow() | |
69 | spi.add(0x50, 0x00) # ACTIVATE | |
70 | spi.add(0x74, 0x00) # wrong payload | |
71 | spi.CShigh() | |
72 | spi.write() | |
73 | ||
74 | spi = SPI('nrf24l01-test-excess-bytes') | |
75 | spi.CSlow() | |
76 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
77 | spi.add(0x00, 0x00) | |
78 | spi.CShigh() | |
79 | spi.CSlow() | |
80 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
81 | spi.add(0x00, 0x00) | |
82 | spi.add(0x00, 0x00) # excess | |
83 | spi.CShigh() | |
84 | spi.CSlow() | |
85 | spi.add(0x20, 0x00) # W_REGISTER, reg = CONFIG | |
86 | spi.add(0x00, 0x00) | |
87 | spi.add(0x00, 0x00) # excess | |
88 | spi.CShigh() | |
89 | spi.CSlow() | |
90 | spi.add(0x20, 0x00) # W_REGISTER, reg = CONFIG | |
91 | spi.add(0x00, 0x00) | |
92 | spi.add(0x00, 0x00) # excess | |
93 | spi.add(0x00, 0x00) # excess | |
94 | spi.CShigh() | |
95 | spi.CSlow() | |
96 | spi.add(0x2a, 0x00) # W_REGISTER, reg = RX_ADDR_P0 | |
97 | spi.add(0x00, 0x00) | |
98 | spi.add(0x00, 0x00) | |
99 | spi.add(0x00, 0x00) | |
100 | spi.add(0x00, 0x00) | |
101 | spi.add(0x00, 0x00) | |
102 | spi.add(0x00, 0x00) # excess | |
103 | spi.CShigh() | |
104 | spi.CSlow() | |
105 | spi.add(0x2c, 0x00) # W_REGISTER, reg = RX_ADDR_P2 | |
106 | spi.add(0x00, 0x00) | |
107 | spi.add(0x00, 0x00) # excess | |
108 | spi.CShigh() | |
109 | spi.CSlow() | |
110 | spi.add(0xa0, 0x00) # W_ACK_PAYLOAD, pipe = 0 | |
111 | for i in range(33): | |
112 | spi.add(i, 0x00) # write 33 bytes, command only expects 32 | |
113 | spi.CShigh() | |
114 | spi.write() | |
115 | ||
116 | spi = SPI('nrf24l01-test-missing-bytes') | |
117 | spi.CSlow() | |
118 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
119 | spi.CShigh() | |
120 | spi.CSlow() | |
121 | spi.add(0xb0, 0x00) # W_TX_PAYLOAD_NOACK | |
122 | spi.CShigh() | |
123 | spi.write() | |
124 | ||
125 | spi = SPI('nrf24l01-test-no-command') | |
126 | spi.CSlow() | |
127 | spi.CShigh() | |
128 | spi.CSlow() | |
129 | spi.CShigh() | |
130 | spi.CSlow() | |
131 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
132 | spi.add(0x00, 0x00) | |
133 | spi.CShigh() | |
134 | spi.CSlow() | |
135 | spi.CShigh() | |
136 | spi.CSlow() | |
137 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
138 | spi.add(0x00, 0x00) | |
139 | spi.CShigh() | |
140 | spi.write() | |
141 | ||
142 | spi = SPI('nrf24l01-test-unknown-register') | |
143 | spi.CSlow() | |
144 | spi.add(0x1f, 0x00) # R_REGISTER, reg = 0x1f | |
145 | spi.add(0x00, 0x00) | |
146 | spi.CShigh() | |
147 | spi.write() | |
148 | ||
149 | spi = SPI('nrf24l01-test-unknown-command') | |
150 | spi.CSlow() | |
151 | spi.add(0x00, 0x00) # R_REGISTER, reg = CONFIG | |
152 | spi.add(0x00, 0x00) | |
153 | spi.CShigh() | |
154 | spi.CSlow() | |
155 | spi.add(0xf0, 0x00) # wrong command | |
156 | spi.add(0x00, 0x00) | |
157 | spi.CShigh() | |
158 | spi.CSlow() | |
159 | spi.add(0x20, 0x00) # W_REGISTER, reg = CONFIG | |
160 | spi.add(0x00, 0x00) | |
161 | spi.CShigh() | |
162 | spi.write() | |
163 | ||
164 | spi = SPI('nrf24l01-test-misc') | |
165 | spi.CSlow() | |
166 | spi.add(0xe3, 0x00) # REUSE_TX_PL | |
167 | spi.CShigh() | |
168 | spi.CSlow() | |
169 | spi.add(0x60, 0x00) # R_RX_PL_WID | |
170 | spi.add(0x00, 0x09) | |
171 | spi.CShigh() | |
172 | spi.CSlow() | |
173 | spi.add(0x60, 0x00) # R_RX_PL_WID | |
174 | spi.CShigh() | |
175 | spi.CSlow() | |
176 | spi.add(0x60, 0x00) # R_RX_PL_WID | |
177 | spi.add(0x00, 0x09) | |
178 | spi.add(0x00, 0x09) # excess | |
179 | spi.CShigh() | |
180 | spi.CSlow() | |
181 | spi.add(0xa9, 0x00) # W_ACK_PAYLOAD, pipe = 1 | |
182 | for i in range(5): | |
183 | spi.add(i, 0x00) | |
184 | for c in 'abcdef': | |
185 | spi.add(ord(c), 0x00) | |
186 | for i in range(5): | |
187 | spi.add(i, 0x00) | |
188 | spi.CShigh() | |
189 | spi.write() |