[libsigrok.git] / src / hardware / openbench-logic-sniffer / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include "protocol.h"

#define SERIALCOMM "115200/8n1"

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t scanopts[] = {
	SR_CONF_CONN,
	SR_CONF_SERIALCOMM,
};

static const uint32_t devopts[] = {
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_EXTERNAL_CLOCK | SR_CONF_SET,
	SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
	SR_CONF_SWAP | SR_CONF_SET,
	SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
};

static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
};

#define STR_PATTERN_NONE     "None"
#define STR_PATTERN_EXTERNAL "External"
#define STR_PATTERN_INTERNAL "Internal"

/* Supported methods of test pattern outputs */
enum {
	/**
	 * Capture pins 31:16 (unbuffered wing) output a test pattern
	 * that can captured on pins 0:15.
	 */
	PATTERN_EXTERNAL,

	/** Route test pattern internally to capture buffer. */
	PATTERN_INTERNAL,
};

static const char *patterns[] = {
	STR_PATTERN_NONE,
	STR_PATTERN_EXTERNAL,
	STR_PATTERN_INTERNAL,
};

/* Channels are numbered 0-31 (on the PCB silkscreen). */
SR_PRIV const char *ols_channel_names[] = {
	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	"24", "25", "26", "27", "28", "29", "30", "31",
};

/* Default supported samplerates, can be overridden by device metadata. */
static const uint64_t samplerates[] = {
	SR_HZ(10),
	SR_MHZ(200),
	SR_HZ(1),
};

#define RESPONSE_DELAY_US (10 * 1000)

SR_PRIV struct sr_dev_driver ols_driver_info;

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct sr_config *src;
	struct sr_dev_inst *sdi;
	struct drv_context *drvc;
	struct sr_serial_dev_inst *serial;
	GSList *l, *devices;
	int ret;
	unsigned int i;
	const char *conn, *serialcomm;
	char buf[8];

	drvc = di->context;

	devices = NULL;

	conn = serialcomm = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		case SR_CONF_SERIALCOMM:
			serialcomm = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	if (!conn)
		return NULL;

	if (!serialcomm)
		serialcomm = SERIALCOMM;

	serial = sr_serial_dev_inst_new(conn, serialcomm);

	/* The discovery procedure is like this: first send the Reset
	 * command (0x00) 5 times, since the device could be anywhere
	 * in a 5-byte command. Then send the ID command (0x02).
	 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	 * have a match.
	 */
	sr_info("Probing %s.", conn);
	if (serial_open(serial, SERIAL_RDWR) != SR_OK)
		return NULL;

	ret = SR_OK;
	for (i = 0; i < 5; i++) {
		if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
			sr_err("Port %s is not writable.", conn);
			break;
		}
	}
	if (ret != SR_OK) {
		serial_close(serial);
		sr_err("Could not use port %s. Quitting.", conn);
		return NULL;
	}
	send_shortcommand(serial, CMD_ID);

	g_usleep(RESPONSE_DELAY_US);

	if (sp_input_waiting(serial->data) == 0) {
		sr_dbg("Didn't get any reply.");
		return NULL;
	}

	ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
	if (ret != 4) {
		sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
		return NULL;
	}

	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
		sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
		       "'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
		return NULL;
	}

	/* Definitely using the OLS protocol, check if it supports
	 * the metadata command.
	 */
	send_shortcommand(serial, CMD_METADATA);

	g_usleep(RESPONSE_DELAY_US);

	if (sp_input_waiting(serial->data) != 0) {
		/* Got metadata. */
		sdi = get_metadata(serial);
	} else {
		/* Not an OLS -- some other board that uses the sump protocol. */
		sr_info("Device does not support metadata.");
		sdi = g_malloc0(sizeof(struct sr_dev_inst));
		sdi->status = SR_ST_INACTIVE;
		sdi->vendor = g_strdup("Sump");
		sdi->model = g_strdup("Logic Analyzer");
		sdi->version = g_strdup("v1.0");
		sdi->driver = di;
		for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
			sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
					ols_channel_names[i]);
		sdi->priv = ols_dev_new();
	}
	/* Configure samplerate and divider. */
	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
		sr_dbg("Failed to set default samplerate (%"PRIu64").",
				DEFAULT_SAMPLERATE);
	sdi->inst_type = SR_INST_SERIAL;
	sdi->conn = serial;

	drvc->instances = g_slist_append(drvc->instances, sdi);
	devices = g_slist_append(devices, sdi);

	serial_close(serial);

	return devices;
}

static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR_ARG;

	devc = sdi->priv;
	switch (key) {
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->cur_samplerate);
		break;
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
	case SR_CONF_LIMIT_SAMPLES:
		*data = g_variant_new_uint64(devc->limit_samples);
		break;
	case SR_CONF_PATTERN_MODE:
		if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
		else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
			*data = g_variant_new_string(STR_PATTERN_INTERNAL);
		else
			*data = g_variant_new_string(STR_PATTERN_NONE);
		break;
	case SR_CONF_RLE:
		*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	uint16_t flag;
	uint64_t tmp_u64;
	int ret;
	const char *stropt;

	(void)cg;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
			return SR_ERR_SAMPLERATE;
		ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		tmp_u64 = g_variant_get_uint64(data);
		if (tmp_u64 < MIN_NUM_SAMPLES)
			return SR_ERR;
		devc->limit_samples = tmp_u64;
		ret = SR_OK;
		break;
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
			ret = SR_ERR;
		else
			ret = SR_OK;
		break;
	case SR_CONF_EXTERNAL_CLOCK:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling external clock.");
			devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
		} else {
			sr_info("Disabled external clock.");
			devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
		}
		ret = SR_OK;
		break;
	case SR_CONF_PATTERN_MODE:
		stropt = g_variant_get_string(data, NULL);
		ret = SR_OK;
		flag = 0xffff;
		if (!strcmp(stropt, STR_PATTERN_NONE)) {
			sr_info("Disabling test modes.");
			flag = 0x0000;
		}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
			sr_info("Enabling internal test mode.");
			flag = FLAG_INTERNAL_TEST_MODE;
		} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
			sr_info("Enabling external test mode.");
			flag = FLAG_EXTERNAL_TEST_MODE;
		} else {
			ret = SR_ERR;
		}
		if (flag != 0xffff) {
			devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
			devc->flag_reg |= flag;
		}
		break;
	case SR_CONF_SWAP:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling channel swapping.");
			devc->flag_reg |= FLAG_SWAP_CHANNELS;
		} else {
			sr_info("Disabling channel swapping.");
			devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
		}
		ret = SR_OK;
		break;

	case SR_CONF_RLE:
		if (g_variant_get_boolean(data)) {
			sr_info("Enabling RLE.");
			devc->flag_reg |= FLAG_RLE;
		} else {
			sr_info("Disabling RLE.");
			devc->flag_reg &= ~FLAG_RLE;
		}
		ret = SR_OK;
		break;
	default:
		ret = SR_ERR_NA;
	}

	return ret;
}

static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
		const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	GVariant *gvar, *grange[2];
	GVariantBuilder gvb;
	int num_ols_changrp, i;

	(void)cg;

	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
				scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
		break;
	case SR_CONF_DEVICE_OPTIONS:
		if (!sdi)
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
		else
			*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
					devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
		break;
	case SR_CONF_SAMPLERATE:
		g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
		gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
				ARRAY_SIZE(samplerates), sizeof(uint64_t));
		g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
		*data = g_variant_builder_end(&gvb);
		break;
	case SR_CONF_TRIGGER_MATCH:
		*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
				trigger_matches, ARRAY_SIZE(trigger_matches),
				sizeof(int32_t));
		break;
	case SR_CONF_PATTERN_MODE:
		*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
		break;
	case SR_CONF_LIMIT_SAMPLES:
		if (!sdi)
			return SR_ERR_ARG;
		devc = sdi->priv;
		if (devc->flag_reg & FLAG_RLE)
			return SR_ERR_NA;
		if (devc->max_samples == 0)
			/* Device didn't specify sample memory size in metadata. */
			return SR_ERR_NA;
		/*
		 * Channel groups are turned off if no channels in that group are
		 * enabled, making more room for samples for the enabled group.
		*/
		ols_channel_mask(sdi);
		num_ols_changrp = 0;
		for (i = 0; i < 4; i++) {
			if (devc->channel_mask & (0xff << (i * 8)))
				num_ols_changrp++;
		}
		grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		if (num_ols_changrp)
			grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
		else
			grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
		*data = g_variant_new_tuple(grange, 2);
		break;
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int set_trigger(const struct sr_dev_inst *sdi, int stage)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint8_t cmd, arg[4];

	devc = sdi->priv;
	serial = sdi->conn;

	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	arg[0] = devc->trigger_mask[stage] & 0xff;
	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	arg[0] = devc->trigger_value[stage] & 0xff;
	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	arg[0] = arg[1] = arg[3] = 0x00;
	arg[2] = stage;
	if (stage == devc->num_stages)
		/* Last stage, fire when this one matches. */
		arg[3] |= TRIGGER_START;
	if (send_longcommand(serial, cmd, arg) != SR_OK)
		return SR_ERR;

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct sr_serial_dev_inst *serial;
	uint16_t samplecount, readcount, delaycount;
	uint8_t ols_changrp_mask, arg[4];
	int num_ols_changrp;
	int ret, i;

	if (sdi->status != SR_ST_ACTIVE)
		return SR_ERR_DEV_CLOSED;

	devc = sdi->priv;
	serial = sdi->conn;

	ols_channel_mask(sdi);

	num_ols_changrp = 0;
	ols_changrp_mask = 0;
	for (i = 0; i < 4; i++) {
		if (devc->channel_mask & (0xff << (i * 8))) {
			ols_changrp_mask |= (1 << i);
			num_ols_changrp++;
		}
	}

	/*
	 * Limit readcount to prevent reading past the end of the hardware
	 * buffer.
	 */
	samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
	readcount = samplecount / 4;

	/* Rather read too many samples than too few. */
	if (samplecount % 4 != 0)
		readcount++;

	/* Basic triggers. */
	if (ols_convert_trigger(sdi) != SR_OK) {
		sr_err("Failed to configure channels.");
		return SR_ERR;
	}
	if (devc->num_stages > 0) {
		delaycount = readcount * (1 - devc->capture_ratio / 100.0);
		devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
		for (i = 0; i <= devc->num_stages; i++) {
			sr_dbg("Setting OLS stage %d trigger.", i);
			if ((ret = set_trigger(sdi, i)) != SR_OK)
				return ret;
		}
	} else {
		/* No triggers configured, force trigger on first stage. */
		sr_dbg("Forcing trigger at stage 0.");
		if ((ret = set_trigger(sdi, 0)) != SR_OK)
			return ret;
		delaycount = readcount;
	}

	/* Samplerate. */
	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
			devc->cur_samplerate, devc->cur_samplerate_divider);
	arg[0] = devc->cur_samplerate_divider & 0xff;
	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
		return SR_ERR;

	/* Send sample limit and pre/post-trigger capture ratio. */
	sr_dbg("Setting sample limit %d, trigger point at %d",
			(readcount - 1) * 4, (delaycount - 1) * 4);
	arg[0] = ((readcount - 1) & 0xff);
	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	arg[2] = ((delaycount - 1) & 0xff);
	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
		return SR_ERR;

	/* Flag register. */
	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
			devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
			devc->flag_reg & FLAG_RLE ? "on" : "off",
			devc->flag_reg & FLAG_FILTER ? "on": "off",
			devc->flag_reg & FLAG_DEMUX ? "on" : "off");
	/*
	 * Enable/disable OLS channel groups in the flag register according
	 * to the channel mask. 1 means "disable channel".
	 */
	devc->flag_reg |= ~(ols_changrp_mask << 2) & 0x3c;
	arg[0] = devc->flag_reg & 0xff;
	arg[1] = devc->flag_reg >> 8;
	arg[2] = arg[3] = 0x00;
	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
		return SR_ERR;

	/* Start acquisition on the device. */
	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
		return SR_ERR;

	/* Reset all operational states. */
	devc->rle_count = devc->num_transfers = 0;
	devc->num_samples = devc->num_bytes = 0;
	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
	memset(devc->sample, 0, 4);

	std_session_send_df_header(sdi, LOG_PREFIX);

	/* If the device stops sending for longer than it takes to send a byte,
	 * that means it's finished. But wait at least 100 ms to be safe.
	 */
	serial_source_add(sdi->session, serial, G_IO_IN, 100,
			ols_receive_data, (struct sr_dev_inst *)sdi);

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	abort_acquisition(sdi);

	return SR_OK;
}

SR_PRIV struct sr_dev_driver ols_driver_info = {
	.name = "ols",
	.longname = "Openbench Logic Sniffer",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = NULL,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = std_serial_dev_open,
	.dev_close = std_serial_dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
Commit	Line	Data
0aba65da	1	/*
50985c20	2	* This file is part of the libsigrok project.
0aba65da	3	*
13d8e03c	4	* Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
0aba65da UH	5	*
	6	* This program is free software: you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation, either version 3 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
6ec6c43b	20	#include <config.h>
515ab088	21	#include "protocol.h"
0aba65da UH	22
	23	#define SERIALCOMM "115200/8n1"
	24
63ea6141 BV	25	static const uint32_t drvopts[] = {
	26	SR_CONF_LOGIC_ANALYZER,
	27	};
	28
a0e0bb41	29	static const uint32_t scanopts[] = {
1953564a BV	30	SR_CONF_CONN,
1953564a BV	31	SR_CONF_SERIALCOMM,
aeabd308 UH	32	};
aeabd308 UH	33
f254bc4b	34	static const uint32_t devopts[] = {
5827f61b BV	35	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	36	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	37	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
	38	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
	39	SR_CONF_EXTERNAL_CLOCK \| SR_CONF_SET,
	40	SR_CONF_PATTERN_MODE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
	41	SR_CONF_SWAP \| SR_CONF_SET,
	42	SR_CONF_RLE \| SR_CONF_GET \| SR_CONF_SET,
0aba65da UH	43	};
0aba65da UH	44
91fd0f72 BV	45	static const int32_t trigger_matches[] = {
	46	SR_TRIGGER_ZERO,
	47	SR_TRIGGER_ONE,
	48	};
	49
6d16fdfb BV	50	#define STR_PATTERN_NONE "None"
	51	#define STR_PATTERN_EXTERNAL "External"
	52	#define STR_PATTERN_INTERNAL "Internal"
967760a8 MR	53
	54	/* Supported methods of test pattern outputs */
	55	enum {
	56	/**
	57	* Capture pins 31:16 (unbuffered wing) output a test pattern
	58	* that can captured on pins 0:15.
	59	*/
	60	PATTERN_EXTERNAL,
	61
	62	/** Route test pattern internally to capture buffer. */
	63	PATTERN_INTERNAL,
	64	};
	65
7c07a178	66	static const char *patterns[] = {
6d16fdfb	67	STR_PATTERN_NONE,
7c07a178 UH	68	STR_PATTERN_EXTERNAL,
	69	STR_PATTERN_INTERNAL,
	70	};
	71
ba7dd8bb	72	/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a	73	SR_PRIV const char *ols_channel_names[] = {
78693401 UH	74	"0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
	75	"13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
	76	"24", "25", "26", "27", "28", "29", "30", "31",
0aba65da UH	77	};
0aba65da UH	78
d3b38ad3	79	/* Default supported samplerates, can be overridden by device metadata. */
e46aa4f6 BV	80	static const uint64_t samplerates[] = {
	81	SR_HZ(10),
	82	SR_MHZ(200),
	83	SR_HZ(1),
0aba65da UH	84	};
0aba65da UH	85
1a46cc62 UH	86	#define RESPONSE_DELAY_US (10 * 1000)
1a46cc62 UH	87
0aba65da	88	SR_PRIV struct sr_dev_driver ols_driver_info;
0aba65da	89
4f840ce9	90	static GSList scan(struct sr_dev_driver di, GSList *options)
0aba65da	91	{
1987b8d6	92	struct sr_config *src;
0aba65da UH	93	struct sr_dev_inst *sdi;
0aba65da UH	94	struct drv_context *drvc;
0aba65da	95	struct sr_serial_dev_inst *serial;
0aba65da	96	GSList l, devices;
07ffa5b3 UH	97	int ret;
07ffa5b3 UH	98	unsigned int i;
0aba65da UH	99	const char conn, serialcomm;
	100	char buf[8];
	101
41812aca	102	drvc = di->context;
4b97c74e	103
0aba65da UH	104	devices = NULL;
	105
	106	conn = serialcomm = NULL;
	107	for (l = options; l; l = l->next) {
1987b8d6 BV	108	src = l->data;
1987b8d6 BV	109	switch (src->key) {
1953564a	110	case SR_CONF_CONN:
e46aa4f6	111	conn = g_variant_get_string(src->data, NULL);
0aba65da	112	break;
1953564a	113	case SR_CONF_SERIALCOMM:
e46aa4f6	114	serialcomm = g_variant_get_string(src->data, NULL);
0aba65da UH	115	break;
	116	}
	117	}
	118	if (!conn)
	119	return NULL;
	120
98fec29e	121	if (!serialcomm)
0aba65da UH	122	serialcomm = SERIALCOMM;
0aba65da UH	123
91219afc	124	serial = sr_serial_dev_inst_new(conn, serialcomm);
0aba65da UH	125
	126	/* The discovery procedure is like this: first send the Reset
	127	* command (0x00) 5 times, since the device could be anywhere
	128	* in a 5-byte command. Then send the ID command (0x02).
	129	* If the device responds with 4 bytes ("OLS1" or "SLA1"), we
	130	* have a match.
	131	*/
	132	sr_info("Probing %s.", conn);
4ded59ee	133	if (serial_open(serial, SERIAL_RDWR) != SR_OK)
0aba65da UH	134	return NULL;
	135
	136	ret = SR_OK;
	137	for (i = 0; i < 5; i++) {
	138	if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
	139	sr_err("Port %s is not writable.", conn);
	140	break;
	141	}
	142	}
	143	if (ret != SR_OK) {
	144	serial_close(serial);
	145	sr_err("Could not use port %s. Quitting.", conn);
	146	return NULL;
	147	}
	148	send_shortcommand(serial, CMD_ID);
	149
1a46cc62	150	g_usleep(RESPONSE_DELAY_US);
0aba65da	151
ed936ccc UH	152	if (sp_input_waiting(serial->data) == 0) {
ed936ccc UH	153	sr_dbg("Didn't get any reply.");
0aba65da	154	return NULL;
ed936ccc UH	155	}
	156
	157	ret = serial_read_blocking(serial, buf, 4, serial_timeout(serial, 4));
	158	if (ret != 4) {
	159	sr_err("Invalid reply (expected 4 bytes, got %d).", ret);
0aba65da	160	return NULL;
ed936ccc UH	161	}
	162
	163	if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) {
	164	sr_err("Invalid reply (expected '1SLO' or '1ALS', got "
	165	"'%c%c%c%c').", buf[0], buf[1], buf[2], buf[3]);
0aba65da	166	return NULL;
ed936ccc	167	}
0aba65da UH	168
	169	/* Definitely using the OLS protocol, check if it supports
	170	* the metadata command.
	171	*/
	172	send_shortcommand(serial, CMD_METADATA);
ed936ccc	173
1a46cc62	174	g_usleep(RESPONSE_DELAY_US);
ed936ccc UH	175
ed936ccc UH	176	if (sp_input_waiting(serial->data) != 0) {
0aba65da UH	177	/* Got metadata. */
0aba65da UH	178	sdi = get_metadata(serial);
0aba65da UH	179	} else {
0aba65da UH	180	/* Not an OLS -- some other board that uses the sump protocol. */
72cd99b8	181	sr_info("Device does not support metadata.");
aac29cc1	182	sdi = g_malloc0(sizeof(struct sr_dev_inst));
0af636be UH	183	sdi->status = SR_ST_INACTIVE;
	184	sdi->vendor = g_strdup("Sump");
	185	sdi->model = g_strdup("Logic Analyzer");
	186	sdi->version = g_strdup("v1.0");
0aba65da	187	sdi->driver = di;
07ffa5b3	188	for (i = 0; i < ARRAY_SIZE(ols_channel_names); i++)
5e23fcab	189	sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE,
c368e6f3	190	ols_channel_names[i]);
e57057ae	191	sdi->priv = ols_dev_new();
0aba65da	192	}
bf256783 BV	193	/* Configure samplerate and divider. */
	194	if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
	195	sr_dbg("Failed to set default samplerate (%"PRIu64").",
	196	DEFAULT_SAMPLERATE);
459a0f26 BV	197	sdi->inst_type = SR_INST_SERIAL;
459a0f26 BV	198	sdi->conn = serial;
bf256783	199
0aba65da UH	200	drvc->instances = g_slist_append(drvc->instances, sdi);
	201	devices = g_slist_append(devices, sdi);
	202
	203	serial_close(serial);
	204
	205	return devices;
	206	}
	207
584560f1	208	static int config_get(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	209	const struct sr_channel_group *cg)
0aba65da UH	210	{
	211	struct dev_context *devc;
	212
53b4680f	213	(void)cg;
8f996b89	214
0c05591a BV	215	if (!sdi)
	216	return SR_ERR_ARG;
	217
	218	devc = sdi->priv;
584560f1	219	switch (key) {
123e1313	220	case SR_CONF_SAMPLERATE:
0c05591a BV	221	*data = g_variant_new_uint64(devc->cur_samplerate);
	222	break;
	223	case SR_CONF_CAPTURE_RATIO:
	224	*data = g_variant_new_uint64(devc->capture_ratio);
	225	break;
	226	case SR_CONF_LIMIT_SAMPLES:
	227	*data = g_variant_new_uint64(devc->limit_samples);
	228	break;
967760a8 MR	229	case SR_CONF_PATTERN_MODE:
	230	if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
	231	*data = g_variant_new_string(STR_PATTERN_EXTERNAL);
	232	else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
	233	*data = g_variant_new_string(STR_PATTERN_INTERNAL);
6d16fdfb BV	234	else
6d16fdfb BV	235	*data = g_variant_new_string(STR_PATTERN_NONE);
967760a8	236	break;
0c05591a BV	237	case SR_CONF_RLE:
0c05591a BV	238	*data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
7730e4f0	239	break;
0aba65da	240	default:
bd6fbf62	241	return SR_ERR_NA;
0aba65da UH	242	}
	243
	244	return SR_OK;
	245	}
	246
584560f1	247	static int config_set(uint32_t key, GVariant data, const struct sr_dev_inst sdi,
53b4680f	248	const struct sr_channel_group *cg)
0aba65da UH	249	{
0aba65da UH	250	struct dev_context *devc;
6d16fdfb	251	uint16_t flag;
e46aa4f6	252	uint64_t tmp_u64;
6d16fdfb	253	int ret;
967760a8	254	const char *stropt;
0aba65da	255
53b4680f	256	(void)cg;
8f996b89	257
e73ffd42 BV	258	if (sdi->status != SR_ST_ACTIVE)
	259	return SR_ERR_DEV_CLOSED;
	260
0aba65da UH	261	devc = sdi->priv;
0aba65da UH	262
584560f1	263	switch (key) {
1953564a	264	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	265	tmp_u64 = g_variant_get_uint64(data);
	266	if (tmp_u64 < samplerates[0] \|\| tmp_u64 > samplerates[1])
	267	return SR_ERR_SAMPLERATE;
	268	ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
0aba65da	269	break;
1953564a	270	case SR_CONF_LIMIT_SAMPLES:
e46aa4f6 BV	271	tmp_u64 = g_variant_get_uint64(data);
e46aa4f6 BV	272	if (tmp_u64 < MIN_NUM_SAMPLES)
0aba65da	273	return SR_ERR;
e46aa4f6	274	devc->limit_samples = tmp_u64;
0aba65da UH	275	ret = SR_OK;
0aba65da UH	276	break;
1953564a	277	case SR_CONF_CAPTURE_RATIO:
e46aa4f6	278	devc->capture_ratio = g_variant_get_uint64(data);
a5c38703	279	if (devc->capture_ratio < 0 \|\| devc->capture_ratio > 100)
0aba65da	280	ret = SR_ERR;
a5c38703	281	else
0aba65da UH	282	ret = SR_OK;
0aba65da UH	283	break;
eb1b610b MR	284	case SR_CONF_EXTERNAL_CLOCK:
	285	if (g_variant_get_boolean(data)) {
	286	sr_info("Enabling external clock.");
	287	devc->flag_reg \|= FLAG_CLOCK_EXTERNAL;
	288	} else {
	289	sr_info("Disabled external clock.");
	290	devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
	291	}
	292	ret = SR_OK;
	293	break;
967760a8 MR	294	case SR_CONF_PATTERN_MODE:
	295	stropt = g_variant_get_string(data, NULL);
	296	ret = SR_OK;
6d16fdfb BV	297	flag = 0xffff;
	298	if (!strcmp(stropt, STR_PATTERN_NONE)) {
	299	sr_info("Disabling test modes.");
	300	flag = 0x0000;
	301	}else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
967760a8	302	sr_info("Enabling internal test mode.");
6d16fdfb	303	flag = FLAG_INTERNAL_TEST_MODE;
967760a8 MR	304	} else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
967760a8 MR	305	sr_info("Enabling external test mode.");
6d16fdfb	306	flag = FLAG_EXTERNAL_TEST_MODE;
967760a8 MR	307	} else {
	308	ret = SR_ERR;
	309	}
6d16fdfb BV	310	if (flag != 0xffff) {
	311	devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE \| FLAG_EXTERNAL_TEST_MODE);
	312	devc->flag_reg \|= flag;
	313	}
967760a8	314	break;
7b0a57fd MR	315	case SR_CONF_SWAP:
	316	if (g_variant_get_boolean(data)) {
	317	sr_info("Enabling channel swapping.");
3f239f08	318	devc->flag_reg \|= FLAG_SWAP_CHANNELS;
7b0a57fd MR	319	} else {
7b0a57fd MR	320	sr_info("Disabling channel swapping.");
3f239f08	321	devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
7b0a57fd MR	322	}
	323	ret = SR_OK;
	324	break;
	325
1953564a	326	case SR_CONF_RLE:
e46aa4f6	327	if (g_variant_get_boolean(data)) {
0aba65da UH	328	sr_info("Enabling RLE.");
0aba65da UH	329	devc->flag_reg \|= FLAG_RLE;
aeea0572 BV	330	} else {
	331	sr_info("Disabling RLE.");
	332	devc->flag_reg &= ~FLAG_RLE;
0aba65da UH	333	}
	334	ret = SR_OK;
	335	break;
	336	default:
bd6fbf62	337	ret = SR_ERR_NA;
0aba65da UH	338	}
	339
	340	return ret;
	341	}
	342
584560f1	343	static int config_list(uint32_t key, GVariant *data, const struct sr_dev_inst sdi,
53b4680f	344	const struct sr_channel_group *cg)
a1c743fc	345	{
f0de2dd0 BV	346	struct dev_context *devc;
f0de2dd0 BV	347	GVariant gvar, grange[2];
e46aa4f6	348	GVariantBuilder gvb;
91fd0f72	349	int num_ols_changrp, i;
a1c743fc	350
53b4680f	351	(void)cg;
a1c743fc BV	352
a1c743fc BV	353	switch (key) {
0d485e30	354	case SR_CONF_SCAN_OPTIONS:
584560f1	355	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
a0e0bb41	356	scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
0d485e30	357	break;
9a6517d1	358	case SR_CONF_DEVICE_OPTIONS:
63ea6141 BV	359	if (!sdi)
	360	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	361	drvopts, ARRAY_SIZE(drvopts), sizeof(uint32_t));
	362	else
	363	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
	364	devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
9a6517d1	365	break;
a1c743fc	366	case SR_CONF_SAMPLERATE:
e46aa4f6 BV	367	g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
	368	gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
	369	ARRAY_SIZE(samplerates), sizeof(uint64_t));
	370	g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
	371	*data = g_variant_builder_end(&gvb);
a1c743fc	372	break;
91fd0f72 BV	373	case SR_CONF_TRIGGER_MATCH:
	374	*data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
	375	trigger_matches, ARRAY_SIZE(trigger_matches),
	376	sizeof(int32_t));
c50277a6	377	break;
7c07a178 UH	378	case SR_CONF_PATTERN_MODE:
	379	*data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
	380	break;
f0de2dd0 BV	381	case SR_CONF_LIMIT_SAMPLES:
	382	if (!sdi)
	383	return SR_ERR_ARG;
	384	devc = sdi->priv;
	385	if (devc->flag_reg & FLAG_RLE)
	386	return SR_ERR_NA;
	387	if (devc->max_samples == 0)
	388	/* Device didn't specify sample memory size in metadata. */
	389	return SR_ERR_NA;
	390	/*
ba7dd8bb	391	* Channel groups are turned off if no channels in that group are
f0de2dd0 BV	392	* enabled, making more room for samples for the enabled group.
f0de2dd0 BV	393	*/
91fd0f72 BV	394	ols_channel_mask(sdi);
91fd0f72 BV	395	num_ols_changrp = 0;
f0de2dd0	396	for (i = 0; i < 4; i++) {
ba7dd8bb	397	if (devc->channel_mask & (0xff << (i * 8)))
91fd0f72	398	num_ols_changrp++;
1e1dac0c	399	}
f0de2dd0	400	grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
91fd0f72 BV	401	if (num_ols_changrp)
	402	grange[1] = g_variant_new_uint64(devc->max_samples / num_ols_changrp);
	403	else
	404	grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
f0de2dd0 BV	405	*data = g_variant_new_tuple(grange, 2);
f0de2dd0 BV	406	break;
a1c743fc	407	default:
bd6fbf62	408	return SR_ERR_NA;
a1c743fc BV	409	}
	410
	411	return SR_OK;
	412	}
	413
016e72f3 BV	414	static int set_trigger(const struct sr_dev_inst *sdi, int stage)
	415	{
	416	struct dev_context *devc;
	417	struct sr_serial_dev_inst *serial;
	418	uint8_t cmd, arg[4];
	419
	420	devc = sdi->priv;
	421	serial = sdi->conn;
	422
	423	cmd = CMD_SET_TRIGGER_MASK + stage * 4;
	424	arg[0] = devc->trigger_mask[stage] & 0xff;
	425	arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
	426	arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
	427	arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
	428	if (send_longcommand(serial, cmd, arg) != SR_OK)
	429	return SR_ERR;
	430
	431	cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
	432	arg[0] = devc->trigger_value[stage] & 0xff;
	433	arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
	434	arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
	435	arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
	436	if (send_longcommand(serial, cmd, arg) != SR_OK)
	437	return SR_ERR;
	438
	439	cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
	440	arg[0] = arg[1] = arg[3] = 0x00;
	441	arg[2] = stage;
	442	if (stage == devc->num_stages)
	443	/* Last stage, fire when this one matches. */
	444	arg[3] \|= TRIGGER_START;
	445	if (send_longcommand(serial, cmd, arg) != SR_OK)
	446	return SR_ERR;
	447
	448	return SR_OK;
	449	}
	450
695dc859	451	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
0aba65da	452	{
0aba65da	453	struct dev_context *devc;
459a0f26	454	struct sr_serial_dev_inst *serial;
32f09bfd	455	uint16_t samplecount, readcount, delaycount;
91fd0f72 BV	456	uint8_t ols_changrp_mask, arg[4];
91fd0f72 BV	457	int num_ols_changrp;
016e72f3	458	int ret, i;
0aba65da	459
e73ffd42 BV	460	if (sdi->status != SR_ST_ACTIVE)
	461	return SR_ERR_DEV_CLOSED;
	462
0aba65da	463	devc = sdi->priv;
459a0f26	464	serial = sdi->conn;
0aba65da	465
91fd0f72	466	ols_channel_mask(sdi);
0aba65da	467
91fd0f72 BV	468	num_ols_changrp = 0;
91fd0f72 BV	469	ols_changrp_mask = 0;
0aba65da	470	for (i = 0; i < 4; i++) {
ba7dd8bb	471	if (devc->channel_mask & (0xff << (i * 8))) {
91fd0f72 BV	472	ols_changrp_mask \|= (1 << i);
91fd0f72 BV	473	num_ols_changrp++;
0aba65da UH	474	}
	475	}
	476
	477	/*
	478	* Limit readcount to prevent reading past the end of the hardware
	479	* buffer.
	480	*/
91fd0f72	481	samplecount = MIN(devc->max_samples / num_ols_changrp, devc->limit_samples);
32f09bfd	482	readcount = samplecount / 4;
016e72f3 BV	483
	484	/* Rather read too many samples than too few. */
	485	if (samplecount % 4 != 0)
32f09bfd	486	readcount++;
0aba65da	487
016e72f3	488	/* Basic triggers. */
91fd0f72 BV	489	if (ols_convert_trigger(sdi) != SR_OK) {
	490	sr_err("Failed to configure channels.");
	491	return SR_ERR;
	492	}
	493	if (devc->num_stages > 0) {
0aba65da UH	494	delaycount = readcount * (1 - devc->capture_ratio / 100.0);
0aba65da UH	495	devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
016e72f3	496	for (i = 0; i <= devc->num_stages; i++) {
91fd0f72	497	sr_dbg("Setting OLS stage %d trigger.", i);
016e72f3 BV	498	if ((ret = set_trigger(sdi, i)) != SR_OK)
	499	return ret;
	500	}
0aba65da	501	} else {
016e72f3 BV	502	/* No triggers configured, force trigger on first stage. */
	503	sr_dbg("Forcing trigger at stage 0.");
	504	if ((ret = set_trigger(sdi, 0)) != SR_OK)
	505	return ret;
0aba65da UH	506	delaycount = readcount;
	507	}
	508
6d16fdfb	509	/* Samplerate. */
016e72f3	510	sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
6d16fdfb	511	devc->cur_samplerate, devc->cur_samplerate_divider);
016e72f3 BV	512	arg[0] = devc->cur_samplerate_divider & 0xff;
	513	arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
	514	arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
	515	arg[3] = 0x00;
	516	if (send_longcommand(serial, CMD_SET_DIVIDER, arg) != SR_OK)
0aba65da UH	517	return SR_ERR;
	518
	519	/* Send sample limit and pre/post-trigger capture ratio. */
016e72f3	520	sr_dbg("Setting sample limit %d, trigger point at %d",
6d16fdfb	521	(readcount - 1) * 4, (delaycount - 1) * 4);
016e72f3 BV	522	arg[0] = ((readcount - 1) & 0xff);
	523	arg[1] = ((readcount - 1) & 0xff00) >> 8;
	524	arg[2] = ((delaycount - 1) & 0xff);
	525	arg[3] = ((delaycount - 1) & 0xff00) >> 8;
	526	if (send_longcommand(serial, CMD_CAPTURE_SIZE, arg) != SR_OK)
0aba65da UH	527	return SR_ERR;
0aba65da UH	528
6d16fdfb	529	/* Flag register. */
625763e2 BV	530	sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
625763e2 BV	531	devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
6d16fdfb	532	devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
625763e2 BV	533	devc->flag_reg & FLAG_RLE ? "on" : "off",
	534	devc->flag_reg & FLAG_FILTER ? "on": "off",
	535	devc->flag_reg & FLAG_DEMUX ? "on" : "off");
91fd0f72 BV	536	/*
	537	* Enable/disable OLS channel groups in the flag register according
	538	* to the channel mask. 1 means "disable channel".
	539	*/
	540	devc->flag_reg \|= ~(ols_changrp_mask << 2) & 0x3c;
016e72f3 BV	541	arg[0] = devc->flag_reg & 0xff;
	542	arg[1] = devc->flag_reg >> 8;
	543	arg[2] = arg[3] = 0x00;
	544	if (send_longcommand(serial, CMD_SET_FLAGS, arg) != SR_OK)
0aba65da UH	545	return SR_ERR;
	546
	547	/* Start acquisition on the device. */
459a0f26	548	if (send_shortcommand(serial, CMD_RUN) != SR_OK)
0aba65da UH	549	return SR_ERR;
0aba65da UH	550
bf256783	551	/* Reset all operational states. */
6d16fdfb BV	552	devc->rle_count = devc->num_transfers = 0;
6d16fdfb BV	553	devc->num_samples = devc->num_bytes = 0;
625763e2	554	devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
abb39e6b	555	memset(devc->sample, 0, 4);
bf256783	556
695dc859	557	std_session_send_df_header(sdi, LOG_PREFIX);
4afdfd46	558
8105e829 DE	559	/* If the device stops sending for longer than it takes to send a byte,
	560	* that means it's finished. But wait at least 100 ms to be safe.
	561	*/
	562	serial_source_add(sdi->session, serial, G_IO_IN, 100,
695dc859	563	ols_receive_data, (struct sr_dev_inst *)sdi);
0aba65da	564
0aba65da UH	565	return SR_OK;
	566	}
	567
695dc859	568	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
0aba65da	569	{
0aba65da UH	570	abort_acquisition(sdi);
	571
	572	return SR_OK;
	573	}
	574
	575	SR_PRIV struct sr_dev_driver ols_driver_info = {
	576	.name = "ols",
	577	.longname = "Openbench Logic Sniffer",
	578	.api_version = 1,
c2fdcc25	579	.init = std_init,
700d6b64	580	.cleanup = std_cleanup,
03f4de8c	581	.scan = scan,
c01bf34c	582	.dev_list = std_dev_list,
a6630742	583	.dev_clear = NULL,
035a1078 BV	584	.config_get = config_get,
035a1078 BV	585	.config_set = config_set,
a1c743fc	586	.config_list = config_list,
854434de	587	.dev_open = std_serial_dev_open,
bf2c987f	588	.dev_close = std_serial_dev_close,
03f4de8c BV	589	.dev_acquisition_start = dev_acquisition_start,
03f4de8c BV	590	.dev_acquisition_stop = dev_acquisition_stop,
41812aca	591	.context = NULL,
0aba65da	592	};