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kingst-la2016: rework the device side of PWM configuration
[libsigrok.git] / src / hardware / kingst-la2016 / protocol.h
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
5 * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
6 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
7 * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
8 *
9 * This program is free software: you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation, either version 3 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
24#define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
25
f2cd2deb 26#include <libsigrok/libsigrok.h>
a7740b06 27#include <stdint.h>
f2cd2deb 28
e9430410 29#define LOG_PREFIX "kingst-la2016"
f2cd2deb 30
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31#define LA2016_VID 0x77a1
32#define LA2016_PID 0x01a2
852c7d14 33#define LA2016_IPRODUCT_INDEX 2
f2cd2deb 34#define USB_INTERFACE 0
40a0b2f4 35#define USB_CONFIGURATION 1
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36#define USB_EP_FPGA_BITSTREAM 2
37#define USB_EP_CAPTURE_DATA 6
f2cd2deb 38
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39/*
40 * On Windows sigrok uses WinUSB RAW_IO policy which requires the
41 * USB transfer buffer size to be a multiple of the endpoint max packet
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42 * size, which is 512 bytes in this case. Also, the maximum allowed size
43 * of the transfer buffer is normally read from WinUSB_GetPipePolicy API
44 * but libusb does not expose this function. Typically, max size is 2MB.
e847645b 45 */
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46#define LA2016_EP6_PKTSZ 512 /* Max packet size of USB endpoint 6. */
47#define LA2016_USB_BUFSZ (256 * 2 * LA2016_EP6_PKTSZ) /* 256KiB buffer. */
e847645b 48
22cb067a 49/* USB communication timeout during regular operation. */
e9430410 50#define DEFAULT_TIMEOUT_MS 200
f2cd2deb 51
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52/*
53 * Check for MCU firmware to take effect after upload. Check the device
54 * presence for a maximum period of time, delay between checks in that
55 * phase. Allow for the device to vanish after upload and before checks,
56 * to not mistake its earlier incarnation for the successful operation
57 * of the most recently loaded firmware.
58 */
59#define RENUM_CHECK_PERIOD_MS 3000
60#define RENUM_GONE_DELAY_MS 1800
61#define RENUM_POLL_INTERVAL_MS 200
62
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63/*
64 * The device expects some zero padding to follow the content of the
65 * file which contains the FPGA bitstream. Specify the chunk size here.
66 */
67#define LA2016_EP2_PADDING 2048
68
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69#define LA2016_THR_VOLTAGE_MIN 0.40
70#define LA2016_THR_VOLTAGE_MAX 4.00
f2cd2deb 71
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72#define LA2016_NUM_SAMPLES_MAX (UINT64_C(10 * 1000 * 1000 * 1000))
73
74/* Maximum device capabilities. May differ between models. */
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75#define MAX_PWM_FREQ SR_MHZ(20)
76#define PWM_CLOCK SR_MHZ(200) /* 200MHz for both LA2016 and LA1016 */
77
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78#define LA2016_NUM_PWMCH_MAX 2
79
80#define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024)
81
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82struct kingst_model {
83 uint8_t magic; /* EEPROM magic byte value. */
84 const char *name; /* User perceived model name. */
85 const char *fpga_stem; /* Bitstream filename stem. */
86 uint64_t samplerate; /* Max samplerate in Hz. */
87 size_t channel_count; /* Max channel count (16, 32). */
88 uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */
89};
90
66f5f697 91struct trigger_cfg {
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92 uint32_t channels;
93 uint32_t enabled;
94 uint32_t level;
95 uint32_t high_or_falling;
66f5f697 96};
f2cd2deb 97
66f5f697 98struct capture_info {
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99 uint32_t n_rep_packets;
100 uint32_t n_rep_packets_before_trigger;
101 uint32_t write_pos;
66f5f697 102};
f2cd2deb 103
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104#define NUM_PACKETS_IN_CHUNK 5
105#define TRANSFER_PACKET_LENGTH 16
f2cd2deb 106
f2cd2deb 107struct dev_context {
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108 uint16_t usb_pid;
109 char *mcu_firmware;
110 char *fpga_bitstream;
520a20e9 111 uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */
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112 uint8_t identify_magic;
113 const struct kingst_model *model;
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114
115 /* User specified parameters. */
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116 struct pwm_setting {
117 gboolean enabled;
118 float freq;
119 float duty;
120 } pwm_setting[LA2016_NUM_PWMCH_MAX];
5eb1b63d 121 size_t threshold_voltage_idx;
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122 float threshold_voltage;
123 uint64_t cur_samplerate;
a38f0f5e 124 struct sr_sw_limits sw_limits;
f2cd2deb 125 uint64_t capture_ratio;
f2cd2deb 126
96dc954e 127 /* Internal acquisition and download state. */
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128 gboolean trigger_involved;
129 gboolean completion_seen;
130 gboolean download_finished;
66f5f697 131 struct capture_info info;
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132 uint32_t n_transfer_packets_to_read; /* each with 5 acq packets */
133 uint32_t n_bytes_to_read;
134 uint32_t n_reps_until_trigger;
cf057ac4 135 gboolean trigger_marked;
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136 uint64_t total_samples;
137 uint32_t read_pos;
138
a38f0f5e 139 struct feed_queue_logic *feed_queue;
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140 struct libusb_transfer *transfer;
141};
142
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143SR_PRIV int la2016_upload_firmware(const struct sr_dev_inst *sdi,
144 struct sr_context *sr_ctx, libusb_device *dev, uint16_t product_id);
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145SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi);
146SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
f2cd2deb 147SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
388438e4 148SR_PRIV int la2016_receive_data(int fd, int revents, void *cb_data);
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149SR_PRIV int la2016_identify_device(const struct sr_dev_inst *sdi,
150 gboolean show_message);
6d53e949 151SR_PRIV int la2016_init_hardware(const struct sr_dev_inst *sdi);
6d53e949 152SR_PRIV int la2016_deinit_hardware(const struct sr_dev_inst *sdi);
08a49848 153SR_PRIV int la2016_write_pwm_config(const struct sr_dev_inst *sdi, size_t idx);
f2cd2deb 154
f2cd2deb 155#endif