[libsigrok.git] / src / hardware / asix-sigma / api.c

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#include <config.h>
#include "protocol.h"

/*
 * Channel numbers seem to go from 1-16, according to this image:
 * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
 * (the cable has two additional GND pins, and a TI and TO pin)
 */
static const char *channel_names[] = {
	"1", "2", "3", "4", "5", "6", "7", "8",
	"9", "10", "11", "12", "13", "14", "15", "16",
};

static const uint32_t scanopts[] = {
	SR_CONF_CONN,
};

static const uint32_t drvopts[] = {
	SR_CONF_LOGIC_ANALYZER,
};

static const uint32_t devopts[] = {
	SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET,
	SR_CONF_CONN | SR_CONF_GET,
	SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
#if ASIX_SIGMA_WITH_TRIGGER
	SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
	SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
#endif
};

#if ASIX_SIGMA_WITH_TRIGGER
static const int32_t trigger_matches[] = {
	SR_TRIGGER_ZERO,
	SR_TRIGGER_ONE,
	SR_TRIGGER_RISING,
	SR_TRIGGER_FALLING,
};
#endif

static void clear_helper(struct dev_context *devc)
{
	ftdi_deinit(&devc->ftdic);
}

static int dev_clear(const struct sr_dev_driver *di)
{
	return std_dev_clear_with_callback(di,
		(std_dev_clear_callback)clear_helper);
}

static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
{
	struct sr_usb_dev_inst *usb;

	for (/* EMPTY */; devs; devs = devs->next) {
		usb = devs->data;
		if (usb->bus == bus && usb->address == addr)
			return TRUE;
	}

	return FALSE;
}

static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
{
	gboolean is_sigma, is_omega;

	if (des->idVendor != USB_VENDOR_ASIX)
		return FALSE;
	is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
	is_omega = des->idProduct == USB_PRODUCT_OMEGA;
	if (!is_sigma && !is_omega)
		return FALSE;
	return TRUE;
}

static GSList *scan(struct sr_dev_driver *di, GSList *options)
{
	struct drv_context *drvc;
	libusb_context *usbctx;
	const char *conn;
	GSList *l, *conn_devices;
	struct sr_config *src;
	GSList *devices;
	libusb_device **devlist, *devitem;
	int bus, addr;
	struct libusb_device_descriptor des;
	struct libusb_device_handle *hdl;
	int ret;
	char conn_id[20];
	char serno_txt[16];
	char *end;
	long serno_num, serno_pre;
	enum asix_device_type dev_type;
	const char *dev_text;
	struct sr_dev_inst *sdi;
	struct dev_context *devc;
	size_t devidx, chidx;

	drvc = di->context;
	usbctx = drvc->sr_ctx->libusb_ctx;

	/* Find all devices which match an (optional) conn= spec. */
	conn = NULL;
	for (l = options; l; l = l->next) {
		src = l->data;
		switch (src->key) {
		case SR_CONF_CONN:
			conn = g_variant_get_string(src->data, NULL);
			break;
		}
	}
	conn_devices = NULL;
	if (conn)
		conn_devices = sr_usb_find(usbctx, conn);
	if (conn && !conn_devices)
		return NULL;

	/* Find all ASIX logic analyzers (which match the connection spec). */
	devices = NULL;
	libusb_get_device_list(usbctx, &devlist);
	for (devidx = 0; devlist[devidx]; devidx++) {
		devitem = devlist[devidx];

		/* Check for connection match if a user spec was given. */
		bus = libusb_get_bus_number(devitem);
		addr = libusb_get_device_address(devitem);
		if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
			continue;
		snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);

		/*
		 * Check for known VID:PID pairs. Get the serial number,
		 * to then derive the device type from it.
		 */
		libusb_get_device_descriptor(devitem, &des);
		if (!known_vid_pid(&des))
			continue;
		if (!des.iSerialNumber) {
			sr_warn("Cannot get serial number (index 0).");
			continue;
		}
		ret = libusb_open(devitem, &hdl);
		if (ret < 0) {
			sr_warn("Cannot open USB device %04x.%04x: %s.",
				des.idVendor, des.idProduct,
				libusb_error_name(ret));
			continue;
		}
		ret = libusb_get_string_descriptor_ascii(hdl,
			des.iSerialNumber,
			(unsigned char *)serno_txt, sizeof(serno_txt));
		if (ret < 0) {
			sr_warn("Cannot get serial number (%s).",
				libusb_error_name(ret));
			libusb_close(hdl);
			continue;
		}
		libusb_close(hdl);

		/*
		 * All ASIX logic analyzers have a serial number, which
		 * reads as a hex number, and tells the device type.
		 */
		ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
		if (ret != SR_OK || !end || *end) {
			sr_warn("Cannot interpret serial number %s.", serno_txt);
			continue;
		}
		dev_type = ASIX_TYPE_NONE;
		dev_text = NULL;
		serno_pre = serno_num >> 16;
		switch (serno_pre) {
		case 0xa601:
			dev_type = ASIX_TYPE_SIGMA;
			dev_text = "SIGMA";
			sr_info("Found SIGMA, serno %s.", serno_txt);
			break;
		case 0xa602:
			dev_type = ASIX_TYPE_SIGMA;
			dev_text = "SIGMA2";
			sr_info("Found SIGMA2, serno %s.", serno_txt);
			break;
		case 0xa603:
			dev_type = ASIX_TYPE_OMEGA;
			dev_text = "OMEGA";
			sr_info("Found OMEGA, serno %s.", serno_txt);
			if (!ASIX_WITH_OMEGA) {
				sr_warn("OMEGA support is not implemented yet.");
				continue;
			}
			break;
		default:
			sr_warn("Unknown serno %s, skipping.", serno_txt);
			continue;
		}

		/* Create a device instance, add it to the result set. */

		sdi = g_malloc0(sizeof(*sdi));
		devices = g_slist_append(devices, sdi);
		sdi->status = SR_ST_INITIALIZING;
		sdi->vendor = g_strdup("ASIX");
		sdi->model = g_strdup(dev_text);
		sdi->serial_num = g_strdup(serno_txt);
		sdi->connection_id = g_strdup(conn_id);
		for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
			sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
				TRUE, channel_names[chidx]);

		devc = g_malloc0(sizeof(*devc));
		sdi->priv = devc;
		devc->id.vid = des.idVendor;
		devc->id.pid = des.idProduct;
		devc->id.serno = serno_num;
		devc->id.prefix = serno_pre;
		devc->id.type = dev_type;
		devc->samplerate = samplerates[0];
		sr_sw_limits_init(&devc->cfg_limits);
		devc->firmware_idx = SIGMA_FW_NONE;
		devc->capture_ratio = 50;
		devc->use_triggers = 0;
	}
	libusb_free_device_list(devlist, 1);
	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);

	return std_scan_complete(di, devices);
}

static int dev_open(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	long vid, pid;
	const char *serno;
	int ret;

	devc = sdi->priv;

	if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
		sr_err("OMEGA support is not implemented yet.");
		return SR_ERR_NA;
	}
	vid = devc->id.vid;
	pid = devc->id.pid;
	serno = sdi->serial_num;

	ret = ftdi_init(&devc->ftdic);
	if (ret < 0) {
		sr_err("Cannot initialize FTDI context (%d): %s.",
			ret, ftdi_get_error_string(&devc->ftdic));
		return SR_ERR_IO;
	}
	ret = ftdi_usb_open_desc_index(&devc->ftdic, vid, pid, NULL, serno, 0);
	if (ret < 0) {
		sr_err("Cannot open device (%d): %s.",
			ret, ftdi_get_error_string(&devc->ftdic));
		return SR_ERR_IO;
	}

	return SR_OK;
}

static int dev_close(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	int ret;

	devc = sdi->priv;

	ret = ftdi_usb_close(&devc->ftdic);
	ftdi_deinit(&devc->ftdic);

	return (ret == 0) ? SR_OK : SR_ERR;
}

static int config_get(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc;

	(void)cg;

	if (!sdi)
		return SR_ERR;
	devc = sdi->priv;

	switch (key) {
	case SR_CONF_CONN:
		*data = g_variant_new_string(sdi->connection_id);
		break;
	case SR_CONF_SAMPLERATE:
		*data = g_variant_new_uint64(devc->samplerate);
		break;
	case SR_CONF_LIMIT_MSEC:
	case SR_CONF_LIMIT_SAMPLES:
		return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		*data = g_variant_new_uint64(devc->capture_ratio);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_set(uint32_t key, GVariant *data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	struct dev_context *devc;
	int ret;
	uint64_t want_rate, have_rate;

	(void)cg;

	devc = sdi->priv;

	switch (key) {
	case SR_CONF_SAMPLERATE:
		want_rate = g_variant_get_uint64(data);
		ret = sigma_normalize_samplerate(want_rate, &have_rate);
		if (ret != SR_OK)
			return ret;
		if (have_rate != want_rate) {
			char *text_want, *text_have;
			text_want = sr_samplerate_string(want_rate);
			text_have = sr_samplerate_string(have_rate);
			sr_info("Adjusted samplerate %s to %s.",
				text_want, text_have);
			g_free(text_want);
			g_free(text_have);
		}
		devc->samplerate = have_rate;
		break;
	case SR_CONF_LIMIT_MSEC:
	case SR_CONF_LIMIT_SAMPLES:
		return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_CAPTURE_RATIO:
		devc->capture_ratio = g_variant_get_uint64(data);
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int config_list(uint32_t key, GVariant **data,
	const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
{
	switch (key) {
	case SR_CONF_SCAN_OPTIONS:
	case SR_CONF_DEVICE_OPTIONS:
		if (cg)
			return SR_ERR_NA;
		return STD_CONFIG_LIST(key, data, sdi, cg,
			scanopts, drvopts, devopts);
	case SR_CONF_SAMPLERATE:
		*data = std_gvar_samplerates(samplerates, samplerates_count);
		break;
#if ASIX_SIGMA_WITH_TRIGGER
	case SR_CONF_TRIGGER_MATCH:
		*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
		break;
#endif
	default:
		return SR_ERR_NA;
	}

	return SR_OK;
}

static int dev_acquisition_start(const struct sr_dev_inst *sdi)
{
	struct dev_context *devc;
	struct clockselect_50 clockselect;
	int triggerpin, ret;
	uint8_t triggerselect;
	struct triggerinout triggerinout_conf;
	struct triggerlut lut;
	uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
	size_t count;

	devc = sdi->priv;

	/*
	 * Setup the device's samplerate from the value which up to now
	 * just got checked and stored. As a byproduct this can pick and
	 * send firmware to the device, reduce the number of available
	 * logic channels, etc.
	 *
	 * Determine an acquisition timeout from optionally configured
	 * sample count or time limits. Which depends on the samplerate.
	 */
	ret = sigma_set_samplerate(sdi);
	if (ret != SR_OK)
		return ret;
	ret = sigma_set_acquire_timeout(devc);
	if (ret != SR_OK)
		return ret;

	if (sigma_convert_trigger(sdi) != SR_OK) {
		sr_err("Failed to configure triggers.");
		return SR_ERR;
	}

	/* Enter trigger programming mode. */
	sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x20);

	triggerselect = 0;
	if (devc->samplerate >= SR_MHZ(100)) {
		/* 100 and 200 MHz mode. */
		sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);

		/* Find which pin to trigger on from mask. */
		for (triggerpin = 0; triggerpin < 8; triggerpin++) {
			if (devc->trigger.risingmask & (1 << triggerpin))
				break;
			if (devc->trigger.fallingmask & (1 << triggerpin))
				break;
		}

		/* Set trigger pin and light LED on trigger. */
		triggerselect = TRGSEL2_LEDSEL1 | (triggerpin & 0x7);

		/* Default rising edge. */
		if (devc->trigger.fallingmask)
			triggerselect |= 1 << 3;

	} else if (devc->samplerate <= SR_MHZ(50)) {
		/* All other modes. */
		sigma_build_basic_trigger(devc, &lut);

		sigma_write_trigger_lut(devc, &lut);

		triggerselect = TRGSEL2_LEDSEL1 | TRGSEL2_LEDSEL0;
	}

	/* Setup trigger in and out pins to default values. */
	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	triggerinout_conf.trgout_bytrigger = 1;
	triggerinout_conf.trgout_enable = 1;
	/* TODO
	 * Verify the correctness of this implementation. The previous
	 * version used to assign to a C language struct with bit fields
	 * which is highly non-portable and hard to guess the resulting
	 * raw memory layout or wire transfer content. The C struct's
	 * field names did not match the vendor documentation's names.
	 * Which means that I could not verify "on paper" either. Let's
	 * re-visit this code later during research for trigger support.
	 */
	wrptr = trgconf_bytes;
	regval = 0;
	if (triggerinout_conf.trgout_bytrigger)
		regval |= TRGOPT_TRGOOUTEN;
	write_u8_inc(&wrptr, regval);
	regval &= ~TRGOPT_CLEAR_MASK;
	if (triggerinout_conf.trgout_enable)
		regval |= TRGOPT_TRGOEN;
	write_u8_inc(&wrptr, regval);
	count = wrptr - trgconf_bytes;
	sigma_write_register(devc, WRITE_TRIGGER_OPTION, trgconf_bytes, count);

	/* Leave trigger programming mode. */
	sigma_set_register(devc, WRITE_TRIGGER_SELECT2, triggerselect);

	/* Set clock select register. */
	clockselect.async = 0;
	clockselect.fraction = 1;		/* Divider 1. */
	clockselect.disabled_channels = 0x0000;	/* All channels enabled. */
	if (devc->samplerate == SR_MHZ(200)) {
		/* Enable 4 channels. */
		clockselect.disabled_channels = 0xfff0;
	} else if (devc->samplerate == SR_MHZ(100)) {
		/* Enable 8 channels. */
		clockselect.disabled_channels = 0xff00;
	} else {
		/*
		 * 50 MHz mode, or fraction thereof. The 50MHz reference
		 * can get divided by any integer in the range 1 to 256.
		 * Divider minus 1 gets written to the hardware.
		 * (The driver lists a discrete set of sample rates, but
		 * all of them fit the above description.)
		 */
		clockselect.fraction = SR_MHZ(50) / devc->samplerate;
	}
	wrptr = clock_bytes;
	write_u8_inc(&wrptr, clockselect.async);
	write_u8_inc(&wrptr, clockselect.fraction - 1);
	write_u16be_inc(&wrptr, clockselect.disabled_channels);
	count = wrptr - clock_bytes;
	sigma_write_register(devc, WRITE_CLOCK_SELECT, clock_bytes, count);

	/* Setup maximum post trigger time. */
	sigma_set_register(devc, WRITE_POST_TRIGGER,
		(devc->capture_ratio * 255) / 100);

	/* Start acqusition. */
	regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
#if ASIX_SIGMA_WITH_TRIGGER
	regval |= WMR_TRGEN;
#endif
	sigma_set_register(devc, WRITE_MODE, regval);

	std_session_send_df_header(sdi);

	/* Add capture source. */
	sr_session_source_add(sdi->session, -1, 0, 10,
		sigma_receive_data, (void *)sdi);

	devc->state.state = SIGMA_CAPTURE;

	return SR_OK;
}

static int dev_acquisition_stop(struct sr_dev_inst *sdi)
{
	struct dev_context *devc;

	devc = sdi->priv;

	/*
	 * When acquisition is currently running, keep the receive
	 * routine registered and have it stop the acquisition upon the
	 * next invocation. Else unregister the receive routine here
	 * already. The detour is required to have sample data retrieved
	 * for forced acquisition stops.
	 */
	if (devc->state.state == SIGMA_CAPTURE) {
		devc->state.state = SIGMA_STOPPING;
	} else {
		devc->state.state = SIGMA_IDLE;
		sr_session_source_remove(sdi->session, -1);
	}

	return SR_OK;
}

static struct sr_dev_driver asix_sigma_driver_info = {
	.name = "asix-sigma",
	.longname = "ASIX SIGMA/SIGMA2",
	.api_version = 1,
	.init = std_init,
	.cleanup = std_cleanup,
	.scan = scan,
	.dev_list = std_dev_list,
	.dev_clear = dev_clear,
	.config_get = config_get,
	.config_set = config_set,
	.config_list = config_list,
	.dev_open = dev_open,
	.dev_close = dev_close,
	.dev_acquisition_start = dev_acquisition_start,
	.dev_acquisition_stop = dev_acquisition_stop,
	.context = NULL,
};
SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);
Commit	Line	Data
3ba56876	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
	5	* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
	6	* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
3ba56876	22	#include <config.h>
	23	#include "protocol.h"
	24
3ba56876	25	/*
	26	* Channel numbers seem to go from 1-16, according to this image:
	27	* http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg
	28	* (the cable has two additional GND pins, and a TI and TO pin)
	29	*/
	30	static const char *channel_names[] = {
	31	"1", "2", "3", "4", "5", "6", "7", "8",
	32	"9", "10", "11", "12", "13", "14", "15", "16",
	33	};
	34
53a939ab GS	35	static const uint32_t scanopts[] = {
	36	SR_CONF_CONN,
	37	};
	38
3ba56876	39	static const uint32_t drvopts[] = {
	40	SR_CONF_LOGIC_ANALYZER,
	41	};
	42
	43	static const uint32_t devopts[] = {
	44	SR_CONF_LIMIT_MSEC \| SR_CONF_GET \| SR_CONF_SET,
2f7e529c	45	SR_CONF_LIMIT_SAMPLES \| SR_CONF_GET \| SR_CONF_SET,
53a939ab	46	SR_CONF_CONN \| SR_CONF_GET,
3ba56876	47	SR_CONF_SAMPLERATE \| SR_CONF_GET \| SR_CONF_SET \| SR_CONF_LIST,
de3f7acb	48	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	49	SR_CONF_TRIGGER_MATCH \| SR_CONF_LIST,
3ba56876	50	SR_CONF_CAPTURE_RATIO \| SR_CONF_GET \| SR_CONF_SET,
de3f7acb	51	#endif
3ba56876	52	};
3ba56876	53
eac48b34	54	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	55	static const int32_t trigger_matches[] = {
	56	SR_TRIGGER_ZERO,
	57	SR_TRIGGER_ONE,
	58	SR_TRIGGER_RISING,
	59	SR_TRIGGER_FALLING,
	60	};
eac48b34	61	#endif
3ba56876	62
3553451f	63	static void clear_helper(struct dev_context *devc)
53279f13	64	{
53279f13 UH	65	ftdi_deinit(&devc->ftdic);
	66	}
	67
3ba56876	68	static int dev_clear(const struct sr_dev_driver *di)
3ba56876	69	{
9b4d261f GS	70	return std_dev_clear_with_callback(di,
9b4d261f GS	71	(std_dev_clear_callback)clear_helper);
3ba56876	72	}
3ba56876	73
53a939ab	74	static gboolean bus_addr_in_devices(int bus, int addr, GSList *devs)
3ba56876	75	{
53a939ab	76	struct sr_usb_dev_inst *usb;
3ba56876	77
53a939ab GS	78	for (/* EMPTY */; devs; devs = devs->next) {
	79	usb = devs->data;
	80	if (usb->bus == bus && usb->address == addr)
	81	return TRUE;
	82	}
3ba56876	83
53a939ab GS	84	return FALSE;
53a939ab GS	85	}
3ba56876	86
53a939ab GS	87	static gboolean known_vid_pid(const struct libusb_device_descriptor *des)
53a939ab GS	88	{
9b4d261f GS	89	gboolean is_sigma, is_omega;
9b4d261f GS	90
53a939ab GS	91	if (des->idVendor != USB_VENDOR_ASIX)
53a939ab GS	92	return FALSE;
9b4d261f GS	93	is_sigma = des->idProduct == USB_PRODUCT_SIGMA;
	94	is_omega = des->idProduct == USB_PRODUCT_OMEGA;
	95	if (!is_sigma && !is_omega)
53a939ab GS	96	return FALSE;
	97	return TRUE;
	98	}
3ba56876	99
53a939ab GS	100	static GSList scan(struct sr_dev_driver di, GSList *options)
	101	{
	102	struct drv_context *drvc;
	103	libusb_context *usbctx;
	104	const char *conn;
	105	GSList l, conn_devices;
	106	struct sr_config *src;
	107	GSList *devices;
	108	libusb_device *devlist, devitem;
	109	int bus, addr;
	110	struct libusb_device_descriptor des;
	111	struct libusb_device_handle *hdl;
	112	int ret;
	113	char conn_id[20];
	114	char serno_txt[16];
	115	char *end;
	116	long serno_num, serno_pre;
	117	enum asix_device_type dev_type;
	118	const char *dev_text;
	119	struct sr_dev_inst *sdi;
	120	struct dev_context *devc;
	121	size_t devidx, chidx;
	122
	123	drvc = di->context;
	124	usbctx = drvc->sr_ctx->libusb_ctx;
	125
	126	/* Find all devices which match an (optional) conn= spec. */
	127	conn = NULL;
	128	for (l = options; l; l = l->next) {
	129	src = l->data;
	130	switch (src->key) {
	131	case SR_CONF_CONN:
	132	conn = g_variant_get_string(src->data, NULL);
	133	break;
	134	}
3ba56876	135	}
53a939ab GS	136	conn_devices = NULL;
	137	if (conn)
	138	conn_devices = sr_usb_find(usbctx, conn);
	139	if (conn && !conn_devices)
	140	return NULL;
	141
	142	/* Find all ASIX logic analyzers (which match the connection spec). */
	143	devices = NULL;
	144	libusb_get_device_list(usbctx, &devlist);
	145	for (devidx = 0; devlist[devidx]; devidx++) {
	146	devitem = devlist[devidx];
	147
	148	/* Check for connection match if a user spec was given. */
	149	bus = libusb_get_bus_number(devitem);
	150	addr = libusb_get_device_address(devitem);
	151	if (conn && !bus_addr_in_devices(bus, addr, conn_devices))
	152	continue;
	153	snprintf(conn_id, sizeof(conn_id), "%d.%d", bus, addr);
	154
	155	/*
	156	* Check for known VID:PID pairs. Get the serial number,
	157	* to then derive the device type from it.
	158	*/
	159	libusb_get_device_descriptor(devitem, &des);
	160	if (!known_vid_pid(&des))
	161	continue;
	162	if (!des.iSerialNumber) {
	163	sr_warn("Cannot get serial number (index 0).");
	164	continue;
	165	}
	166	ret = libusb_open(devitem, &hdl);
	167	if (ret < 0) {
	168	sr_warn("Cannot open USB device %04x.%04x: %s.",
	169	des.idVendor, des.idProduct,
	170	libusb_error_name(ret));
	171	continue;
	172	}
	173	ret = libusb_get_string_descriptor_ascii(hdl,
	174	des.iSerialNumber,
	175	(unsigned char *)serno_txt, sizeof(serno_txt));
	176	if (ret < 0) {
	177	sr_warn("Cannot get serial number (%s).",
	178	libusb_error_name(ret));
	179	libusb_close(hdl);
	180	continue;
	181	}
	182	libusb_close(hdl);
	183
	184	/*
	185	* All ASIX logic analyzers have a serial number, which
	186	* reads as a hex number, and tells the device type.
	187	*/
	188	ret = sr_atol_base(serno_txt, &serno_num, &end, 16);
	189	if (ret != SR_OK \|\| !end \|\| *end) {
	190	sr_warn("Cannot interpret serial number %s.", serno_txt);
	191	continue;
	192	}
	193	dev_type = ASIX_TYPE_NONE;
	194	dev_text = NULL;
	195	serno_pre = serno_num >> 16;
	196	switch (serno_pre) {
	197	case 0xa601:
	198	dev_type = ASIX_TYPE_SIGMA;
	199	dev_text = "SIGMA";
200	sr_info("Found SIGMA, serno %s.", serno_txt);
201	break;
202	case 0xa602:
203	dev_type = ASIX_TYPE_SIGMA;
204	dev_text = "SIGMA2";
205	sr_info("Found SIGMA2, serno %s.", serno_txt);
206	break;
207	case 0xa603:
208	dev_type = ASIX_TYPE_OMEGA;
209	dev_text = "OMEGA";
210	sr_info("Found OMEGA, serno %s.", serno_txt);
211	if (!ASIX_WITH_OMEGA) {
212	sr_warn("OMEGA support is not implemented yet.");
213	continue;
214	}
215	break;
216	default:
217	sr_warn("Unknown serno %s, skipping.", serno_txt);
218	continue;
219	}
220
221	/* Create a device instance, add it to the result set. */
222
223	sdi = g_malloc0(sizeof(*sdi));
224	devices = g_slist_append(devices, sdi);
225	sdi->status = SR_ST_INITIALIZING;
226	sdi->vendor = g_strdup("ASIX");
227	sdi->model = g_strdup(dev_text);
228	sdi->serial_num = g_strdup(serno_txt);
229	sdi->connection_id = g_strdup(conn_id);
230	for (chidx = 0; chidx < ARRAY_SIZE(channel_names); chidx++)
231	sr_channel_new(sdi, chidx, SR_CHANNEL_LOGIC,
232	TRUE, channel_names[chidx]);
233
234	devc = g_malloc0(sizeof(*devc));
235	sdi->priv = devc;
236	devc->id.vid = des.idVendor;
237	devc->id.pid = des.idProduct;
238	devc->id.serno = serno_num;
239	devc->id.prefix = serno_pre;
240	devc->id.type = dev_type;
5e78a564 GS	241	devc->samplerate = samplerates[0];
5e78a564 GS	242	sr_sw_limits_init(&devc->cfg_limits);
80e717b3	243	devc->firmware_idx = SIGMA_FW_NONE;
53a939ab GS	244	devc->capture_ratio = 50;
53a939ab GS	245	devc->use_triggers = 0;
3ba56876	246	}
53a939ab GS	247	libusb_free_device_list(devlist, 1);
53a939ab GS	248	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
3ba56876	249
53a939ab	250	return std_scan_complete(di, devices);
3ba56876	251	}
3ba56876	252
3ba56876	253	static int dev_open(struct sr_dev_inst *sdi)
	254	{
	255	struct dev_context *devc;
53a939ab GS	256	long vid, pid;
53a939ab GS	257	const char *serno;
3ba56876	258	int ret;
	259
	260	devc = sdi->priv;
	261
53a939ab GS	262	if (devc->id.type == ASIX_TYPE_OMEGA && !ASIX_WITH_OMEGA) {
	263	sr_err("OMEGA support is not implemented yet.");
	264	return SR_ERR_NA;
	265	}
	266	vid = devc->id.vid;
	267	pid = devc->id.pid;
	268	serno = sdi->serial_num;
	269
	270	ret = ftdi_init(&devc->ftdic);
	271	if (ret < 0) {
	272	sr_err("Cannot initialize FTDI context (%d): %s.",
	273	ret, ftdi_get_error_string(&devc->ftdic));
	274	return SR_ERR_IO;
	275	}
	276	ret = ftdi_usb_open_desc_index(&devc->ftdic, vid, pid, NULL, serno, 0);
	277	if (ret < 0) {
	278	sr_err("Cannot open device (%d): %s.",
	279	ret, ftdi_get_error_string(&devc->ftdic));
	280	return SR_ERR_IO;
3ba56876	281	}
3ba56876	282
3ba56876	283	return SR_OK;
	284	}
	285
	286	static int dev_close(struct sr_dev_inst *sdi)
	287	{
	288	struct dev_context *devc;
53a939ab	289	int ret;
3ba56876	290
	291	devc = sdi->priv;
	292
53a939ab GS	293	ret = ftdi_usb_close(&devc->ftdic);
	294	ftdi_deinit(&devc->ftdic);
	295
	296	return (ret == 0) ? SR_OK : SR_ERR;
3ba56876	297	}
3ba56876	298
dd7a72ea UH	299	static int config_get(uint32_t key, GVariant **data,
dd7a72ea UH	300	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	301	{
	302	struct dev_context *devc;
	303
	304	(void)cg;
	305
	306	if (!sdi)
	307	return SR_ERR;
	308	devc = sdi->priv;
	309
	310	switch (key) {
53a939ab GS	311	case SR_CONF_CONN:
	312	*data = g_variant_new_string(sdi->connection_id);
	313	break;
3ba56876	314	case SR_CONF_SAMPLERATE:
5e78a564	315	*data = g_variant_new_uint64(devc->samplerate);
3ba56876	316	break;
3ba56876	317	case SR_CONF_LIMIT_MSEC:
2f7e529c	318	case SR_CONF_LIMIT_SAMPLES:
5e78a564	319	return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
de3f7acb	320	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	321	case SR_CONF_CAPTURE_RATIO:
	322	*data = g_variant_new_uint64(devc->capture_ratio);
	323	break;
de3f7acb	324	#endif
3ba56876	325	default:
	326	return SR_ERR_NA;
	327	}
	328
	329	return SR_OK;
	330	}
	331
dd7a72ea UH	332	static int config_set(uint32_t key, GVariant *data,
dd7a72ea UH	333	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	334	{
3ba56876	335	struct dev_context *devc;
5e78a564 GS	336	int ret;
5e78a564 GS	337	uint64_t want_rate, have_rate;
3ba56876	338
	339	(void)cg;
	340
3ba56876	341	devc = sdi->priv;
3ba56876	342
3ba56876	343	switch (key) {
3ba56876	344	case SR_CONF_SAMPLERATE:
5e78a564 GS	345	want_rate = g_variant_get_uint64(data);
	346	ret = sigma_normalize_samplerate(want_rate, &have_rate);
	347	if (ret != SR_OK)
	348	return ret;
	349	if (have_rate != want_rate) {
	350	char text_want, text_have;
	351	text_want = sr_samplerate_string(want_rate);
	352	text_have = sr_samplerate_string(have_rate);
	353	sr_info("Adjusted samplerate %s to %s.",
	354	text_want, text_have);
	355	g_free(text_want);
	356	g_free(text_have);
	357	}
	358	devc->samplerate = have_rate;
3ba56876	359	break;
5e78a564	360	case SR_CONF_LIMIT_MSEC:
3ba56876	361	case SR_CONF_LIMIT_SAMPLES:
5e78a564	362	return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
de3f7acb	363	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	364	case SR_CONF_CAPTURE_RATIO:
efad7ccc	365	devc->capture_ratio = g_variant_get_uint64(data);
3ba56876	366	break;
de3f7acb	367	#endif
3ba56876	368	default:
758906aa	369	return SR_ERR_NA;
3ba56876	370	}
3ba56876	371
758906aa	372	return SR_OK;
3ba56876	373	}
3ba56876	374
dd7a72ea UH	375	static int config_list(uint32_t key, GVariant **data,
dd7a72ea UH	376	const struct sr_dev_inst sdi, const struct sr_channel_group cg)
3ba56876	377	{
3ba56876	378	switch (key) {
53a939ab	379	case SR_CONF_SCAN_OPTIONS:
3ba56876	380	case SR_CONF_DEVICE_OPTIONS:
53a939ab GS	381	if (cg)
53a939ab GS	382	return SR_ERR_NA;
9b4d261f GS	383	return STD_CONFIG_LIST(key, data, sdi, cg,
9b4d261f GS	384	scanopts, drvopts, devopts);
3ba56876	385	case SR_CONF_SAMPLERATE:
463160cb	386	*data = std_gvar_samplerates(samplerates, samplerates_count);
3ba56876	387	break;
de3f7acb	388	#if ASIX_SIGMA_WITH_TRIGGER
3ba56876	389	case SR_CONF_TRIGGER_MATCH:
53012da6	390	*data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
3ba56876	391	break;
de3f7acb	392	#endif
3ba56876	393	default:
	394	return SR_ERR_NA;
	395	}
	396
	397	return SR_OK;
	398	}
	399
695dc859	400	static int dev_acquisition_start(const struct sr_dev_inst *sdi)
3ba56876	401	{
	402	struct dev_context *devc;
	403	struct clockselect_50 clockselect;
8256ed15	404	int triggerpin, ret;
f06fb3e9	405	uint8_t triggerselect;
3ba56876	406	struct triggerinout triggerinout_conf;
3ba56876	407	struct triggerlut lut;
a53b8e4d GS	408	uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
a53b8e4d GS	409	size_t count;
3ba56876	410
3ba56876	411	devc = sdi->priv;
3ba56876	412
5e78a564 GS	413	/*
	414	* Setup the device's samplerate from the value which up to now
	415	* just got checked and stored. As a byproduct this can pick and
	416	* send firmware to the device, reduce the number of available
	417	* logic channels, etc.
	418	*
	419	* Determine an acquisition timeout from optionally configured
	420	* sample count or time limits. Which depends on the samplerate.
	421	*/
	422	ret = sigma_set_samplerate(sdi);
	423	if (ret != SR_OK)
	424	return ret;
	425	ret = sigma_set_acquire_timeout(devc);
	426	if (ret != SR_OK)
	427	return ret;
	428
3ba56876	429	if (sigma_convert_trigger(sdi) != SR_OK) {
	430	sr_err("Failed to configure triggers.");
	431	return SR_ERR;
	432	}
	433
3ba56876	434	/* Enter trigger programming mode. */
9b4d261f	435	sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x20);
3ba56876	436
f06fb3e9	437	triggerselect = 0;
5e78a564	438	if (devc->samplerate >= SR_MHZ(100)) {
f06fb3e9	439	/* 100 and 200 MHz mode. */
9b4d261f	440	sigma_set_register(devc, WRITE_TRIGGER_SELECT2, 0x81);
3ba56876	441
3ba56876	442	/* Find which pin to trigger on from mask. */
9b4d261f GS	443	for (triggerpin = 0; triggerpin < 8; triggerpin++) {
	444	if (devc->trigger.risingmask & (1 << triggerpin))
	445	break;
	446	if (devc->trigger.fallingmask & (1 << triggerpin))
3ba56876	447	break;
9b4d261f	448	}
3ba56876	449
3ba56876	450	/* Set trigger pin and light LED on trigger. */
a53b8e4d	451	triggerselect = TRGSEL2_LEDSEL1 \| (triggerpin & 0x7);
3ba56876	452
	453	/* Default rising edge. */
	454	if (devc->trigger.fallingmask)
	455	triggerselect \|= 1 << 3;
	456
5e78a564	457	} else if (devc->samplerate <= SR_MHZ(50)) {
f06fb3e9	458	/* All other modes. */
9b4d261f	459	sigma_build_basic_trigger(devc, &lut);
3ba56876	460
9b4d261f	461	sigma_write_trigger_lut(devc, &lut);
3ba56876	462
a53b8e4d	463	triggerselect = TRGSEL2_LEDSEL1 \| TRGSEL2_LEDSEL0;
3ba56876	464	}
	465
	466	/* Setup trigger in and out pins to default values. */
	467	memset(&triggerinout_conf, 0, sizeof(struct triggerinout));
	468	triggerinout_conf.trgout_bytrigger = 1;
	469	triggerinout_conf.trgout_enable = 1;
a53b8e4d GS	470	/* TODO
	471	* Verify the correctness of this implementation. The previous
	472	* version used to assign to a C language struct with bit fields
	473	* which is highly non-portable and hard to guess the resulting
	474	* raw memory layout or wire transfer content. The C struct's
	475	* field names did not match the vendor documentation's names.
	476	* Which means that I could not verify "on paper" either. Let's
	477	* re-visit this code later during research for trigger support.
	478	*/
	479	wrptr = trgconf_bytes;
	480	regval = 0;
	481	if (triggerinout_conf.trgout_bytrigger)
	482	regval \|= TRGOPT_TRGOOUTEN;
	483	write_u8_inc(&wrptr, regval);
	484	regval &= ~TRGOPT_CLEAR_MASK;
	485	if (triggerinout_conf.trgout_enable)
	486	regval \|= TRGOPT_TRGOEN;
	487	write_u8_inc(&wrptr, regval);
	488	count = wrptr - trgconf_bytes;
	489	sigma_write_register(devc, WRITE_TRIGGER_OPTION, trgconf_bytes, count);
	490
	491	/* Leave trigger programming mode. */
9b4d261f	492	sigma_set_register(devc, WRITE_TRIGGER_SELECT2, triggerselect);
3ba56876	493
3ba56876	494	/* Set clock select register. */
8256ed15	495	clockselect.async = 0;
a53b8e4d	496	clockselect.fraction = 1; /* Divider 1. */
8256ed15	497	clockselect.disabled_channels = 0x0000; /* All channels enabled. */
5e78a564	498	if (devc->samplerate == SR_MHZ(200)) {
3ba56876	499	/* Enable 4 channels. */
a53b8e4d	500	clockselect.disabled_channels = 0xfff0;
5e78a564	501	} else if (devc->samplerate == SR_MHZ(100)) {
3ba56876	502	/* Enable 8 channels. */
a53b8e4d	503	clockselect.disabled_channels = 0xff00;
8256ed15	504	} else {
3ba56876	505	/*
8256ed15 GS	506	* 50 MHz mode, or fraction thereof. The 50MHz reference
	507	* can get divided by any integer in the range 1 to 256.
	508	* Divider minus 1 gets written to the hardware.
	509	* (The driver lists a discrete set of sample rates, but
	510	* all of them fit the above description.)
3ba56876	511	*/
a53b8e4d	512	clockselect.fraction = SR_MHZ(50) / devc->samplerate;
3ba56876	513	}
a53b8e4d GS	514	wrptr = clock_bytes;
	515	write_u8_inc(&wrptr, clockselect.async);
	516	write_u8_inc(&wrptr, clockselect.fraction - 1);
	517	write_u16be_inc(&wrptr, clockselect.disabled_channels);
	518	count = wrptr - clock_bytes;
	519	sigma_write_register(devc, WRITE_CLOCK_SELECT, clock_bytes, count);
3ba56876	520
3ba56876	521	/* Setup maximum post trigger time. */
9b4d261f GS	522	sigma_set_register(devc, WRITE_POST_TRIGGER,
9b4d261f GS	523	(devc->capture_ratio * 255) / 100);
3ba56876	524
3ba56876	525	/* Start acqusition. */
9b4d261f	526	regval = WMR_TRGRES \| WMR_SDRAMWRITEEN;
22f64ed8 GS	527	#if ASIX_SIGMA_WITH_TRIGGER
	528	regval \|= WMR_TRGEN;
	529	#endif
9b4d261f	530	sigma_set_register(devc, WRITE_MODE, regval);
3ba56876	531
bee2b016	532	std_session_send_df_header(sdi);
3ba56876	533
3ba56876	534	/* Add capture source. */
9b4d261f GS	535	sr_session_source_add(sdi->session, -1, 0, 10,
9b4d261f GS	536	sigma_receive_data, (void *)sdi);
3ba56876	537
	538	devc->state.state = SIGMA_CAPTURE;
	539
	540	return SR_OK;
	541	}
	542
695dc859	543	static int dev_acquisition_stop(struct sr_dev_inst *sdi)
3ba56876	544	{
	545	struct dev_context *devc;
	546
3ba56876	547	devc = sdi->priv;
3ba56876	548
dde0175d GS	549	/*
	550	* When acquisition is currently running, keep the receive
	551	* routine registered and have it stop the acquisition upon the
	552	* next invocation. Else unregister the receive routine here
	553	* already. The detour is required to have sample data retrieved
	554	* for forced acquisition stops.
	555	*/
	556	if (devc->state.state == SIGMA_CAPTURE) {
	557	devc->state.state = SIGMA_STOPPING;
	558	} else {
	559	devc->state.state = SIGMA_IDLE;
	560	sr_session_source_remove(sdi->session, -1);
	561	}
3ba56876	562
	563	return SR_OK;
	564	}
	565
dd5c48a6	566	static struct sr_dev_driver asix_sigma_driver_info = {
3ba56876	567	.name = "asix-sigma",
	568	.longname = "ASIX SIGMA/SIGMA2",
	569	.api_version = 1,
c2fdcc25	570	.init = std_init,
700d6b64	571	.cleanup = std_cleanup,
3ba56876	572	.scan = scan,
c01bf34c	573	.dev_list = std_dev_list,
3ba56876	574	.dev_clear = dev_clear,
	575	.config_get = config_get,
	576	.config_set = config_set,
	577	.config_list = config_list,
	578	.dev_open = dev_open,
	579	.dev_close = dev_close,
	580	.dev_acquisition_start = dev_acquisition_start,
	581	.dev_acquisition_stop = dev_acquisition_stop,
	582	.context = NULL,
	583	};
dd5c48a6	584	SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info);