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3ba56876 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
3ba56876 | 22 | #include <config.h> |
23 | #include "protocol.h" | |
24 | ||
3ba56876 | 25 | /* |
26 | * Channel numbers seem to go from 1-16, according to this image: | |
27 | * http://tools.asix.net/img/sigma_sigmacab_pins_720.jpg | |
28 | * (the cable has two additional GND pins, and a TI and TO pin) | |
29 | */ | |
30 | static const char *channel_names[] = { | |
31 | "1", "2", "3", "4", "5", "6", "7", "8", | |
32 | "9", "10", "11", "12", "13", "14", "15", "16", | |
33 | }; | |
34 | ||
35 | static const uint32_t drvopts[] = { | |
36 | SR_CONF_LOGIC_ANALYZER, | |
37 | }; | |
38 | ||
39 | static const uint32_t devopts[] = { | |
40 | SR_CONF_LIMIT_MSEC | SR_CONF_GET | SR_CONF_SET, | |
2f7e529c | 41 | SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, |
3ba56876 | 42 | SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
de3f7acb | 43 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 44 | SR_CONF_TRIGGER_MATCH | SR_CONF_LIST, |
45 | SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET, | |
de3f7acb | 46 | #endif |
3ba56876 | 47 | }; |
48 | ||
eac48b34 | 49 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 50 | static const int32_t trigger_matches[] = { |
51 | SR_TRIGGER_ZERO, | |
52 | SR_TRIGGER_ONE, | |
53 | SR_TRIGGER_RISING, | |
54 | SR_TRIGGER_FALLING, | |
55 | }; | |
eac48b34 | 56 | #endif |
3ba56876 | 57 | |
3553451f | 58 | static void clear_helper(struct dev_context *devc) |
53279f13 | 59 | { |
53279f13 UH |
60 | ftdi_deinit(&devc->ftdic); |
61 | } | |
62 | ||
3ba56876 | 63 | static int dev_clear(const struct sr_dev_driver *di) |
64 | { | |
3553451f | 65 | return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper); |
3ba56876 | 66 | } |
67 | ||
3ba56876 | 68 | static GSList *scan(struct sr_dev_driver *di, GSList *options) |
69 | { | |
70 | struct sr_dev_inst *sdi; | |
3ba56876 | 71 | struct dev_context *devc; |
3ba56876 | 72 | struct ftdi_device_list *devlist; |
73 | char serial_txt[10]; | |
74 | uint32_t serial; | |
75 | int ret; | |
76 | unsigned int i; | |
77 | ||
78 | (void)options; | |
79 | ||
3ba56876 | 80 | devc = g_malloc0(sizeof(struct dev_context)); |
81 | ||
82 | ftdi_init(&devc->ftdic); | |
83 | ||
3ba56876 | 84 | if ((ret = ftdi_usb_find_all(&devc->ftdic, &devlist, |
85 | USB_VENDOR, USB_PRODUCT)) <= 0) { | |
86 | if (ret < 0) | |
87 | sr_err("ftdi_usb_find_all(): %d", ret); | |
88 | goto free; | |
89 | } | |
90 | ||
91 | /* Make sure it's a version 1 or 2 SIGMA. */ | |
92 | ftdi_usb_get_strings(&devc->ftdic, devlist->dev, NULL, 0, NULL, 0, | |
93 | serial_txt, sizeof(serial_txt)); | |
94 | sscanf(serial_txt, "%x", &serial); | |
95 | ||
96 | if (serial < 0xa6010000 || serial > 0xa602ffff) { | |
97 | sr_err("Only SIGMA and SIGMA2 are supported " | |
98 | "in this version of libsigrok."); | |
99 | goto free; | |
100 | } | |
101 | ||
102 | sr_info("Found ASIX SIGMA - Serial: %s", serial_txt); | |
103 | ||
104 | devc->cur_samplerate = samplerates[0]; | |
3ba56876 | 105 | devc->limit_msec = 0; |
2f7e529c | 106 | devc->limit_samples = 0; |
3ba56876 | 107 | devc->cur_firmware = -1; |
108 | devc->num_channels = 0; | |
109 | devc->samples_per_event = 0; | |
110 | devc->capture_ratio = 50; | |
111 | devc->use_triggers = 0; | |
112 | ||
3ba56876 | 113 | sdi = g_malloc0(sizeof(struct sr_dev_inst)); |
114 | sdi->status = SR_ST_INITIALIZING; | |
b15ff1c9 UH |
115 | sdi->vendor = g_strdup("ASIX"); |
116 | sdi->model = g_strdup("SIGMA"); | |
3ba56876 | 117 | |
118 | for (i = 0; i < ARRAY_SIZE(channel_names); i++) | |
119 | sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_names[i]); | |
120 | ||
3ba56876 | 121 | sdi->priv = devc; |
122 | ||
3ba56876 | 123 | ftdi_list_free(&devlist); |
124 | ||
43376f33 | 125 | return std_scan_complete(di, g_slist_append(NULL, sdi)); |
3ba56876 | 126 | |
127 | free: | |
128 | ftdi_deinit(&devc->ftdic); | |
129 | g_free(devc); | |
130 | return NULL; | |
131 | } | |
132 | ||
3ba56876 | 133 | static int dev_open(struct sr_dev_inst *sdi) |
134 | { | |
135 | struct dev_context *devc; | |
136 | int ret; | |
137 | ||
138 | devc = sdi->priv; | |
139 | ||
3ba56876 | 140 | if ((ret = ftdi_usb_open_desc(&devc->ftdic, |
7e463623 UH |
141 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { |
142 | sr_err("Failed to open device (%d): %s.", | |
143 | ret, ftdi_get_error_string(&devc->ftdic)); | |
144 | return SR_ERR; | |
3ba56876 | 145 | } |
146 | ||
3ba56876 | 147 | return SR_OK; |
148 | } | |
149 | ||
150 | static int dev_close(struct sr_dev_inst *sdi) | |
151 | { | |
152 | struct dev_context *devc; | |
153 | ||
154 | devc = sdi->priv; | |
155 | ||
f1ba6b4b | 156 | return (ftdi_usb_close(&devc->ftdic) == 0) ? SR_OK : SR_ERR; |
3ba56876 | 157 | } |
158 | ||
dd7a72ea UH |
159 | static int config_get(uint32_t key, GVariant **data, |
160 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
3ba56876 | 161 | { |
162 | struct dev_context *devc; | |
163 | ||
164 | (void)cg; | |
165 | ||
166 | if (!sdi) | |
167 | return SR_ERR; | |
168 | devc = sdi->priv; | |
169 | ||
170 | switch (key) { | |
171 | case SR_CONF_SAMPLERATE: | |
172 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
173 | break; | |
174 | case SR_CONF_LIMIT_MSEC: | |
175 | *data = g_variant_new_uint64(devc->limit_msec); | |
176 | break; | |
2f7e529c GS |
177 | case SR_CONF_LIMIT_SAMPLES: |
178 | *data = g_variant_new_uint64(devc->limit_samples); | |
179 | break; | |
de3f7acb | 180 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 181 | case SR_CONF_CAPTURE_RATIO: |
182 | *data = g_variant_new_uint64(devc->capture_ratio); | |
183 | break; | |
de3f7acb | 184 | #endif |
3ba56876 | 185 | default: |
186 | return SR_ERR_NA; | |
187 | } | |
188 | ||
189 | return SR_OK; | |
190 | } | |
191 | ||
dd7a72ea UH |
192 | static int config_set(uint32_t key, GVariant *data, |
193 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
3ba56876 | 194 | { |
195 | struct dev_context *devc; | |
3ba56876 | 196 | |
197 | (void)cg; | |
198 | ||
3ba56876 | 199 | devc = sdi->priv; |
200 | ||
3ba56876 | 201 | switch (key) { |
202 | case SR_CONF_SAMPLERATE: | |
758906aa | 203 | return sigma_set_samplerate(sdi, g_variant_get_uint64(data)); |
3ba56876 | 204 | case SR_CONF_LIMIT_MSEC: |
50ccb36f | 205 | devc->limit_msec = g_variant_get_uint64(data); |
3ba56876 | 206 | break; |
207 | case SR_CONF_LIMIT_SAMPLES: | |
efad7ccc UH |
208 | devc->limit_samples = g_variant_get_uint64(data); |
209 | devc->limit_msec = sigma_limit_samples_to_msec(devc, | |
210 | devc->limit_samples); | |
3ba56876 | 211 | break; |
de3f7acb | 212 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 213 | case SR_CONF_CAPTURE_RATIO: |
efad7ccc | 214 | devc->capture_ratio = g_variant_get_uint64(data); |
3ba56876 | 215 | break; |
de3f7acb | 216 | #endif |
3ba56876 | 217 | default: |
758906aa | 218 | return SR_ERR_NA; |
3ba56876 | 219 | } |
220 | ||
758906aa | 221 | return SR_OK; |
3ba56876 | 222 | } |
223 | ||
dd7a72ea UH |
224 | static int config_list(uint32_t key, GVariant **data, |
225 | const struct sr_dev_inst *sdi, const struct sr_channel_group *cg) | |
3ba56876 | 226 | { |
3ba56876 | 227 | switch (key) { |
228 | case SR_CONF_DEVICE_OPTIONS: | |
23772462 | 229 | return STD_CONFIG_LIST(key, data, sdi, cg, NO_OPTS, drvopts, devopts); |
3ba56876 | 230 | case SR_CONF_SAMPLERATE: |
463160cb | 231 | *data = std_gvar_samplerates(samplerates, samplerates_count); |
3ba56876 | 232 | break; |
de3f7acb | 233 | #if ASIX_SIGMA_WITH_TRIGGER |
3ba56876 | 234 | case SR_CONF_TRIGGER_MATCH: |
53012da6 | 235 | *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches)); |
3ba56876 | 236 | break; |
de3f7acb | 237 | #endif |
3ba56876 | 238 | default: |
239 | return SR_ERR_NA; | |
240 | } | |
241 | ||
242 | return SR_OK; | |
243 | } | |
244 | ||
695dc859 | 245 | static int dev_acquisition_start(const struct sr_dev_inst *sdi) |
3ba56876 | 246 | { |
247 | struct dev_context *devc; | |
248 | struct clockselect_50 clockselect; | |
8256ed15 | 249 | int triggerpin, ret; |
f06fb3e9 | 250 | uint8_t triggerselect; |
3ba56876 | 251 | struct triggerinout triggerinout_conf; |
252 | struct triggerlut lut; | |
22f64ed8 | 253 | uint8_t regval; |
8256ed15 GS |
254 | uint8_t clock_bytes[sizeof(clockselect)]; |
255 | size_t clock_idx; | |
3ba56876 | 256 | |
3ba56876 | 257 | devc = sdi->priv; |
258 | ||
259 | if (sigma_convert_trigger(sdi) != SR_OK) { | |
260 | sr_err("Failed to configure triggers."); | |
261 | return SR_ERR; | |
262 | } | |
263 | ||
264 | /* If the samplerate has not been set, default to 200 kHz. */ | |
265 | if (devc->cur_firmware == -1) { | |
266 | if ((ret = sigma_set_samplerate(sdi, SR_KHZ(200))) != SR_OK) | |
267 | return ret; | |
268 | } | |
269 | ||
270 | /* Enter trigger programming mode. */ | |
271 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc); | |
272 | ||
f06fb3e9 | 273 | triggerselect = 0; |
3ba56876 | 274 | if (devc->cur_samplerate >= SR_MHZ(100)) { |
f06fb3e9 | 275 | /* 100 and 200 MHz mode. */ |
3ba56876 | 276 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc); |
277 | ||
278 | /* Find which pin to trigger on from mask. */ | |
0a1f7b09 | 279 | for (triggerpin = 0; triggerpin < 8; triggerpin++) |
3ba56876 | 280 | if ((devc->trigger.risingmask | devc->trigger.fallingmask) & |
281 | (1 << triggerpin)) | |
282 | break; | |
283 | ||
284 | /* Set trigger pin and light LED on trigger. */ | |
285 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
286 | ||
287 | /* Default rising edge. */ | |
288 | if (devc->trigger.fallingmask) | |
289 | triggerselect |= 1 << 3; | |
290 | ||
3ba56876 | 291 | } else if (devc->cur_samplerate <= SR_MHZ(50)) { |
f06fb3e9 | 292 | /* All other modes. */ |
3ba56876 | 293 | sigma_build_basic_trigger(&lut, devc); |
294 | ||
295 | sigma_write_trigger_lut(&lut, devc); | |
296 | ||
297 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
298 | } | |
299 | ||
300 | /* Setup trigger in and out pins to default values. */ | |
301 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
302 | triggerinout_conf.trgout_bytrigger = 1; | |
303 | triggerinout_conf.trgout_enable = 1; | |
304 | ||
305 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
306 | (uint8_t *) &triggerinout_conf, | |
307 | sizeof(struct triggerinout), devc); | |
308 | ||
309 | /* Go back to normal mode. */ | |
310 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc); | |
311 | ||
312 | /* Set clock select register. */ | |
8256ed15 GS |
313 | clockselect.async = 0; |
314 | clockselect.fraction = 1 - 1; /* Divider 1. */ | |
315 | clockselect.disabled_channels = 0x0000; /* All channels enabled. */ | |
316 | if (devc->cur_samplerate == SR_MHZ(200)) { | |
3ba56876 | 317 | /* Enable 4 channels. */ |
8256ed15 GS |
318 | clockselect.disabled_channels = 0xf0ff; |
319 | } else if (devc->cur_samplerate == SR_MHZ(100)) { | |
3ba56876 | 320 | /* Enable 8 channels. */ |
8256ed15 GS |
321 | clockselect.disabled_channels = 0x00ff; |
322 | } else { | |
3ba56876 | 323 | /* |
8256ed15 GS |
324 | * 50 MHz mode, or fraction thereof. The 50MHz reference |
325 | * can get divided by any integer in the range 1 to 256. | |
326 | * Divider minus 1 gets written to the hardware. | |
327 | * (The driver lists a discrete set of sample rates, but | |
328 | * all of them fit the above description.) | |
3ba56876 | 329 | */ |
8256ed15 | 330 | clockselect.fraction = SR_MHZ(50) / devc->cur_samplerate - 1; |
3ba56876 | 331 | } |
8256ed15 GS |
332 | clock_idx = 0; |
333 | clock_bytes[clock_idx++] = clockselect.async; | |
334 | clock_bytes[clock_idx++] = clockselect.fraction; | |
335 | clock_bytes[clock_idx++] = clockselect.disabled_channels & 0xff; | |
336 | clock_bytes[clock_idx++] = clockselect.disabled_channels >> 8; | |
337 | sigma_write_register(WRITE_CLOCK_SELECT, clock_bytes, clock_idx, devc); | |
3ba56876 | 338 | |
339 | /* Setup maximum post trigger time. */ | |
340 | sigma_set_register(WRITE_POST_TRIGGER, | |
341 | (devc->capture_ratio * 255) / 100, devc); | |
342 | ||
343 | /* Start acqusition. */ | |
2f425a56 | 344 | devc->start_time = g_get_monotonic_time(); |
22f64ed8 GS |
345 | regval = WMR_TRGRES | WMR_SDRAMWRITEEN; |
346 | #if ASIX_SIGMA_WITH_TRIGGER | |
347 | regval |= WMR_TRGEN; | |
348 | #endif | |
349 | sigma_set_register(WRITE_MODE, regval, devc); | |
3ba56876 | 350 | |
bee2b016 | 351 | std_session_send_df_header(sdi); |
3ba56876 | 352 | |
353 | /* Add capture source. */ | |
354 | sr_session_source_add(sdi->session, -1, 0, 10, sigma_receive_data, (void *)sdi); | |
355 | ||
356 | devc->state.state = SIGMA_CAPTURE; | |
357 | ||
358 | return SR_OK; | |
359 | } | |
360 | ||
695dc859 | 361 | static int dev_acquisition_stop(struct sr_dev_inst *sdi) |
3ba56876 | 362 | { |
363 | struct dev_context *devc; | |
364 | ||
3ba56876 | 365 | devc = sdi->priv; |
3ba56876 | 366 | |
dde0175d GS |
367 | /* |
368 | * When acquisition is currently running, keep the receive | |
369 | * routine registered and have it stop the acquisition upon the | |
370 | * next invocation. Else unregister the receive routine here | |
371 | * already. The detour is required to have sample data retrieved | |
372 | * for forced acquisition stops. | |
373 | */ | |
374 | if (devc->state.state == SIGMA_CAPTURE) { | |
375 | devc->state.state = SIGMA_STOPPING; | |
376 | } else { | |
377 | devc->state.state = SIGMA_IDLE; | |
378 | sr_session_source_remove(sdi->session, -1); | |
379 | } | |
3ba56876 | 380 | |
381 | return SR_OK; | |
382 | } | |
383 | ||
dd5c48a6 | 384 | static struct sr_dev_driver asix_sigma_driver_info = { |
3ba56876 | 385 | .name = "asix-sigma", |
386 | .longname = "ASIX SIGMA/SIGMA2", | |
387 | .api_version = 1, | |
c2fdcc25 | 388 | .init = std_init, |
700d6b64 | 389 | .cleanup = std_cleanup, |
3ba56876 | 390 | .scan = scan, |
c01bf34c | 391 | .dev_list = std_dev_list, |
3ba56876 | 392 | .dev_clear = dev_clear, |
393 | .config_get = config_get, | |
394 | .config_set = config_set, | |
395 | .config_list = config_list, | |
396 | .dev_open = dev_open, | |
397 | .dev_close = dev_close, | |
398 | .dev_acquisition_start = dev_acquisition_start, | |
399 | .dev_acquisition_stop = dev_acquisition_stop, | |
400 | .context = NULL, | |
401 | }; | |
dd5c48a6 | 402 | SR_REGISTER_DEV_DRIVER(asix_sigma_driver_info); |