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557a143d UH |
1 | ## |
2 | ## This file is part of the sigrok project. | |
3 | ## | |
4 | ## Copyright (C) 2012 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | ## | |
6 | ## This program is free software; you can redistribute it and/or modify | |
7 | ## it under the terms of the GNU General Public License as published by | |
8 | ## the Free Software Foundation; either version 2 of the License, or | |
9 | ## (at your option) any later version. | |
10 | ## | |
11 | ## This program is distributed in the hope that it will be useful, | |
12 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | ## GNU General Public License for more details. | |
15 | ## | |
16 | ## You should have received a copy of the GNU General Public License | |
17 | ## along with this program; if not, write to the Free Software | |
18 | ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | ## | |
20 | ||
21 | # JTAG protocol decoder | |
22 | ||
23 | import sigrokdecode as srd | |
24 | ||
25 | class Decoder(srd.Decoder): | |
26 | api_version = 1 | |
27 | id = 'jtag' | |
28 | name = 'JTAG' | |
b7a7e6f5 | 29 | longname = 'Joint Test Action Group (IEEE 1149.1)' |
6e7a0087 | 30 | desc = 'Protocol for testing, debugging, and flashing ICs.' |
557a143d UH |
31 | license = 'gplv2+' |
32 | inputs = ['logic'] | |
33 | outputs = ['jtag'] | |
34 | probes = [ | |
35 | {'id': 'tdi', 'name': 'TDI', 'desc': 'Test data input'}, | |
36 | {'id': 'tdo', 'name': 'TDO', 'desc': 'Test data output'}, | |
37 | {'id': 'tck', 'name': 'TCK', 'desc': 'Test clock'}, | |
38 | {'id': 'tms', 'name': 'TMS', 'desc': 'Test mode select'}, | |
557a143d | 39 | ] |
6d990fe1 | 40 | optional_probes = [ |
1cc590f7 UH |
41 | {'id': 'trst', 'name': 'TRST#', 'desc': 'Test reset'}, |
42 | {'id': 'srst', 'name': 'SRST#', 'desc': 'System reset'}, | |
43 | {'id': 'rtck', 'name': 'RTCK', 'desc': 'Return clock signal'}, | |
6d990fe1 | 44 | ] |
557a143d UH |
45 | options = {} |
46 | annotations = [ | |
ee3e279c | 47 | ['Text', 'Human-readable text'], |
557a143d UH |
48 | ] |
49 | ||
50 | def __init__(self, **kwargs): | |
e5edf39f UH |
51 | # self.state = 'TEST-LOGIC-RESET' |
52 | self.state = 'RUN-TEST/IDLE' | |
53 | self.oldstate = None | |
6d990fe1 | 54 | self.oldpins = (-1, -1, -1, -1) |
557a143d UH |
55 | self.oldtck = -1 |
56 | self.bits_tdi = [] | |
57 | self.bits_tdo = [] | |
58 | ||
59 | def start(self, metadata): | |
60 | self.out_proto = self.add(srd.OUTPUT_PROTO, 'jtag') | |
61 | self.out_ann = self.add(srd.OUTPUT_ANN, 'jtag') | |
62 | ||
63 | def report(self): | |
64 | pass | |
65 | ||
66 | def advance_state_machine(self, tms): | |
e5edf39f UH |
67 | self.oldstate = self.state |
68 | ||
557a143d UH |
69 | # Intro "tree" |
70 | if self.state == 'TEST-LOGIC-RESET': | |
71 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'RUN-TEST/IDLE' | |
72 | elif self.state == 'RUN-TEST/IDLE': | |
73 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
74 | ||
75 | # DR "tree" | |
76 | elif self.state == 'SELECT-DR-SCAN': | |
77 | self.state = 'SELECT-IR-SCAN' if (tms) else 'CAPTURE-DR' | |
78 | elif self.state == 'CAPTURE-DR': | |
79 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
80 | elif self.state == 'SHIFT-DR': | |
81 | self.state = 'EXIT1-DR' if (tms) else 'SHIFT-DR' | |
82 | elif self.state == 'EXIT1-DR': | |
83 | self.state = 'UPDATE-DR' if (tms) else 'PAUSE-DR' | |
84 | elif self.state == 'PAUSE-DR': | |
85 | self.state = 'EXIT2-DR' if (tms) else 'PAUSE-DR' | |
86 | elif self.state == 'EXIT2-DR': | |
87 | self.state = 'UPDATE-DR' if (tms) else 'SHIFT-DR' | |
88 | elif self.state == 'UPDATE-DR': | |
89 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
90 | ||
91 | # IR "tree" | |
92 | elif self.state == 'SELECT-IR-SCAN': | |
93 | self.state = 'TEST-LOGIC-RESET' if (tms) else 'CAPTURE-IR' | |
94 | elif self.state == 'CAPTURE-IR': | |
95 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
96 | elif self.state == 'SHIFT-IR': | |
97 | self.state = 'EXIT1-IR' if (tms) else 'SHIFT-IR' | |
98 | elif self.state == 'EXIT1-IR': | |
99 | self.state = 'UPDATE-IR' if (tms) else 'PAUSE-IR' | |
100 | elif self.state == 'PAUSE-IR': | |
101 | self.state = 'EXIT2-IR' if (tms) else 'PAUSE-IR' | |
102 | elif self.state == 'EXIT2-IR': | |
103 | self.state = 'UPDATE-IR' if (tms) else 'SHIFT-IR' | |
104 | elif self.state == 'UPDATE-IR': | |
105 | self.state = 'SELECT-DR-SCAN' if (tms) else 'RUN-TEST/IDLE' | |
106 | ||
107 | else: | |
108 | raise Exception('Invalid state: %s' % self.state) | |
109 | ||
6d990fe1 | 110 | def handle_rising_tck_edge(self, tdi, tdo, tck, tms): |
557a143d UH |
111 | # Rising TCK edges always advance the state machine. |
112 | self.advance_state_machine(tms) | |
113 | ||
114 | # Output the state we just switched to. | |
115 | self.put(self.ss, self.es, self.out_ann, | |
116 | [0, ['New state: %s' % self.state]]) | |
e5edf39f UH |
117 | self.put(self.ss, self.es, self.out_proto, |
118 | ['NEW STATE', self.state]) | |
119 | ||
120 | # If we went from SHIFT-IR to SHIFT-IR, or SHIFT-DR to SHIFT-DR, | |
121 | # collect the current TDI/TDO values (upon rising TCK edge). | |
122 | if self.state.startswith('SHIFT-') and self.oldstate == self.state: | |
123 | self.bits_tdi.insert(0, tdi) | |
124 | self.bits_tdo.insert(0, tdo) | |
125 | # TODO: ANN/PROTO output. | |
126 | # self.put(self.ss, self.es, self.out_ann, | |
127 | # [0, ['TDI add: ' + str(tdi)]]) | |
128 | # self.put(self.ss, self.es, self.out_ann, | |
129 | # [0, ['TDO add: ' + str(tdo)]]) | |
130 | ||
131 | # Output all TDI/TDO bits if we just switched from SHIFT-* to EXIT1-*. | |
132 | if self.oldstate.startswith('SHIFT-') and \ | |
133 | self.state.startswith('EXIT1-'): | |
134 | ||
135 | t = self.state[-2:] + ' TDI' | |
136 | b = ''.join(map(str, self.bits_tdi)) | |
8189738e UH |
137 | h = ' (0x%x' % int('0b' + b, 2) + ')' |
138 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdi)) + ' bits' | |
e5edf39f UH |
139 | self.put(self.ss, self.es, self.out_ann, [0, [s]]) |
140 | self.put(self.ss, self.es, self.out_proto, [t, b]) | |
141 | self.bits_tdi = [] | |
557a143d | 142 | |
e5edf39f UH |
143 | t = self.state[-2:] + ' TDO' |
144 | b = ''.join(map(str, self.bits_tdo)) | |
8189738e UH |
145 | h = ' (0x%x' % int('0b' + b, 2) + ')' |
146 | s = t + ': ' + b + h + ', ' + str(len(self.bits_tdo)) + ' bits' | |
557a143d | 147 | self.put(self.ss, self.es, self.out_ann, [0, [s]]) |
e5edf39f | 148 | self.put(self.ss, self.es, self.out_proto, [t, b]) |
557a143d UH |
149 | self.bits_tdo = [] |
150 | ||
151 | def decode(self, ss, es, data): | |
152 | for (samplenum, pins) in data: | |
153 | ||
154 | # If none of the pins changed, there's nothing to do. | |
155 | if self.oldpins == pins: | |
156 | continue | |
157 | ||
158 | # Store current pin values for the next round. | |
159 | self.oldpins = pins | |
160 | ||
161 | # Get individual pin values into local variables. | |
1cc590f7 UH |
162 | # Unused probes will have a value of > 1. |
163 | (tdi, tdo, tck, tms, trst, srst, rtck) = pins | |
557a143d UH |
164 | |
165 | # We only care about TCK edges (either rising or falling). | |
166 | if (self.oldtck == tck): | |
167 | continue | |
168 | ||
169 | # Store start/end sample for later usage. | |
170 | self.ss, self.es = ss, es | |
171 | ||
e5edf39f | 172 | # self.put(self.ss, self.es, self.out_ann, |
6d990fe1 UH |
173 | # [0, ['tdi:%s, tdo:%s, tck:%s, tms:%s' \ |
174 | # % (tdi, tdo, tck, tms)]]) | |
e5edf39f | 175 | |
557a143d | 176 | if (self.oldtck == 0 and tck == 1): |
6d990fe1 | 177 | self.handle_rising_tck_edge(tdi, tdo, tck, tms) |
557a143d UH |
178 | |
179 | self.oldtck = tck | |
180 |