2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include <fx2macros.h>
23 #include <autovector.h>
27 #define SET_ANALOG_MODE() PA7 = 1
29 #define SET_COUPLING(x)
31 #define SET_CALIBRATION_PULSE(x)
33 /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
34 #define TOGGLE_CALIBRATION_PIN() PC2 = !PC2
36 #define LED_CLEAR() PC0 = 1; PC1 = 1;
37 #define LED_GREEN() PC0 = 1; PC1 = 0;
38 #define LED_RED() PC0 = 0; PC1 = 1;
40 #define TIMER2_VAL 500
42 /* CTLx pin index (IFCLK, ADC clock input). */
45 #define OUT0 ((1 << CTL_BIT) << 4) /* OEx = 1, CTLx = 0 */
46 #define OE_CTL (((1 << CTL_BIT) << 4) | (1 << CTL_BIT)) /* OEx = CTLx = 1 */
48 /* Change to support as many interfaces as you need. */
49 static BYTE altiface = 0;
51 static volatile WORD ledcounter = 0;
53 static volatile __bit dosud = FALSE;
54 static volatile __bit dosuspend = FALSE;
56 extern __code BYTE highspd_dscr;
57 extern __code BYTE fullspd_dscr;
59 void resume_isr(void) __interrupt RESUME_ISR
64 void sudav_isr(void) __interrupt SUDAV_ISR
70 void usbreset_isr(void) __interrupt USBRESET_ISR
72 handle_hispeed(FALSE);
76 void hispeed_isr(void) __interrupt HISPEED_ISR
82 void suspend_isr(void) __interrupt SUSPEND_ISR
88 void timer2_isr(void) __interrupt TF2_ISR
90 TOGGLE_CALIBRATION_PIN();
92 if (ledcounter && (--ledcounter == 0))
99 * This sets three bits for each channel, one channel at a time.
100 * For channel 0 we want to set bits 1, 2 & 3
101 * For channel 1 we want to set bits 4, 5 & 6
103 * We convert the input values that are strange due to original
104 * firmware code into the value of the three bits as follows:
112 * The third bit is always zero since there are only four outputs connected
113 * in the serial selector chip.
115 * The multiplication of the converted value by 0x24 sets the relevant bits in
116 * both channels and then we mask it out to only affect the channel currently
119 static BOOL set_voltage(BYTE channel, BYTE val)
140 bits = bits << (channel ? 1 : 4);
141 mask = (channel) ? 0x70 : 0x0e;
142 IOA = (IOA & ~mask) | (bits & mask);
148 * Each LSB in the nibble of the byte controls the coupling per channel.
150 * Setting PE3 disables AC coupling capacitor on CH0.
151 * Setting PE0 disables AC coupling capacitor on CH1.
153 static void set_coupling(BYTE coupling_cfg)
155 if (coupling_cfg & 0x01)
160 if (coupling_cfg & 0x10)
166 static BOOL set_numchannels(BYTE numchannels)
168 if (numchannels == 1 || numchannels == 2) {
169 BYTE fifocfg = 7 + numchannels;
170 EP2FIFOCFG = fifocfg;
171 EP6FIFOCFG = fifocfg;
178 static void clear_fifo(void)
191 static void stop_sampling(void)
195 INPKTEND = (altiface == 0) ? 6 : 2;
198 static void start_sampling(void)
206 for (i = 0; i < 1000; i++);
208 while (!(GPIFTRIG & 0x80))
215 GPIFTRIG = (altiface == 0) ? 6 : 4;
217 /* Set green LED, don't clear LED afterwards (ledcounter = 0). */
222 static void select_interface(BYTE alt)
224 const BYTE *pPacketSize = \
225 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
226 + (9 + (16 * alt) + 9 + 4);
235 EP6AUTOINLENL = pPacketSize[0];
236 EP6AUTOINLENH = pPacketSize[1];
242 EP2AUTOINLENL = pPacketSize[0];
243 EP2AUTOINLENH = pPacketSize[1] & 0x7;
244 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
248 static const struct samplerate_info {
257 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
258 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
259 { 24, 1, 0, 2, 1, OUT0, 0xca },
260 { 16, 1, 1, 2, 0, OUT0, 0xca },
261 { 12, 2, 1, 2, 0, OUT0, 0xca },
262 { 8, 3, 2, 2, 0, OUT0, 0xca },
263 { 4, 6, 5, 2, 0, OUT0, 0xca },
264 { 2, 12, 11, 2, 0, OUT0, 0xca },
265 { 1, 24, 23, 2, 0, OUT0, 0xca },
266 { 50, 48, 47, 2, 0, OUT0, 0xca },
267 { 20, 120, 119, 2, 0, OUT0, 0xca },
268 { 10, 240, 239, 2, 0, OUT0, 0xca },
271 static BOOL set_samplerate(BYTE rate)
275 while (samplerates[i].rate != rate) {
277 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
281 IFCONFIG = samplerates[i].ifcfg;
284 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
288 * The program for low-speed, e.g. 1 MHz, is:
289 * wait 24, CTLx=0, FIFO
293 * The program for 24 MHz is:
294 * wait 1, CTLx=0, FIFO
297 * The program for 30/48 MHz is:
298 * jump 0, CTLx=Z, FIFO, LOOP
300 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
303 /* LENGTH / BRANCH 0-7 */
304 EXTAUTODAT2 = samplerates[i].wait0;
305 EXTAUTODAT2 = samplerates[i].wait1;
314 EXTAUTODAT2 = samplerates[i].opc0;
315 EXTAUTODAT2 = samplerates[i].opc1;
316 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
324 EXTAUTODAT2 = samplerates[i].out0;
325 EXTAUTODAT2 = OE_CTL;
326 EXTAUTODAT2 = OE_CTL;
333 /* LOGIC FUNCTION 0-7 */
343 for (i = 0; i < 96; i++)
349 static BOOL set_calibration_pulse(BYTE fs)
353 RCAP2L = -10000 & 0xff;
354 RCAP2H = (-10000 & 0xff00) >> 8;
357 RCAP2L = -1000 & 0xff;
358 RCAP2H = (-1000 & 0xff00) >> 8;
361 RCAP2L = (BYTE)(-100 & 0xff);
365 RCAP2L = (BYTE)(-20 & 0xff);
373 /* Set *alt_ifc to the current alt interface for ifc. */
374 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
384 * Return TRUE if you set the interface requested.
386 * Note: This function should reconfigure and reset the endpoints
387 * according to the interface descriptors you provided.
389 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
392 select_interface(alt_ifc);
397 BYTE handle_get_configuration(void)
399 /* We only support configuration 0. */
403 BOOL handle_set_configuration(BYTE cfg)
405 /* We only support configuration 0. */
411 BOOL handle_vendorcommand(BYTE cmd)
415 /* Set red LED, clear after timeout. */
419 /* Clear EP0BCH/L for each valid command. */
420 if (cmd >= 0xe0 && cmd <= 0xe6) {
423 while (EP0CS & bmEPBUSY);
429 set_voltage(cmd - 0xe0, EP0BUF[0]);
432 set_samplerate(EP0BUF[0]);
439 set_numchannels(EP0BUF[0]);
442 SET_COUPLING(EP0BUF[0]);
445 SET_CALIBRATION_PULSE(EP0BUF[0]);
449 return FALSE; /* Not handled by handlers. */
452 static void init(void)
459 /* In idle mode tristate all outputs. */
460 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
461 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
463 GPIFREADYSTAT = 0x00;
474 static void main(void)
481 /* Set up interrupts. */
490 /* Global (8051) interrupt enable. */
494 RCAP2L = -TIMER2_VAL & 0xff;
495 RCAP2H = (-TIMER2_VAL & 0xff00) >> 8;
518 /* Make sure ext wakeups are cleared. */
519 WAKEUPCS |= bmWU | bmWU2;
531 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
533 /* Resume (TRM 6.4). */
534 if (REMOTE_WAKEUP()) {
536 USBCS |= bmSIGRESUME;
538 USBCS &= ~bmSIGRESUME;