]> sigrok.org Git - sigrok-firmware-fx2lafw.git/blame - hantek_6022bl.c
fx2lafw: Blink LED on pin PA1 during acquisition.
[sigrok-firmware-fx2lafw.git] / hantek_6022bl.c
CommitLineData
1d203181
STA
1/*
2 * This file is part of the sigrok-firmware-fx2lafw project.
3 *
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <fx2macros.h>
22#include <fx2ints.h>
23#include <autovector.h>
24#include <delay.h>
25#include <setupdat.h>
26
27/* Change to support as many interfaces as you need. */
28static BYTE altiface = 0;
29
30static volatile WORD ledcounter = 0;
31
32static volatile __bit dosud = FALSE;
33static volatile __bit dosuspend = FALSE;
34
35extern __code BYTE highspd_dscr;
36extern __code BYTE fullspd_dscr;
37
38void resume_isr(void) __interrupt RESUME_ISR
39{
40 CLEAR_RESUME();
41}
42
43void sudav_isr(void) __interrupt SUDAV_ISR
44{
45 dosud = TRUE;
46 CLEAR_SUDAV();
47}
48
49void usbreset_isr(void) __interrupt USBRESET_ISR
50{
51 handle_hispeed(FALSE);
52 CLEAR_USBRESET();
53}
54
55void hispeed_isr(void) __interrupt HISPEED_ISR
56{
57 handle_hispeed(TRUE);
58 CLEAR_HISPEED();
59}
60
61void suspend_isr(void) __interrupt SUSPEND_ISR
62{
63 dosuspend = TRUE;
64 CLEAR_SUSPEND();
65}
66
67void timer2_isr(void) __interrupt TF2_ISR
68{
cbd1bc65
JL
69 /* Toggle the 1kHz calibration pin, only accurate up to ca 8MHz. */
70 PC2 = !PC2;
71
1d203181
STA
72 if (ledcounter) {
73 if (--ledcounter == 0) {
74 /* Clear LED. */
75 PC0 = 1;
76 PC1 = 1;
77 }
78 }
79 TF2 = 0;
80}
81
82/*
83 * This sets three bits for each channel, one channel at a time.
ae56b4f6
JL
84 * For channel 0 we want to set bits 1, 2 & 3
85 * For channel 1 we want to set bits 4, 5 & 6
1d203181
STA
86 *
87 * We convert the input values that are strange due to original
88 * firmware code into the value of the three bits as follows:
89 *
90 * val -> bits
91 * 1 -> 010b
92 * 2 -> 001b
93 * 5 -> 000b
94 * 10 -> 011b
95 *
96 * The third bit is always zero since there are only four outputs connected
97 * in the serial selector chip.
98 *
99 * The multiplication of the converted value by 0x24 sets the relevant bits in
100 * both channels and then we mask it out to only affect the channel currently
101 * requested.
102 */
103static BOOL set_voltage(BYTE channel, BYTE val)
104{
105 BYTE bits, mask;
106
107 switch (val) {
108 case 1:
ae56b4f6 109 bits = 0x02;
1d203181
STA
110 break;
111 case 2:
ae56b4f6 112 bits = 0x01;
1d203181
STA
113 break;
114 case 5:
ae56b4f6 115 bits = 0x00;
1d203181
STA
116 break;
117 case 10:
ae56b4f6 118 bits = 0x03;
1d203181
STA
119 break;
120 default:
121 return FALSE;
122 }
123
ae56b4f6
JL
124 bits = bits << (channel ? 1 : 4);
125 mask = (channel) ? 0x70 : 0x0e;
126 IOA = (IOA & ~mask) | (bits & mask);
1d203181
STA
127
128 return TRUE;
129}
130
131static BOOL set_numchannels(BYTE numchannels)
132{
133 if (numchannels == 1 || numchannels == 2) {
134 BYTE fifocfg = 7 + numchannels;
135 EP2FIFOCFG = fifocfg;
136 EP6FIFOCFG = fifocfg;
137 return TRUE;
138 }
139
140 return FALSE;
141}
142
143static void clear_fifo(void)
144{
145 GPIFABORT = 0xff;
146 SYNCDELAY3;
147 FIFORESET = 0x80;
148 SYNCDELAY3;
149 FIFORESET = 0x82;
150 SYNCDELAY3;
151 FIFORESET = 0x86;
152 SYNCDELAY3;
153 FIFORESET = 0;
154}
155
156static void stop_sampling(void)
157{
158 GPIFABORT = 0xff;
159 SYNCDELAY3;
160 INPKTEND = (altiface == 0) ? 6 : 2;
161}
162
163static void start_sampling(void)
164{
165 int i;
166
59562384
JL
167 /* Set analog mode. */
168 PA7 = 1;
169
1d203181
STA
170 clear_fifo();
171
172 for (i = 0; i < 1000; i++);
173
174 while (!(GPIFTRIG & 0x80))
175 ;
176
177 SYNCDELAY3;
178 GPIFTCB1 = 0x28;
179 SYNCDELAY3;
180 GPIFTCB0 = 0;
181 GPIFTRIG = (altiface == 0) ? 6 : 4;
182
183 /* Set green LED, don't clear LED. */
184 ledcounter = 0;
185 PC0 = 1;
186 PC1 = 0;
187}
188
189static void select_interface(BYTE alt)
190{
191 const BYTE *pPacketSize = \
192 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
193 + (9 + (16 * alt) + 9 + 4);
194
195 altiface = alt;
196
197 if (alt == 0) {
198 /* Bulk on EP6. */
199 EP2CFG = 0x00;
200 EP6CFG = 0xe0;
201 EP6GPIFFLGSEL = 1;
202 EP6AUTOINLENL = pPacketSize[0];
203 EP6AUTOINLENH = pPacketSize[1];
204 } else {
205 /* Iso on EP2. */
206 EP2CFG = 0xd8;
207 EP6CFG = 0x00;
208 EP2GPIFFLGSEL = 1;
209 EP2AUTOINLENL = pPacketSize[0];
210 EP2AUTOINLENH = pPacketSize[1] & 0x7;
211 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
212 }
213}
214
215static const struct samplerate_info {
216 BYTE rate;
217 BYTE wait0;
218 BYTE wait1;
219 BYTE opc0;
220 BYTE opc1;
221 BYTE out0;
222 BYTE ifcfg;
223} samplerates[] = {
224 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
225 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
90fdecb7
JL
226 { 24, 1, 0, 2, 1, 0x10, 0xca },
227 { 16, 1, 1, 2, 0, 0x10, 0xca },
228 { 12, 2, 1, 2, 0, 0x10, 0xca },
229 { 8, 3, 2, 2, 0, 0x10, 0xca },
230 { 4, 6, 5, 2, 0, 0x10, 0xca },
231 { 2, 12, 11, 2, 0, 0x10, 0xca },
232 { 1, 24, 23, 2, 0, 0x10, 0xca },
233 { 50, 48, 47, 2, 0, 0x10, 0xca },
234 { 20, 120, 119, 2, 0, 0x10, 0xca },
235 { 10, 240, 239, 2, 0, 0x10, 0xca },
1d203181
STA
236};
237
238static BOOL set_samplerate(BYTE rate)
239{
240 BYTE i = 0;
241
242 while (samplerates[i].rate != rate) {
243 i++;
244 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
245 return FALSE;
246 }
247
248 IFCONFIG = samplerates[i].ifcfg;
249
250 AUTOPTRSETUP = 7;
251 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
252 AUTOPTRL2 = 0x00;
253
254 /*
255 * The program for low-speed, e.g. 1 MHz, is:
256 * wait 24, CTL2=0, FIFO
257 * wait 23, CTL2=1
258 * jump 0, CTL2=1
259 *
260 * The program for 24 MHz is:
261 * wait 1, CTL2=0, FIFO
262 * jump 0, CTL2=1
263 *
264 * The program for 30/48 MHz is:
265 * jump 0, CTL2=Z, FIFO, LOOP
266 */
267
268 /* LENGTH / BRANCH 0-7 */
269 EXTAUTODAT2 = samplerates[i].wait0;
270 EXTAUTODAT2 = samplerates[i].wait1;
271 EXTAUTODAT2 = 1;
272 EXTAUTODAT2 = 0;
273 EXTAUTODAT2 = 0;
274 EXTAUTODAT2 = 0;
275 EXTAUTODAT2 = 0;
276 EXTAUTODAT2 = 0;
277
278 /* OPCODE 0-7 */
279 EXTAUTODAT2 = samplerates[i].opc0;
280 EXTAUTODAT2 = samplerates[i].opc1;
281 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
282 EXTAUTODAT2 = 0;
283 EXTAUTODAT2 = 0;
284 EXTAUTODAT2 = 0;
285 EXTAUTODAT2 = 0;
286 EXTAUTODAT2 = 0;
287
288 /* OUTPUT 0-7 */
289 EXTAUTODAT2 = samplerates[i].out0;
a76fd2a9
JL
290 EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
291 EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
1d203181
STA
292 EXTAUTODAT2 = 0;
293 EXTAUTODAT2 = 0;
294 EXTAUTODAT2 = 0;
295 EXTAUTODAT2 = 0;
296 EXTAUTODAT2 = 0;
297
298 /* LOGIC FUNCTION 0-7 */
299 EXTAUTODAT2 = 0;
300 EXTAUTODAT2 = 0;
301 EXTAUTODAT2 = 0;
302 EXTAUTODAT2 = 0;
303 EXTAUTODAT2 = 0;
304 EXTAUTODAT2 = 0;
305 EXTAUTODAT2 = 0;
306 EXTAUTODAT2 = 0;
307
308 for (i = 0; i < 96; i++)
309 EXTAUTODAT2 = 0;
310
311 return TRUE;
312}
313
314/* Set *alt_ifc to the current alt interface for ifc. */
315BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
316{
317 (void)ifc;
318
319 *alt_ifc = altiface;
320
321 return TRUE;
322}
323
324/*
325 * Return TRUE if you set the interface requested.
326 *
327 * Note: This function should reconfigure and reset the endpoints
328 * according to the interface descriptors you provided.
329 */
330BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
331{
332 if (ifc == 0)
333 select_interface(alt_ifc);
334
335 return TRUE;
336}
337
338BYTE handle_get_configuration(void)
339{
340 /* We only support configuration 0. */
341 return 0;
342}
343
344BOOL handle_set_configuration(BYTE cfg)
345{
346 /* We only support configuration 0. */
347 (void)cfg;
348
349 return TRUE;
350}
351
352BOOL handle_vendorcommand(BYTE cmd)
353{
354 stop_sampling();
355
356 /* Set red LED. */
357 PC0 = 0;
358 PC1 = 1;
359 ledcounter = 1000;
360
361 /* Clear EP0BCH/L for each valid command. */
362 if (cmd >= 0xe0 && cmd <= 0xe4) {
363 EP0BCH = 0;
364 EP0BCL = 0;
365 while (EP0CS & bmEPBUSY);
366 }
367
368 switch (cmd) {
369 case 0xe0:
370 case 0xe1:
371 set_voltage(cmd - 0xe0, EP0BUF[0]);
372 return TRUE;
373 case 0xe2:
374 set_samplerate(EP0BUF[0]);
375 return TRUE;
376 case 0xe3:
377 if (EP0BUF[0] == 1)
378 start_sampling();
379 return TRUE;
380 case 0xe4:
381 set_numchannels(EP0BUF[0]);
382 return TRUE;
383 }
384
385 return FALSE; /* Not handled by handlers. */
386}
387
388static void init(void)
389{
390 EP4CFG = 0;
391 EP8CFG = 0;
392
59562384 393 /* Set analog mode. */
eb52aca4
JL
394 PA7 = 1;
395
1d203181
STA
396 /* In idle mode tristate all outputs. */
397 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
398 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
399 GPIFWFSELECT = 0x00;
400 GPIFREADYSTAT = 0x00;
401
402 stop_sampling();
403
404 set_voltage(0, 1);
405 set_voltage(1, 1);
406 set_samplerate(1);
407 set_numchannels(2);
408 select_interface(0);
409}
410
411static void main(void)
412{
413 /* Save energy. */
414 SETCPUFREQ(CLK_12M);
415
416 init();
417
418 /* Set up interrupts. */
419 USE_USB_INTS();
420
421 ENABLE_SUDAV();
422 ENABLE_USBRESET();
423 ENABLE_HISPEED();
424 ENABLE_SUSPEND();
425 ENABLE_RESUME();
426
427 /* Global (8051) interrupt enable. */
428 EA = 1;
429
430 /* Init timer2. */
431 RCAP2L = -500 & 0xff;
432 RCAP2H = (-500 & 0xff00) >> 8;
433 T2CON = 0;
434 ET2 = 1;
435 TR2 = 1;
436
437 RENUMERATE();
438
439 PORTCCFG = 0;
440 PORTACFG = 0;
441 OEC = 0xff;
f6eb6aec 442 OEA = 0xff;
1d203181
STA
443
444 while (TRUE) {
445 if (dosud) {
446 dosud = FALSE;
447 handle_setupdata();
448 }
449
450 if (dosuspend) {
451 dosuspend = FALSE;
452 do {
453 /* Make sure ext wakeups are cleared. */
454 WAKEUPCS |= bmWU|bmWU2;
455 SUSPEND = 1;
456 PCON |= 1;
457 __asm
458 nop
459 nop
460 nop
461 nop
462 nop
463 nop
464 nop
465 __endasm;
466 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
467
468 /* Resume (TRM 6.4). */
469 if (REMOTE_WAKEUP()) {
470 delay(5);
471 USBCS |= bmSIGRESUME;
472 delay(15);
473 USBCS &= ~bmSIGRESUME;
474 }
475 }
476 }
477}