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d5f5ea73 UH |
1 | /* |
2 | * This file is part of the fx2lafw project. | |
3 | * | |
4 | * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | ||
21 | /* | |
22 | * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers. | |
23 | * | |
24 | * It is written in C, using fx2lib as helper library, and sdcc as compiler. | |
25 | * The code is licensed under the terms of the GNU GPL, version 2 or later. | |
26 | * | |
27 | * Technical notes: | |
28 | * | |
29 | * - We use the FX2 in GPIF mode to sample the data (asynchronously). | |
30 | * - We use the internal 48MHz clock for GPIF. | |
31 | * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7. | |
32 | * Support for 16 channels is not yet included, but might be added later. | |
33 | * - Endpoint 2 is used for data transfers from FX2 to host. | |
34 | * - The endpoint is quad-buffered. | |
35 | * | |
36 | * Documentation: | |
37 | * | |
38 | * - See http://sigrok.org/wiki/Fx2lafw | |
39 | */ | |
40 | ||
41 | #include <fx2regs.h> | |
42 | #include <fx2macros.h> | |
43 | #include <delay.h> | |
d5f5ea73 UH |
44 | #include <setupdat.h> |
45 | #include <eputils.h> | |
46 | #include <gpif.h> | |
e41576ec | 47 | |
64d47730 | 48 | #include <command.h> |
8f4a701f | 49 | #include <fx2lafw.h> |
e41576ec | 50 | #include <gpif-acquisition.h> |
d5f5ea73 | 51 | |
d5f5ea73 UH |
52 | /* ... */ |
53 | volatile bit got_sud; | |
2846a114 | 54 | BYTE vendor_command; |
d5f5ea73 | 55 | |
d5f5ea73 UH |
56 | static void setup_endpoints(void) |
57 | { | |
d5f5ea73 UH |
58 | /* Setup EP2 (IN). */ |
59 | EP2CFG = (1 << 7) | /* EP is valid/activated */ | |
60 | (1 << 6) | /* EP direction: IN */ | |
61 | (1 << 5) | (0 << 4) | /* EP Type: bulk */ | |
62 | (0 << 3) | /* EP buffer size: 512 */ | |
63 | (0 << 2) | /* Reserved. */ | |
64 | (0 << 1) | (0 << 0); /* EP buffering: quad buffering */ | |
65 | SYNCDELAY(); | |
66 | ||
576c6627 | 67 | /* Disable all other EPs (EP1, EP4, EP6, and EP8). */ |
4ad20a4c UH |
68 | EP1INCFG &= ~bmVALID; |
69 | SYNCDELAY(); | |
70 | EP1OUTCFG &= ~bmVALID; | |
71 | SYNCDELAY(); | |
d5f5ea73 UH |
72 | EP4CFG &= ~bmVALID; |
73 | SYNCDELAY(); | |
576c6627 JH |
74 | EP6CFG &= ~bmVALID; |
75 | SYNCDELAY(); | |
d5f5ea73 UH |
76 | EP8CFG &= ~bmVALID; |
77 | SYNCDELAY(); | |
78 | ||
4ad20a4c | 79 | /* EP2: Reset the FIFOs. */ |
d5f5ea73 | 80 | /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ |
d5f5ea73 | 81 | RESETFIFO(0x02) |
2d62ae47 | 82 | |
dc7ac8bf | 83 | /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */ |
2d62ae47 | 84 | EP2FIFOCFG = bmAUTOIN; |
dc7ac8bf UH |
85 | SYNCDELAY(); |
86 | ||
87 | /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */ | |
88 | EP2AUTOINLENH = 0x02; | |
89 | SYNCDELAY(); | |
90 | EP2AUTOINLENL = 0x00; | |
91 | SYNCDELAY(); | |
92 | ||
4ad20a4c | 93 | /* EP2: Set the GPIF flag to 'full'. */ |
fb0b6d28 | 94 | EP2GPIFFLGSEL = (1 << 1) | (0 << 1); |
d5f5ea73 UH |
95 | SYNCDELAY(); |
96 | } | |
97 | ||
98 | BOOL handle_vendorcommand(BYTE cmd) | |
99 | { | |
c7283c28 | 100 | /* Protocol implementation */ |
c7283c28 | 101 | switch (cmd) { |
3b6919fa | 102 | case CMD_START: |
2846a114 JH |
103 | /* There is data to receive - arm EP0 */ |
104 | EP0BCL = 0; | |
105 | case CMD_GET_FW_VERSION: | |
106 | vendor_command = cmd; | |
3b6919fa | 107 | return TRUE; |
c7283c28 UH |
108 | default: |
109 | /* Unimplemented command. */ | |
110 | break; | |
111 | } | |
4ad20a4c | 112 | |
d5f5ea73 UH |
113 | return FALSE; |
114 | } | |
115 | ||
116 | BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc) | |
117 | { | |
118 | /* We only support interface 0, alternate interface 0. */ | |
119 | if (ifc != 0) | |
120 | return FALSE; | |
121 | ||
122 | *alt_ifc = 0; | |
123 | return TRUE; | |
124 | } | |
125 | ||
126 | BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc) | |
127 | { | |
128 | /* We only support interface 0, alternate interface 0. */ | |
129 | if (ifc != 0 || alt_ifc != 0) | |
130 | return FALSE; | |
131 | ||
132 | /* Perform procedure from TRM, section 2.3.7: */ | |
133 | ||
134 | /* (1) TODO. */ | |
135 | ||
136 | /* (2) Reset data toggles of the EPs in the interface. */ | |
137 | /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */ | |
d5f5ea73 | 138 | RESETTOGGLE(0x82); |
106ee45c UH |
139 | #ifdef DEBUG |
140 | RESETTOGGLE(0x86); | |
141 | #endif | |
d5f5ea73 UH |
142 | |
143 | /* (3) Restore EPs to their default conditions. */ | |
144 | /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ | |
d5f5ea73 UH |
145 | RESETFIFO(0x02); |
146 | /* TODO */ | |
106ee45c | 147 | #ifdef DEBUG |
c430e296 | 148 | RESETFIFO(0x06); |
106ee45c | 149 | #endif |
c430e296 | 150 | |
d5f5ea73 UH |
151 | /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */ |
152 | ||
153 | return TRUE; | |
154 | } | |
155 | ||
156 | BYTE handle_get_configuration(void) | |
157 | { | |
158 | /* We only support configuration 1. */ | |
159 | return 1; | |
160 | } | |
161 | ||
162 | BOOL handle_set_configuration(BYTE cfg) | |
163 | { | |
164 | /* We only support configuration 1. */ | |
165 | return (cfg == 1) ? TRUE : FALSE; | |
166 | } | |
167 | ||
168 | void sudav_isr(void) interrupt SUDAV_ISR | |
169 | { | |
170 | got_sud = TRUE; | |
171 | CLEAR_SUDAV(); | |
172 | } | |
173 | ||
174 | void sof_isr(void) interrupt SOF_ISR using 1 | |
175 | { | |
176 | CLEAR_SOF(); | |
177 | } | |
178 | ||
179 | void usbreset_isr(void) interrupt USBRESET_ISR | |
180 | { | |
181 | handle_hispeed(FALSE); | |
182 | CLEAR_USBRESET(); | |
183 | } | |
184 | ||
185 | void hispeed_isr(void) interrupt HISPEED_ISR | |
186 | { | |
187 | handle_hispeed(TRUE); | |
188 | CLEAR_HISPEED(); | |
189 | } | |
190 | ||
1cbff47d | 191 | void fx2lafw_init(void) |
d5f5ea73 UH |
192 | { |
193 | /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */ | |
e7434142 | 194 | REVCTL = bmNOAUTOARM | bmSKIPCOMMIT; |
d5f5ea73 UH |
195 | |
196 | got_sud = FALSE; | |
2846a114 | 197 | vendor_command = 0; |
d5f5ea73 UH |
198 | |
199 | /* Renumerate. */ | |
200 | RENUMERATE_UNCOND(); | |
201 | ||
202 | SETCPUFREQ(CLK_48M); | |
203 | ||
204 | USE_USB_INTS(); | |
205 | ||
206 | /* TODO: Does the order of the following lines matter? */ | |
207 | ENABLE_SUDAV(); | |
208 | ENABLE_SOF(); | |
209 | ENABLE_HISPEED(); | |
210 | ENABLE_USBRESET(); | |
211 | ||
212 | /* Global (8051) interrupt enable. */ | |
213 | EA = 1; | |
214 | ||
215 | /* Setup the endpoints. */ | |
216 | setup_endpoints(); | |
217 | ||
218 | /* Put the FX2 into GPIF master mode and setup the GPIF. */ | |
219 | gpif_init_la(); | |
1cbff47d | 220 | } |
d5f5ea73 | 221 | |
28d52f41 | 222 | void fx2lafw_poll(void) |
1cbff47d JH |
223 | { |
224 | if (got_sud) { | |
225 | handle_setupdata(); | |
226 | got_sud = FALSE; | |
d5f5ea73 | 227 | } |
2846a114 JH |
228 | |
229 | if (vendor_command) { | |
230 | switch (vendor_command) { | |
231 | case CMD_GET_FW_VERSION: | |
232 | /* TODO */ | |
233 | ||
234 | /* Acknowledge the vendor command. */ | |
235 | vendor_command = 0; | |
236 | break; | |
237 | ||
238 | case CMD_START: | |
239 | if((EP0CS & bmEPBUSY) != 0) | |
240 | break; | |
241 | ||
242 | if(EP0BCL == 2) { | |
243 | gpif_acquisition_start( | |
244 | (const struct cmd_start_acquisition*)EP0BUF); | |
245 | } | |
246 | ||
247 | /* Acknowledge the vendor command. */ | |
248 | vendor_command = 0; | |
249 | break; | |
250 | ||
251 | default: | |
252 | /* Unimplemented command. */ | |
253 | vendor_command = 0; | |
254 | break; | |
255 | } | |
256 | } | |
293d7e9e JH |
257 | |
258 | gpif_poll(); | |
d5f5ea73 | 259 | } |